Order this document by MRFIC2403/D SEMICONDUCTOR TECHNICAL DATA The MRFIC Line The MRFIC2403 is a two–stage class B GaAs power amplifier in a low–cost 16 lead plastic package designed for use in the 2.4 to 2.5 GHz Industrial– Scientific–Medical (ISM) band. The design is optimized for efficiency at 5.0 Volt operation at 2.5 GHz but is usable from 2.0 to 3.0 GHz in applications such as telemetry and Multichannel Multipoint Distribution System (MMDS) wireless cable TV systems. Performance is suitable for frequency hopping or direct sequence spread spectrum as well as single–frequency applications. Power control circuitry allows 20 dB dynamic range for setting the output power. • High Output Power = +23.5 dBm Typical • High Gain = 23 dB Typical • Excellent Efficiency = 55% Typical • Power Control = 20 dB Range • Low–Cost, Low Profile Plastic SOIC Package • Available in Tape and Reel by Adding R2 Suffix to Part Number. R2 Suffix = 2,500 Units per 16 mm, 13 inch Reel. • Device Marking = M2403 2.4 GHz POWER AMPLIFIER GaAs MONOLITHIC INTEGRATED CIRCUIT CASE 751B-05 (SO–16) ABSOLUTE MAXIMUM RATINGS (TA = 25_C unless otherwise noted) Parameter Symbol Value Unit VDD 6.0 Vdc Power Control Voltage VCONTRL 6.0 Vdc Gate Bias Voltage VG1, VG2 –4.0 Vdc RF IN +10 dBm TA –30 to +85 _C Tstg –65 to +125 _C Supply Voltage RF Input Power Ambient Operating Temperature Storage Temperature N/C GND RF OUT VD2 GND GND VG2 GND VG1 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 VDD GND PCNTRL GND GND RF IN GND N/C Pin Connections and Functional Block Diagram REV 1 RF DEVICE DATA MOTOROLA Motorola, Inc. 1995 MRFIC2403 1 RECOMMENDED OPERATING CONDITIONS Symbol Value Unit Supply Voltage Parameter VDD 4.75 to 5.25 Vdc Gate Bias Voltage, Input Stage VG1 –1.0 Vdc Gate Bias Voltage, Output Stage VG2 –2.0 Vdc Quiescent Drain Current, Stage One IDQ1 12 mA Quiescent Drain Current, Stage Two IDQ2 10 mA fOP 2200 to 2700 MHz Operating Frequency Range ELECTRICAL CHARACTERISTICS (VDD = 5.0 Vdc, TA = 25_C, RF = 2.45 GHz @ +4.0 dBm, VG1 = –1.0 Vdc, VG2 = –2.0 Vdc, PCNTRL = 5.0 Vdc) Characteristic Min Typ Max Unit Small Signal Gain (Pin = –6.0 dBm) – 23 – dB Power Output (Pin = +4.0 dBm) 23 23.5 – dBm Power Output, Saturation – 23.5 – dBm Power Output, 1.0 dB Compression – 19 – dBm 2nd Harmonic Output – –20 – dBc 3rd Harmonic Output – –30 – dBc Third Order Intermodulation Products (Pin = +4.0 dBm PEP) – –15 – dBc Reverse Isolation – 32 – dB Power Control Range, PCNTRL – 20 – dB Reverse Isolation – 30 – dB Supply Current – 95 140 mA SLEEP Mode Supply Current (VG1 = VG2 = –3.0 Vdc, PCNTRL = 0 Vdc) – 150 – mA VG1 VG2 C5 RF OUT C6 L1 VDD2 9 8 10 7 11 6 12 5 13 4 14 3 15 2 16 1 RF IN PCNTRL C2 C1, C2, C3 – 0.01 µF C4 – 5.1 pF C5 – 15 pF C6 – 1.0 pF L1 – 6.8 nH Board Material – 30 MIL FR4 Connectors – SMA type VD1 C1 C3 C4 Figure 1. Applications Circuit Configuration MRFIC2403 2 MOTOROLA RF DEVICE DATA Table 1. Class A Scattering Parameters (VDD = 5 V, IDQ1 = 24 mA, IDQ2 = 96 mA, TA = 25°C, 50 W System) f S11 S21 S12 S22 (MHz) |S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ 2000 0.377 –157.00 27.625 57.40 0.004 –74.70 0.740 –102.10 2050 0.218 –171.70 28.938 36.80 0.006 –101.60 0.763 –115.30 2100 0.075 –178.80 29.088 17.20 0.007 –130.70 0.724 –126.80 2150 0.049 –96.10 27.904 –0.20 0.007 –163.20 0.663 –135.80 2200 0.104 –56.60 26.930 –14.90 0.008 –169.60 0.601 –141.80 2250 0.130 –60.60 24.246 –27.80 0.009 173.50 0.550 –146.30 2300 0.125 –65.40 24.286 –39.40 0.010 165.00 0.504 –149.10 2350 0.106 –67.60 22.287 –49.60 0.010 157.70 0.471 –151.60 2400 0.083 –56.10 21.867 –59.80 0.009 140.70 0.444 –153.80 2450 0.064 –27.00 21.837 –68.90 0.011 141.40 0.422 –155.90 2500 0.072 26.20 20.113 –78.00 0.012 139.80 0.401 –158.60 2550 0.110 44.60 19.828 –86.40 0.009 140.00 0.385 –161.20 2600 0.160 44.50 18.941 –94.30 0.007 124.50 0.364 –164.50 2650 0.194 40.60 18.001 –101.90 0.012 128.30 0.350 –167.70 2700 0.237 36.60 17.268 –109.20 0.011 102.30 0.335 –171.40 2750 0.269 31.30 16.379 –116.30 0.010 110.90 0.317 –174.50 2800 0.304 25.50 15.826 –123.40 0.009 105.80 0.311 –178.60 2850 0.325 19.80 15.125 –130.40 0.010 103.60 0.292 177.50 2900 0.345 14.50 14.611 –137.50 0.008 99.70 0.279 172.80 2950 0.356 9.40 14.048 –143.60 0.009 92.80 0.271 168.90 3000 0.370 2.40 13.663 –150.40 0.011 88.20 0.259 163.80 MOTOROLA RF DEVICE DATA MRFIC2403 3 Table 2. Class B Scattering Parameters (VDD = 5 V, IDQ1 = 12 mA, IDQ2 = 10 mA, TA = 25°C, 50 W System) f S11 S21 S12 S22 (MHz) |S11| ∠φ |S21| ∠φ |S12| ∠φ |S22| ∠φ 2000 0.634 –149.00 12.40 88.00 0.007 –59.00 0.893 –81.00 2050 0.554 –170.00 14.76 72.00 0.013 –81.00 0.966 –89.00 2100 0.456 163.00 17.00 53.00 0.015 –95.00 0.990 –100.00 2150 0.362 129.00 18.09 32.00 0.017 –117.00 0.955 –110.00 2200 0.310 91.00 18.81 12.00 0.020 –138.00 0.870 –119.00 2250 0.298 58.00 17.37 –5.00 0.021 –156.00 0.771 –125.00 2300 0.298 30.00 17.22 –21.00 0.021 –169.00 0.681 –128.00 2350 0.289 11.00 15.89 –34.00 0.020 179.00 0.612 –130.00 2400 0.275 0.00 14.74 –45.00 0.020 168.00 0.562 –130.00 2450 0.248 –8.00 15.35 –56.00 0.021 155.00 0.528 –131.00 2500 0.216 –10.00 13.62 –66.00 0.019 147.00 0.498 –131.00 2550 0.199 –8.00 13.46 –75.00 0.021 143.00 0.473 –132.00 2600 0.187 –2.00 12.95 –83.00 0.020 134.00 0.447 –132.00 2650 0.185 4.00 12.32 –91.00 0.020 129.00 0.426 –134.00 2700 0.202 10.00 11.78 –99.00 0.021 123.00 0.405 –135.00 2750 0.218 13.00 11.25 –107.00 0.021 115.00 0.384 –136.00 2800 0.244 14.00 10.83 –114.00 0.018 106.00 0.373 –137.00 2850 0.268 13.00 10.34 –121.00 0.019 98.00 0.353 –139.00 2900 0.285 10.00 10.05 –129.00 0.019 99.00 0.332 –140.00 2950 0.301 7.00 9.61 –135.00 0.018 102.00 0.316 –143.00 3000 0.317 3.00 9.46 –142.00 0.018 90.00 0.302 –145.00 MRFIC2403 4 MOTOROLA RF DEVICE DATA TYPICAL CHARACTERISTICS 23 21 70 26 60 25 50 EFFICIENCY 40 19 17 15 13 11 –10 30 f = 2.45 GHz VDD = 5.0 Vdc VG1 = –1.0 Vdc VG2 = –2.0 Vdc –8 –6 –4 –2 0 2 PIN, INPUT POWER (dBm) 20 6 4 Pout , OUTPUT POWER (dBm) POUT POWER ADDED EFFICIENCY (%) Pout , OUTPUT POWER (dBm) 25 TA = – 30°C 24 25°C 23 85°C 22 21 Pin = +4.0 dBm VDD = 5.0 Vdc VG1 = –1.0 Vdc VG2 = –2.0 Vdc 20 10 19 0 18 2.0 Figure 2. Output Power and Efficiency versus Input Power 2.1 2.2 2.3 2.5 2.6 2.7 2.4 f, FREQUENCY (GHz) 2.8 2.9 3.0 Figure 3. Output Power versus Frequency 25 Pout , OUTPUT POWER (dBm) 20 15 10 f = 2.45 GHz Pin = +4.0 dBm VDD = 5.0 Vdc VG1 = –1.0 Vdc VG2 = –2.0 Vdc 5 0 –5 0 1 2 3 PCNTRL, (VOLTS) 4 5 Figure 4. Output Power versus PCNTRL Voltage DESIGN AND APPLICATIONS INFORMATION The MRFIC2403 is a two–stage power amplifier designed using Motorola’s MAFET planar, refractory gate MESFET IC process. The RF MESFETs are power, depletion mode devices and, therefore, require negative bias on the MESFET gates. For class B operation, –1.0 Vdc is applied to VG1 and –2.0 Vdc is applied to VG2. Class A biasing will yield slightly higher gain and 1.0 dB compression point and can be accomplished by adjusting the bias on VG1 for IDQ1 = 24 mA and VG2 for IDQ2 = 96 mA. Where negative voltages are not already available, Motorola’s MC33128 Power Management IC can produce –2.5 Vdc from a single positive supply. The device is capable of better than +23 dBm saturated output power in the 2.4 to 2.5 GHz ISM band with the output matching circuit shown in Figure 1. The device can be operated at other frequencies in the 2.0 GHz to 3.0 GHz range with this circuit but performance can be improved with tuning for the specific frequency of use. Input matching is provided on chip. This circuit provides the best gain, saturated output power and efficiency tradeoff. Saturated operation has the advantage of best efficiency with less variation in performance over frequency and temperature. Operation in saturation is acceptable for constant envelope modulation schemes such as 2 and 4 level FM as specified for frequency hopping (FHSS) radios in the proposed IEEE 802.11 PHY layer specification. For direct sequence MOTOROLA RF DEVICE DATA (DSSS) IEEE 802.11 operation, where differential binary phase shift keying (DBPSK) and differential quadrature phase shift keying (DQPSK) are specified, the amplifier will have to be “backed off” from saturation by 5.0 dB or more to avoid spectral regrowth. Care must be taken in the layout of the circuit and controlled impedance lines must be used at the RF pins. Capacitive bypassing as shown in the Applications Circuit must be implemented as close to the chip as possible to avoid amplifier instability. Additionally, the supply voltage should be supported by sufficient “stiffening” capacitance, typically electrolytic or tantalum bypass capacitors, to eliminate noise from digital circuits. Output power control is accomplished by varying the voltage on the PCNTRL pin. 0 Vdc gives minimum output and reduces the current drawn by the amplifier to the quiescent value. The amplifier can be put into “sleep” mode by decreasing the voltage on the gate bias pins to –3.0 Vdc and the current drain is reduced to a few hundred microamps. EVALUATION BOARDS Evaluation boards are available for RF Monolithic Integrated Circuits by adding a “TF” suffix to the device type. For a complete list of currently available boards and ones in development for newly introduced poduct, please contact your local Motorola Distributor or Sales Office. MRFIC2403 5 PACKAGE DIMENSIONS –A– 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 9 –B– 1 P 8 PL 0.25 (0.010) 8 M B S G R K F X 45 _ C –T– SEATING PLANE J M D 16 PL 0.25 (0.010) M T B S A S DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 CASE 751B–05 ISSUE J Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. 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Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki, 6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315 MFAX: [email protected] – TOUCHTONE (602) 244–6609 INTERNET: http://Design–NET.com HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 MRFIC2403 6 ◊ *MRFIC2403/D* MRFIC2403/D MOTOROLA RF DEVICE DATA