Order this document by MRFIC1806/D SEMICONDUCTOR TECHNICAL DATA The MRFIC Line Designed primarily for use in DECT, Japan Personal Handy System (PHS), and other wireless Personal Communication Systems (PCS) applications. The MRFIC1806 includes a two stage driver amplifier and transmit waveform shaping circuitry in a low–cost SOIC–16 package. The amplifier portion employs depletion mode power GaAs MESFETs to produce +21 dBm output with 0 dBm input. The ramping circuit controls the burst–mode transmit rise and fall time and is adjustable through external components. This circuitry also places the amplifier in standby during TDMA receive mode. The MRFIC1806 is sized to drive the MRFIC1807 PA/Switch. Together with the rest of the MRFIC1800 GaAs ICs, this family offers the complete transmit and receive functions, less LO and filters, needed for a typical 1.8 GHz cordless telephone. 1.8 GHz DRIVER AMPLIFIER AND RAMP CIRCUIT GaAs MONOLITHIC INTEGRATED CIRCUIT • Usable 1500 – 2500 MHz • 23 dB Typical Gain • +21 dBm Typical 1.0 dB Compression • Simple Off–Chip Matching for Maximum Flexibility • 3.0 to 5.0 Volt Supply • Low Cost Surface Mount Plastic Package CASE 751B–05 (SO–16) • Order MRFIC1806R2 for Tape and Reel. R2 Suffix = 2,500 Units per 16 mm, 13 inch Reel. • Device Marking = M1806 C1/VRAMP 1 TX RAMP 2 REG VDD 3 16 VDR 20K RAMP LOGIC XLATOR 15 GND 14 VD1 VSS VDD GND 4 13 GND GND 5 12 GND RF IN 6 11 RF OUT VDD 7 10 GND PCNTRL 8 GATE BIAS 9 VSS Figure 1. Pin Connections and Functional Block Diagram REV 2 MOTOROLA Motorola, Inc. 1997 MRFIC1806 1 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁ ÁÁÁÁ ABSOLUTE MAXIMUM RATINGS (TA = 25°C unless otherwise noted) Symbol Limit Unit Supply Voltage Rating VDD 6.0 Vdc Supply Voltage VSS – 4.0 Vdc Supply Voltage REG VDD 4.5 Vdc Bias Control Voltage PCNTRL 3.0 Vdc PIN 10 dBm TX RAMP 6.0 Vdc Tstg – 65 to +150 °C Ambient Operating Temperature TA –10 to +70 °C Thermal Resistance, Junction to Case θJC 100 °C/W RF Input Power Ramp Circuit Input Voltage (High) Storage Temperature Range RECOMMENDED OPERATING RANGES Parameter Symbol Value Unit RF Input Frequency fRF 1.5 – 2.5 GHz Supply Voltage VDD 3.0 to 5.0 Vdc Supply Voltage VSS – 2.75 to – 2.25 Vdc Supply Voltage REG VDD 2.9 to 3.1 Vdc Bias Control Voltage PCNTRL 0.5 to 1.5 Vdc PIN – 20 to + 5 dBm Transmit Burst Enable Voltage (High) TX RAMP 2.8 to 3.5 Vdc Transmit Burst Enable Voltage (Low) TX RAMP – 0.2 to + 0.2 Vdc RF Input Power MRFIC1806 2 MOTOROLA ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ELECTRICAL CHARACTERISTICS DECT Application with Internal Logic Translator (See Figure 2. VDD = 3.5 V, REG VDD = 3.0 V, TA = 25°C, VSS = – 2.5 V, TX RAMP = 3.0 V, PCNTRL set for Quiescent IDD = 120 mA, PIN = – 3.0 dBm @ 1.9 GHz unless otherwise stated.) Characteristic Min Typ Max Unit Small Signal Gain (PIN = – 7.0 dBm) 21 23 — dB Input Return Loss — 12 — dB Reverse Isolation — 36 — dB Output Power 18 19.5 — dBm Harmonic Output — – 36 — dBc Output Third Order Intercept — 33 — dBm Supply Current, ISS (Pin 9) — 0.35 0.6 mA Supply Current, IDD (Pin 7) — 115 135 mA Supply Current, REG IDD (Pin 3) — 0.6 0.9 mA Ramp Circuit Dynamic Range 40 44 — dB STANDBY MODE (TX RAMP = 0 V) Min Typ Max Unit Output Power Characteristic — – 25 — dBm Supply Current, ISS (Pin 9) — 0.4 0.6 mA Supply Current, REG IDD (Pin 3) — 0.25 0.4 mA C1 330 pF C2 330 pF R1 22K 1 3 V (ON) TX RAMP 0 V (OFF) 16 20K 2 REG VDD 3.0 V 3 RAMP LOGIC XLATOR RF IN 50 OHM C9 1.5 pF VDD 4 13 5 12 6 11 VDD 3.5 V 7 C7 4700 pF 8 R2 2.2 C3 330 pF 14 VSS T2 (FR4) Zo = 100 L = 8.5 mm 15 C4 22 pF T1 (FR4) Zo = 100 L = 20 mm C6 C5 1.5 pF 22 pF RF OUT 50 OHM 10 GATE BIAS 9 VSS – 2.5 V PCNTRL 1.4 V TYP Figure 2. Applications Circuit Details for DECT using Internal Logic Translator MOTOROLA MRFIC1806 3 ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁÁ ELECTRICAL CHARACTERISTICS General Application without Internal Logic Translator (See Figure 3. VDD = 3.5 V, REG VDD (Pin 2) open, VSS = – 2.5 V, TX RAMP (Pin 2) grounded, VRAMP = 3.0 V, PCNTRL set for Quiescent IDD = 120 mA, PIN = 0 dBm @ 1.9 GHz, TA = 25°C unless otherwise stated.) Characteristic Min Typ Max Unit Small Signal Gain (PIN = – 7.0 dBm) 21 23 — dB Output Power (PIN = 0 dBm) 20 22 — dBm Output Power (PIN = + 4.0 dBm) — 23 — dBm Supply Current, ISS (Pin 9) — 0.3 0.5 mA Supply Current, IDD (Pin 7) — 130 145 mA STANDBY MODE (VRAMP = – 2.4 V) Min Typ Max Unit Output Power Characteristic — – 25 — dBm Supply Current, ISS (Pin 9) — 0.4 0.6 mA R1 1K V RAMP 1 16 20K 2 N/C 3 LOGIC XLATOR RF IN 50 OHM C9 1.5 pF R2 2.2 C3 330 pF 14 VSS T2 (FR4) Zo = 100 L = 8.5 mm 15 RAMP VDD 4 13 5 12 6 11 C4 22 pF C6 C5 1.5 pF 22 pF VDD 7 C7 4700 pF T1 (FR4) Zo = 100 L = 20 mm RF OUT 50 OHM 10 GATE BIAS 8 VSS – 2.5 V 9 PCNTRL 1.4 V TYP Figure 3. 1.9 GHz General Application Circuit Details (Internal Translator Disabled) Table 1. Small Signal S – Parameters ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ ÁÁÁÁÁ ÁÁÁÁ (VDD = 3.5 V, IDQ = 120 mA, TA = 25°C, no matching circuit, reference plane at pins 6 and 11.) S11 S21 S12 S22 Freq (GHz) Mag Angle Mag Angle Mag Angle Mag Angle 1.5 0.734 – 76.8 13.11 – 87.9 0.009 – 176 0.278 – 98.9 1.6 0.654 – 82.4 13.01 – 109.4 0.012 178 0.326 – 116.4 1.7 0.620 – 72.6 11.17 – 117.4 0.011 152 0.344 – 109.8 1.8 0.636 – 79.8 12.25 – 137.0 0.014 170 0.423 – 134.1 1.9 0.607 – 80.6 10.77 – 151.3 0.017 169 0.421 – 147.7 2.0 0.592 – 79.4 10.88 – 165.1 0.019 163 0.427 – 161.8 2.1 0.581 – 79.4 9.64 – 174.9 0.024 163 0.432 – 172.3 2.2 0.571 – 78.9 9.30 174.1 0.026 158 0.429 178.8 2.3 0.560 – 79.1 7.95 166.9 0.029 157 0.432 171.1 2.4 0.541 – 79.8 7.80 155.7 0.033 153 0.442 164.6 2.5 0.521 – 80.1 6.90 147.2 0.042 154 0.445 161.7 MRFIC1806 4 MOTOROLA DESIGN AND APPLICATIONS INFORMATION DESIGN PHILOSOPHY The MRFIC1806 is designed to drive the MRFIC1807 Power Amplifier and Transmit/Receive Switch IC in Personal Communications System (PCS) applications such as Europe’s DECT and Japan’s Personal Handy System (PHS). The design incorporates not only a two–stage GaAs MESFET driver/exciter amplifier, but also externally controllable bias and ramping circuitry. The IC is designed to drive the MRFIC1807 with about +19 dBm which will, in turn, produce +26 dBm output, suitable for DECT. To reduce chip size (and cost) and to allow for flexibility of application, the amplifier has limited on–chip matching. The ramp circuitry is used to shape the drain voltage to the FETs for Time Domain Multiple Access (TDMA) applications and is comprised of a depletion mode pass device driven by a logic translator. Attack and release times are controllable through the use of external components. The IC is configured such that all, part or none of the ramping circuitry can be used, depending on the application. AMPLIFIER CIRCUIT APPLICATION As can be seen in Figures 2 and 3, the off–chip matching is straight forward. At frequencies near 1.9 GHz, the input requires 4.7 nH in series and 1.5 pF in shunt. The 4.7 nH series inductance may be implemented with a high– impedance transmission line as shown. The output, being close to 25 Ω, requires only a shunt 1.5 pF capacitor. Drain voltage for stage 1 is supplied through pin 14 and for stage 2 through pin 11, the RF output. Pin 8, PCNTRL is used to set the quiescent bias point for both stages. While nominal IDDQ is 120 mA, it can be set as high as 180 mA for better linearity or lower for better efficiency. 120 mA is a good compromise for DECT and PHS. DECT, which employs GMSK constant envelope modulation can use RF amplifiers close to or in saturation without experiencing spectral regrowth of the signal. PHS, on the other hand, employs π/4 DQPSK modulation which has some residual AM associated with the encoding. With AM present, RF amplifiers must be backed off from saturation so as not to regrow the filtered sidebands. The MRFIC1806 has plenty of backoff capability for PHS where the MRFIC1807 PA/switch must only produce about +21 dBm. With the 8.0 dB gain of the MRFIC1807, the MRFIC1806 need only produce +13 dBm output so the bias point can be reduced below the 120 mA suggested for DECT. MOTOROLA As with all RF circuits, board layout and grounding are important. All RF signal paths must be controlled impedance structures. RF chip components must be high quality. Bypassing capacitors must be close to the IC and to ground vias. Pins which are designated as ground connections must be as close as possible to ground vias. RAMPING CIRCUIT OPTIONS The on–chip ramp circuit can be used to control the amplifier attack and release time for DECT applications through the use of a few external components as shown in Figure 2. This ramping is required to control the burst signal rise and fall time to avoid adjacent channel interference. At the same time, system specifications require the transmitter to reach full power in a minimum time. For DECT, it has been shown that a rise time of not greater than 2 microseconds will produce acceptable adjacent channel performance. The system requires full power in not greater than 10 microseconds. A good compromise, and the timing implemented in Figure 2, is 7 microseconds. The on–chip logic translator can be bypassed as shown in Figure 3 by applying a ramp voltage to Pin 1 through a 1.0 kΩ resistor. This configuration allows flexibility in ramping the amplifier. The regulated VDD voltage is not required so current consumption can be reduced. – 2.3 V at Pin 1 turns the pass transistor, and the amplifier, off while a positive voltage will turn the pass transistor on. For full on state it is recommended that VRAMP be close to VDD. VRAMP can also be used to on–off key the amplifier for simple telemetry applications or as transmit/receive control. For more complex modulation schemes such as π/4 DQPSK used in PHS, burst ramping can be implemented with the burst mode logic. Referring to Figure 3, the VRAMP voltage should be set to VDD to leave the pass transistor on. The on–chip pass transistor can also be bypassed and VDD applied to Pins 11 and 14. EVALUATION BOARDS Evaluation boards are available for RF Monolithic Integrated Circuits by adding a “TF” suffix to the device type. For a complete list of currently available boards and ones in development for newly introduced product, please contact your local Motorola Distributor or Sales Office. MRFIC1806 5 22 21 20 OUTPUT POWER (dBm) OUTPUT POWER (dBm) 21 19 –10°C 18 25°C 17 TA = 70°C 16 15 Pin = –3 dBm VDD = 3.5 V IDDQ = 120 mA 14 1.5 20 19 18 1.7 1.9 2.1 FREQUENCY (GHz) 2.3 Figure 4. Output Power versus Frequency With Internal Logic Translator 2.3 5V 3.5 V 19 2.5 Pin = 0 dBm TA = 25°C PCNTRL = 1.5 V 22 3.5 V OUTPUT POWER (dBm) OUTPUT POWER (dBm) 1.9 2.1 FREQUENCY (GHZ) 23 5.0 V 18 VDD = 3.0 V 17 16 Pin = – 3 dBm TA = 25°C PCNTRL = 1.5 V 14 1.5 1.7 21 VDD = 3 V 20 19 1.9 2.1 FREQUENCY (GHz) 2.3 18 1.5 2.5 Figure 6. Output Power versus Frequency With Internal Logic Translator 1.7 1.9 2.1 FREQUENCY (GHz) 2.3 2.5 Figure 7. Output Power versus Frequency Without Internal Translator 25 22 18 1.5 V OUTPUT POWER (dBm) OUTPUT POWER (dBm) 1.7 Figure 5. Output Power versus Frequency Without Internal Logic Translator 20 15 TA = 70°C Pin = 0 dBm VDD = 3.5 V IDDQ = 120 mA 17 1.5 2.5 –10°C 25°C 14 1.0 V 10 6 2 PCNTRL = 0.5 V 12 –10 –8 –2 –6 –4 INPUT POWER (dBm) VDD = 3.5 V f = 1.9 GHz TA = 25°C 0 Figure 8. Output Power versus Input Power With Internal Logic Translator MRFIC1806 6 20 15 2.0 V 1.0 V 10 PCNTRL = 0.5 V VDD = 3.5 V f = 1.9 GHz TA = 25°C 5 2 0 –10 –5 0 INPUT POWER (dBm) 5 Figure 9. Output Power versus Input Power Without Internal Logic Translator MOTOROLA 24 22 22 –10°C OUTPUT POWER (dBm) OUTPUT POWER (dBm) 20 70°C 18 16 TA = 25°C 14 12 –10 –8 f = 1.9 GHz VDD = 3.5 V IDDQ = 120 mA –2 –6 –4 INPUT POWER (dBm) 0 –10°C 20 70°C 18 16 12 –10 2 Figure 10. Output Power versus Input Power With Internal Logic Translator f = 1.9 GHz VDD = 3.5 V IDDQ = 120 mA TA = 25°C 14 –5 0 INPUT POWER (dBm) 5 Figure 11. Output Power versus Input Power Without Internal Logic Translator 22 26 5.0 V 5.0 V 24 VDD = 3.0 V OUTPUT POWER (dBm) OUTPUT POWER (dBm) 20 18 3.5 V 16 f = 1.9 GHz TA = 25°C PCNTRL = 1.5 14 12 –10 –8 –6 –4 –2 INPUT POWER (dBm) 0 22 3V 20 18 16 12 –10 2 –5 0 INPUT POWER (dBm) 5 Figure 13. Output Power versus Input Power Without Internal Logic Translator 150 200 VDD = 3.5 V Pin = –3 dBm IDDQ = 120 mA 180 70°C SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) f = 1.9 GHz TA = 25°C PCNTRL = 1.5 V 14 Figure 12. Output Power versus Input Power With Internal Logic Translator 140 VDD = 3.5 V 130 25°C 120 110 TA = 10°C VDD = 3.5 V IDDQ = 120 mA Pin = 0 dBm 160 25°C 90 1.5 1.7 1.9 2.1 FREQUENCY (GHz) 2.3 Figure 14. Supply Current versus Frequency With Internal Logic Translator MOTOROLA 2.5 –10°C 140 –10°C 70°C 120 100 70°C 100 1.5 1.7 1.9 2.1 FREQUENCY (GHz) 2.3 2.5 Figure 15. Supply Current versus Frequency Without Internal Logic Translator MRFIC1806 7 150 210 Pin = –3 dBm TA = 25°C PCNTRL = 1.5 V 130 5V 3.5 V 120 Pin = 0 dBm TA = 25°C PCNTRL = 1.5 V 190 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) 140 110 VDD = 3.0 V 100 170 150 130 VDD = 3.0 V 110 90 1.5 1.7 1.9 2.1 FREQUENCY (GHz) 2.3 90 1.5 2.5 Figure 16. Supply Current versus Frequency With Internal Logic Translator 1.7 1.9 2.1 FREQUENCY (GHz) 2.3 2.5 Figure 17. Supply Current versus Frequency Without Internal Logic Translator 126 150 f = 1.9 GHz VDD = 3.5 V IDDQ = 120 mA 122 25°C 70°C 120 TA = 10°C 118 f = 1.9 GHz VDD = 3.5 V IDDQ = 120 mA 140 OUTPUT POWER (dBm) 124 SUPPLY CURRENT (mA) 3.5 V 5.0 V 116 114 112 TA = 25°C 70°C 130 120 –10°C 110 70°C 110 108 –10 –8 –2 –6 –4 INPUT POWER (dBm) 0 100 –10 2 Figure 18. Supply Current versus Input Power With Internal Translator –2 –4 INPUT POWER (dBm) 0 2 4 170 f = 1.9 GHz TA = 25°C PCNTRL = 1.5 V f = 1.9 GHz PCNTRL = 1.5 V TA = 25°C 160 SUPPLY CURRENT (mA) SUPPLY CURRENT (mA) –6 Figure 19. Supply Current versus Input Power Without Internal Translator 130 125 –8 120 115 5.0 V 110 3.5 V 150 5V 140 3.5 V 130 120 VDD = 3 V 105 110 100 –10 –8 VDD = 3.0 V –6 –4 –2 INPUT POWER (dBm) 0 Figure 20. Supply Current versus Input Power With Internal Translator MRFIC1806 8 2 100 –10 –8 –6 –4 –2 INPUT POWER (dBm) 0 2 4 Figure 21. Supply Current versus Input Power Without Internal Logic Translator MOTOROLA 23 225 f = 1.9 GHz Pin = 0 dBm 21 Pout , OUTPUT POWER (dBm) I DD, SUPPLY CURRENT (mA) 200 175 TA = 25°C 150 125 100 –10°C 70°C 75 17 0.75 1.5 1.25 PCNTRL (Volts) 1 1.75 13 1 1.5 1.25 PCNTRL (Volts) 1.75 2 25 24 –10°C 23 22 SMALL SIGNAL GAIN (dB) SMALL SIGNAL GAIN (dBm) 0.75 Figure 23. Pout versus PCNTRL Without Internal Logic Translator 24 25°C 21 TA = 70°C 20 Pin = 7 dBm VDD = 3.5 V IDDQ = 120 mA 17 1.5 1.7 22 2.3 19 TA = 25°C I DDQ, QUIESCENT SUPPLY CURRENT (mA) 50 Pin = – 3 dBm VDD = 3.5 V IDDQ = 120 mA 45 70°C 40 35 1.5 1.7 1.9 2.1 f, FREQUENCY (GHz) 2.3 Figure 26. Dynamic Range versus Frequency With Internal Logic Translator MOTOROLA Pin = 7 dBm VDD = 3.5 V IDDQ = 120 mA 1.7 1.9 2.1 f, FREQUENCY (GHz) 2.3 2.5 Figure 25. Small signal Gain versus Frequency Without Internal Logic Translator 55 –10°C 25°C 20 17 1.5 2.5 TA = 70°C 21 18 1.9 2.1 f, FREQUENCY (GHz) –10°C 23 Figure 24. Small Signal Gain versus Frequency With Internal Logic Translator RF DYNAMIC RANGE (dB) f = 1.9 GHz Pin = 0 dBm 10°C 9 0.5 2 25 18 25°C 15 Figure 22. Supply Current versus PCNTRL Without Internal Logic Translator 19 70°C 11 50 25 0.5 19 2.5 300 250 f = 1.9 GHz VDD = 3.5 V 200 150 70°C 100 TA = 25°C & –10°C 50 0 0.5 0.75 1 1.25 1.5 PCNTRL (Volts) 1.75 2 Figure 27. Quiescent Supply Current versus PCNTRL With Internal Logic Translator MRFIC1806 9 18 Pout –45 22 –50 20 –55 15 –60 12 –65 600 kHz ACPR 9 CW –70 Pout , OUTPUT POWER (dBm) 21 f = 1.9 GHz VDD = 3.5 V IDDQ = 120 mA TA = 25°C Mod = 384 kb/s π/4 DQPSK ACPR (dBc) Pout , OUTPUT POWER (dBm) 24 Burst 18 16 VDD = 3.5 V Freq = 1.9 GHz IDDQ = 120 mA 14 900 kHz ACPR 6 –10 –8 –6 –4 –2 0 PIN, INPUT POWER (DBM) 2 Figure 28. Output Power and Adjacent Channel Power Ratio versus Input Power Without Internal Logic Translator MRFIC1806 10 4 –75 12 –10 –8 –6 –4 PIN, INPUT POWER (DBM) –2 0 Figure 29. Continuous and Burst Mode Output Power versus Input Power With Internal Logic Translator MOTOROLA PACKAGE DIMENSIONS –A– 16 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 9 –B– 1 P 8 PL 0.25 (0.010) 8 M B S G R K F X 45 _ C –T– SEATING PLANE M D 16 PL 0.25 (0.010) M T B S A S J DIM A B C D F G J K M P R MILLIMETERS MIN MAX 9.80 10.00 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.386 0.393 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.229 0.244 0.010 0.019 CASE 751B–05 ISSUE J MOTOROLA MRFIC1806 11 Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. Mfax is a trademark of Motorola, Inc. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 5405, Denver, Colorado 80217. 303–675–2140 or 1–800–441–2447 JAPAN: Nippon Motorola Ltd.: SPD, Strategic Planning Office, 4–32–1, Nishi–Gotanda, Shinagawa–ku, Tokyo 141, Japan. 81–3–5487–8488 Mfax: [email protected] – TOUCHTONE 602–244–6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, – US & Canada ONLY 1–800–774–1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298 INTERNET: http://motorola.com/sps MRFIC1806 12 ◊ MOTOROLA MRFIC1806/D