MOTOROLA MRFIC1817

Order this document
by MRFIC1817/D
SEMICONDUCTOR TECHNICAL DATA
The MRFIC Line
! Designed specifically for application in Pan European digital 1.0 watt
DCS1800/PCS1900 handheld radios, the MRFIC1817 is specified for 32 dBm
output power with power gain over 27 dB from a 3.6 volt supply. To achieve this
superior performance, Motorola’s planar GaAs MESFET process is employed.
The device is packaged in the PFP–16 Power Flat Package which gives
excellent thermal and electrical performance through a solderable backside
contact while allowing the convenience and cost benefits of reflow soldering.
• Minimum Output Power Capabilities
32 dBm @ 3.6 Volts
30 dBm @ 3.0 Volts
• Typical Volt Characteristics
RF Input Power = 5.0 dBm
RF Output Power = 33.5 dBm
Typical PAE = 42%
• Low Current required from Negative Supply – 2 mA max
• Guaranteed Stability and Ruggedness
• Order MRFIC1817R2 for Tape and Reel.
R2 Suffix = 1,500 Units per 16 mm, 13 inch Reel.
• Device Marking = M1817
1700–1900 MHz MMIC
DCS1800/PCS1900
INTEGRATED POWER AMPLIFIER
GaAs MONOLITHIC
INTEGRATED CIRCUIT
CASE 978–02
(PFP–16)
ABSOLUTE MAXIMUM RATINGS (TA = 25°C, ZO = 50 Ω, unless otherwise noted)
Symbol
Value
Unit
DC Positive Supply Voltage
VD1, 2, 3
6
Vdc
DC Negative Supply Voltage
VSS
–5
Vdc
RF Input Power
Pin
10
dBm
Pout
35
dBm
Rating
RF Output Power
Operating Case Temperature Range
TC
– 35 to +85
°C
Storage Temperature Range
Tstg
–55 to +150
°C
RθJC
10
°C/W
Thermal Resistance, Junction to Case
9
8
VG
VD2 10
7
VD3
VD2 11
6
RF OUT
VD1 12
5
RF OUT
N/C 13
4
RF OUT
GND 14
3
RF OUT
RF IN 15
2
N/C
N/C 16
1
GND
GND
Pin Connections and Functional Block Diagram
MOTOROLA
RF DEVICE DATA

Motorola, Inc. 1997
MRFIC1817
1
RECOMMENDED OPERATING RANGES
Parameter
Symbol
Value
Unit
VD1, 2, 3
2.7 to 5
Vdc
Gate Voltage
VSS
–3.5 to –4.5
Vdc
RF Frequency Range
fRF
1700 to 1900
MHz
RF Input Power
PRF
0 to 6
dBm
Supply Voltage
ELECTRICAL CHARACTERISTICS (VD1, 2, 3 = 3.6 V, VSS = –4 V, Pin = 5 dBm, Peak Measurement at 12.5% Duty Cycle, 4.6 ms
Period, TA = 25°C unless otherwise noted. Measured in Reference Circuit Shown in Figure 1)
Min
Characteristic
Frequency Range
Typ
Max
Unit
1710
—
1785
MHz
Output Power
32
33.5
—
dBm
Power Added Efficiency
35
42
—
%
Output Power (PCS 1900 Tuning f = 1850 to 1910 MHz)
—
33.5
—
dBm
Power Added Efficiency (PCS 1900 Tuning f = 1850 to 1910 MHz)
—
42
—
%
Input VSWR
—
2:1
—
VSWR
Harmonic Output (2nd and 3rd)
—
–35
–30
dBc
Output Power at Low voltage (VD1, VD2, VD3 = 3.0 V)
30
32
—
dBm
Output Power Isolation (VD1, VD2, VD3 = 0 V)
—
–40
–30
dBm
Noise Power (In 100 kHz, 1805 to 1880 MHz)
—
– 85
–80
dBm
Stability – Spurious Output (Pin = 5 dBm, Pout = 0 to 33 dBm, Load
VSWR = 6:1 at any Phase Angle, Source VSWR = 3:1, at any Phase Angle) (1)
—
—
–60
dBc
Load Mismatch stress (Pout = 33 dBm, Load VSWR = 10:1 at
any Phase Angle) (1)
No Degradation in Output Power after Returning to
Standard Conditions
3 dB VDD Bandwidth
—
2
—
MHz
Negative Supply Current
—
0.7
2
mA
(1)
Adjust VD1, 2, 3 (0 to 3.6 V) for specified Pout; Duty Cycle = 12.5%, Period = 4.6 ms.
VD1 VD2
VD3 VSS
R1
T4
8
7
11
6
12
5
13
4
C1
L1
C9 C8
T3
NC
C7 C6
L2
9
10
R2
T2
RF IN
NC
C1
1 nF
C2, C6, C8 22 pF, NPO/COG
C3, C7, C9 47 nF
C4
5.6 pF, AVX0603 ACCUF
C5
3.9 pF, AVX0603 ACCUF
C10, C11 1 pf
C11
14
3
15
2
16
1
L1
L2
R1
R2
T1
C4
C2
C3
T1
T5
RF
OUT
NC
18 nH, Coilcraft or 20 mm
50 Ω Microstrip Line
1.8 nH, Toko 2012
2.7 KW
2.2 KΩ
2.5 mm 50 Ω Microstrip Line
C5
C10
T2
6 mm 50 Ω Microstrip Line
T3
5 mm 40 Ω Microstrip Line
T4
1 mm 40 Ω Microstrip Line
T5
5.5 mm 50 W Microstrip Line
Board Material: Glass/Epoxy, εr = 4.45,
Thickness = 0.5 mm
NOTE: For PCS 1900 tuning the following values are changed.
C5 = 2.7 pF, AVX0603 ACCUF
L2 = 1.5 nH, Toko 2012
T3 = 1 mm 50 Ω Microstrip Line
Figure 1. Reference Circuit Configuration
MRFIC1817
2
MOTOROLA RF DEVICE DATA
Vreg
3.0 V
0V
VBAT
VRAMP
3.0 V
R3
STANDBY
0V
5
D
G
4
6
D
S
3
7
D
S
2
8 D
C15
1
14
Q1
C19
2
13
3
12
4
11
5
10
6
9
7
8
R5
C16
C14
1
C18
C17
R1
CR1
C11
C13
T4
C12
C10
VG TUNE
9
8
10
7
11
6
12
5
13
4
T3
NC
3
14
T2
RF IN
15
NC
2
IN
C2
C21
C3
T5
T1
C9
L2
C1
L1
U2
R4
R2
RF
OUT
C4
NC
C5
C20
1
16
U1
C1
6.8 nF
C2, C9, C10 22 pF, 0603 NPO/COG
C3, C11 47 nF
C4
5.6 pF, AVX0603 ACCUF
C5
3.9 pF, AVX0603 ACCUF
C12
220 nF
C13, C16, C17, C19 1 µF
C14, C15 1 µF
C18
1 µF
C20, C21
1 pF
CR1
MMBD701LT1
L1
18 nH, Coilcraft or 20 mm
50 Ω Microstrip Line
L2
1.8 nH, Toko 2012
Q1
MMSF4N01HD
R1
2.7 KW
R2
3 KΩ
R3
22 Ω
R4
100 Ω
R5
470 Ω
T1
0.5 mm 30 Ω Microstrip Line
T2
5 mm 50 Ω Microstrip Line
T3
8 mm 50 Ω Microstrip Line
T4
1 mm 50 Ω Microstrip Line
T5
5.5 mm 50 W Microstrip Line
U1
MRFIC1817
U2
MC33169 (–4 V Version)
Board Material: Glass/Epoxy, εr = 4.45,
Thickness = 0.5 mm
NOTE: For PCS1900 applications, the following
component values are changed
L2 = 1.5 nH Toko 2012
C4 = 6.8 pF, AVX0603 ACCUF
C5 = 2.7 pF, AVX0603 ACCUF
C20 = Not Used
T1 = 0.5 mm 50 W Microstrip Line
T2 = 5 mm 50 W Microstrip Line
T3 = 1 mm 40 Microstrip Line
Figure 2. DCS1800/PCS1900 Applications Circuit Configuration
MOTOROLA RF DEVICE DATA
MRFIC1817
3
Typical Characteristics
48
PAE, POWER ADDED EFFICIENCY (%)
Pout , OUTPUT POWER (dBm)
33
TA = –35°C
32.5
32
25°C
31.5
85°C
31
30.5
Pin = 5 dBm
VD1, VD2, VD3 = 3 V
VSS = –4 V
30
1.7
1.72
1.74
1.76
f, FREQUENCY (GHz)
1.78
TA = –35°C
46
25°C
44
42
85°C
40
Pin = 5 dBm
VD1, VD2, VD3 = 3.6 V
VSS = –4 V
38
36
1.7
1.8
Figure 3. Output Power versus Frequency
1.78
1.8
46
PAE, POWER ADDED EFFICIENCY (%)
Pout , OUTPUT POWER (dBm)
1.74
1.76
f, FREQUENCY (GHz)
Figure 4. Power Added Efficiency
versus Frequency
35
34.5
TA = –35°C
34
25°C
33.5
85°C
33
32.5
1.72
Pin = 5 dBm
VD1, VD2, VD3 = 3.6 V
VSS = –4 V
32
1.7
1.72
1.74
1.76
f, FREQUENCY (GHz)
1.78
VD1, VD2, VD3 = 4.2 V
45
44
3.6 V
43
3V
42
41
Pin = 5 dBm
TA = 25°C
VSS = –4 V
40
39
1.7
1.8
Figure 5. Output Power versus Frequency
1.72
1.74
1.76
f, FREQUENCY (GHz)
1.78
1.8
Figure 6. Power Added Efficiency
versus Frequency
40
36
Pout , OUTPUT POWER (dBm)
Pout , OUTPUT POWER (dBm)
30 TA = –35°C
35.5
TA = –35°C
35
25°C
34.5
85°C
34
33.5
Pin = 5 dBm
VD1, VD2, VD3 = 4.2 V
VSS = –4 V
20
10
25°C AND 85°C
0
–10
–20
–30
f = 1.75 GHz
Pin = 5 dBm
VSS = –4 V
–40
–50
–60
33
1.7
1.72
1.74
1.76
f, FREQUENCY (GHz)
1.78
Figure 7. Output Power versus Frequency
MRFIC1817
4
1.8
0
1
2
3
4
VD1, VD2, VD3, DRAIN VOLTAGE (VOLTS)
Figure 8. Output Power versus Drain Voltage
MOTOROLA RF DEVICE DATA
5
Typical Characteristics
35
33
50
Pout , OUTPUT POWER (dBm)
PAE, POWER ADDED EFFICIENCY (%)
60
TA = –35°C
40
30
25°C
20
85°C
f = 1.75 GHz
Pin = 5 dBm
VSS = –4 V
10
29
27
2
1
3
4
VD1, VD2, VD3, DRAIN VOLTAGE (VOLTS)
25°C
25
23
85°C
21
f = 1.75 GHz
VD1, VD2, VD3 = 3.6 V
VSS = –4 V
19
17
15
–20
0
0
TA = –35°C
31
5
50
–20
45
–25
40
TA = –35°C
35
30
25°C
25
20
15
85°C
10
5
0
–20
–15
f = 1.75 GHz
VD1, VD2, VD3 = 3.6 V
VSS = –4 V
5
–10
–5
0
Pin, INPUT POWER (dBm)
10
f = 1.75 GHz
Pin = 5 dBm
VSS = –4 V
–30
–35
–40
–45
TA = –35°C
–50
85°C
–55
–60
10
25°C
0
Figure 11. Power Added Efficiency versus
Input Power
1
3
2
4
VD1, VD2, VD3, DRAIN VOLTAGE (VOLTS)
5
Figure 12. Second Harmonic versus
Drain Voltage
35
0
f = 1.75 GHz
Pin = 5 dBm
VSS = –4 V
–10
34.5
Pout , OUTPUT POWER (dBm)
–5
H3 , THIRD HARMONIC (dBc)
5
–10
–5
0
Pin, INPUT POWER (dBm)
Figure 10. Output Power versus Input Power
H2 , SECOND HARMONIC (dBc)
PAE, POWER ADDED EFFICIENCY (%)
Figure 9. Power Added Efficiency versus
Drain Voltage
–15
–15
–20
–25
TA = –35°C
25°C
–30
85°C
–35
TA = –35°C
34
33.5
25°C
33
85°C
32.5
32
Pin = 5 dBm
VD1, VD2, VD3 = 3.6 V
VSS = –4 V
31.5
–40
0
2
4
1
3
VD1, VD2, VD3, DRAIN VOLTAGE (VOLTS)
Figure 13. Third Harmonic versus
Drain Voltage
MOTOROLA RF DEVICE DATA
5
31
1.85
1.86
1.88
1.89
1.87
f, FREQUENCY (GHz)
1.9
1.91
Figure 14. Output Power versus
Frequency – PCS Band
MRFIC1817
5
Typical Characteristics
PAE, POWER ADDED EFFICIENCY (%)
48
46
TA = –35°C
44
42
25°C
40
85°C
38
36
Pin = 5 dBm
VD1, VD2, VD3 = 3.6 V
VSS = –4 V
34
32
1.85
1.86
1.87
1.88
1.89
f, FREQUENCY (GHz)
1.9
1.91
Figure 15. Power Added Efficiency versus
Frequency – PCS Band
Table 1. Optimum Loads Derived from
Circuit Characterization
Zin
OHMS
ZOL*
OHMS
f
MHz
R
jX
R
jX
1710
1720
1730
1740
1750
1760
1770
1780
1785
7.77
7.84
7.87
8.07
8.24
8.39
8.44
8.52
8.57
–34.15
–34.37
–34.67
–34.79
–35.05
–35.22
–35.56
–35.79
–35.82
4.89
4.87
4.86
4.78
4.77
4.73
4.70
4.67
4.65
9.50
9.34
9.18
8.94
8.70
8.51
8.32
8.12
7.95
Zin represents the input impedance of the device.
ZOL* represents the conjugate of the optimum output load to present
to the device.
MRFIC1817
6
Table 2. Optimum Loads Derived from
Circuit Characterization – PCS Band
Zin
OHMS
ZOL*
OHMS
f
MHz
R
jX
R
jX
1850
1860
1870
1880
1890
1900
1910
3.97
3.94
4.09
4.04
4.18
4.27
4.26
–39.68
–40.31
–40.65
–40.92
–41.21
–41.48
–41.71
7.49
7.42
7.38
7.31
7.28
7.28
7.23
3.07
2.81
2.51
2.28
2.02
1.73
1.56
Zin represents the input impedance of the device.
ZOL* represents the conjugate of the optimum output load to present
to the device.
MOTOROLA RF DEVICE DATA
APPLICATIONS INFORMATION
Design Philosophy
The MRFIC1817 is a 3–stage integrated power amplifier
designed for use in cellular phones, especially for those used
in DCS1800 (PCN) 3.6 V operation. With matching circuit
modifications, it is also applicable for use in DCS1900 (PCS)
equipment. Due to the fact that the input, output and some of
the interstage matching is accomplished off–chip, the device
can be tuned to operate anywhere within the 1500 to 2000
MHz frequency range. Typical performance at different battery
voltages is:
• 33.5 dBm @ 3.6 V
• 32.0 dBm @ 3 V
This capability makes the MRFIC1817 suitable for portable
cellular applications such as:
• 3 V and 3.6 V DCS1800 Class I and II
• 3 V and 3.6 V PCS tag5
RF Circuit Considerations
The MRFIC1817 can be tuned by changing the values
and/or positions of the appropriate external components.
Refer to Figure 2, a typical DCS1800 Class I applications
circuit. The input match is a shunt–L, series–C, high–pass
structure and can be retuned as desired with the only
limitation being the on–chip 6 pF blocking capacitor. For
saturated applications such as DCS1800 and PCS1900, the
input match should be optimized at the rated RF input power.
Interstage matching can be optimized by changing the value
and/or position of the decoupling capacitor on the VD1 and
VD2 supply lines. Moving the capacitor closer to the device or
reducing the value increases the frequency of resonance
with the inductance of the device’s wirebonds and leadframe
pin. Output matching is accomplished with a low–pass
network as a compromise between bandwidth and harmonic
rejection. Implementation is through high Q capacitors
mounted along a 50 W microstrip transmission line. Values
and positions are chosen to present a 2 W loadline to the
device while conjugating the device output parasitics. The
network must also properly terminate the second and third
harmonics to optimize efficiency and reduce harmonic
output. All components used in this application are low–Q
commercial chip capacitors, except for the output load line.
Loss in circuit traces must also be considered. The output
transmission line and the bias supply lines should be at least
0.6 mm in width to accommodate the peak circulating
currents which can be as high as 2 amperes under worst
case conditions. The bias supply line which supplies the
output should include an RF choke of at least 18 nH, surface
mount solenoid inductors or quarter wave microstrip lines.
Discrete inductors will usually give better efficiency and
conserve board space.
Biasing Considerations
Gate bias lines are tied together and connected to the VSS
voltage, allowing gate biasing through use of external
resistors or positive voltages. This allows setting the
quiescent current of all stage in the same time while saving
some board space. For applications where the amplifier is
operated close to saturation, such as with TDMA amplifiers,
the gate bias can be set with resistors. Variations in process
MOTOROLA RF DEVICE DATA
and tempera–ture will not affect amplifier performance
significantly in these applications. The values shown in the
Figure 1 will set quiescent currents of 20 to 40 mA for the first
stage, 150 to 300 mA for the second stage, and 400 to 800
mA for the final stage. For linear modes of operation which
are required for CDMA amplifiers, the quiescent current must
be more carefully controlled. For these applications, the VG
pins can be referenced to some tunable voltage which is set
at the time of radio manufacturing. Less than 1 mA is
required in the divider network so a DAC can be used as the
voltage source.
Power Control Using the MC33169
The MC33169 is a dedicated GaAs power amplifier
support IC which provides the –4 V required for V SS, an
N–MOS drain switch interface and driver and power supply
sequencing. The MC33169 can be used for power control in
applications where the amplifier is operated in saturation
since the output power in non–linear operation is proportional
to VD2. This provides a very linear and repeatable power
control transfer function. This technique can be used open
loop to achieve 40–45 dB dynamic range over process and
temperature variation. With careful design and selection of
calibration points, this technique can be used for DCS1800
control where 30 dB dynamic range is required, eliminating
the need for the complexity and cost of closed–loop control.
The transmit waveform ramping function required for
systems such as DCS1800 can be implemented with a
simple Sallen and Key filter on the MC33169 control loop.
The amplifier is then ramped on as the VRAMP pin is taken
from 0 V to 3 V. To implement the different power steps
required for DCS1800, the VRAMP pin is ramped between 0 V
and the appropriate voltage between 0 V and 3 V for the
desired output power. For closed–loop configurations using
the MC33169, MMSF4N01HD N–MOS switch and the
MRFIC1817 provide a typical 1 MHz 3 dB loop bandwidth.
The STANDBY pin must be enabled (3 V) at least 800 µs
before the VRAMP pin goes high and disabled (0 V) at least 20
ms before the VRAMP pin goes low. This STANDBY function
allows for the enabling of the MC33169 one burst before the
active burst thus reducing power consumption.
Conclusion
The MRFIC1817 offers the flexibility in matching circuitry
and gate biasing required for portable cellular applications.
Together with the MC33169 support IC, the device offers an
efficient system solution for TDMA applications such as
DCS1800 where saturated amplifier operation is used.
For more information about the power control using the
MC33169, refer to application note AN1599, “Power Control
with the MRFIC0913 GaAs Integrated Power Amplifier and
MC33169 Support IC.”
Evaluation Boards
Two versions of the MRFIC1817 evaluation board are
available. Order MRFIC1817DCSTF for the 1.8 GHz version
and order MRFIC1817PCSTF for the 1.9 GHz version. For a
complete list of currently available boards and ones in
development for newly introduced product, please contact
your local Motorola Distributor or Sales Office.
MRFIC1817
7
PACKAGE DIMENSIONS
h X 45 _
A
E2
1
14 x e
16
D
e/2
D1
8
9
E1
8X
bbb
M
B
BOTTOM VIEW
E
C B
S
H
ÉÉ
ÇÇ
ÇÇ
ÉÉ
b1
DATUM
PLANE
c
A A2
c1
b
aaa
DETAIL Y
SEATING
PLANE
q
ccc C
W
GAUGE
PLANE
W
L
C A
SECT W–W
L1
C
M
S
NOTES:
1. CONTROLLING DIMENSION: MILLIMETER.
2. DIMENSIONS AND TOLERANCES PER ASME
Y14.5M, 1994.
3. DATUM PLANE –H– IS LOCATED AT BOTTOM OF
LEAD AND IS COINCIDENT WITH THE LEAD
WHERE THE LEAD EXITS THE PLASTIC BODY AT
THE BOTTOM OF THE PARTING LINE.
4. DIMENSIONS D AND E1 DO NOT INCLUDE MOLD
PROTRUSION. ALLOWABLE PROTRUSION IS
0.250 PER SIDE. DIMENSIONS D AND E1 DO
INCLUDE MOLD MISMATCH AND ARE
DETERMINED AT DATUM PLANE –H–.
5. DIMENSION b DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION IS 0.127 TOTAL IN EXCESS OF THE
b DIMENSION AT MAXIMUM MATERIAL
CONDITION.
6. DATUMS –A– AND –B– TO BE DETERMINED AT
DATUM PLANE –H–.
DIM
A
A1
A2
D
D1
E
E1
E2
L
L1
b
b1
c
c1
e
h
q
aaa
bbb
ccc
A1
MILLIMETERS
MIN
MAX
2.000
2.350
0.025
0.152
1.950
2.100
6.950
7.100
4.372
5.180
8.850
9.150
6.950
7.100
4.372
5.180
0.466
0.720
0.250 BSC
0.300
0.432
0.300
0.375
0.180
0.279
0.180
0.230
0.800 BSC
–––
0.600
0_
7_
0.200
0.200
0.100
1.000
0.039
DETAIL Y
CASE 978–02
ISSUE A
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the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
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Mfax: [email protected] – TOUCHTONE 1–602–244–6609
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
Motorola Fax Back System
– US & Canada ONLY 1–800–774–1848 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
– http://sps.motorola.com/mfax/
HOME PAGE: http://motorola.com/sps/
MRFIC1817
8
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MRFIC1817/D
MOTOROLA RF DEVICE
DATA