Revised April 1999 74VHC273 Octal D-Type Flip-Flop General Description The VHC273 is an advanced high speed CMOS Octal Dtype flip-flop fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The register has a common buffered Clock (CP) which is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop’s Q output. The Master Reset (MR) input will clear all flip-flops simultaneously. All outputs will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. An input protection circuit insures that 0V to 7V can be applied to the inputs pins without regard to the supply volt- age. This device can be used to interface 5V to 3V systems and two supply systems such as battery backup. This circuit prevents device destruction due to mismatched supply and input voltages. Features ■ High Speed: fMAX= 165 MHz (typ) at VCC = 5V ■ Low power dissipation: ICC = 4 µA (max) at TA = 25°C ■ High noise immunity: VNIH = VNIL = 28% VCC (min) ■ Power down protection is provided on all inputs ■ Low noise: VOLP = 0.9V (max) ■ Pin and function compatible with 74HC273 Ordering Code: Order Number 74VHC273M 74VHC273SJ 74VHC273MTC Package Number M20B M20D MTC20 74VHC273N N20A Package Description 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbols Connection Diagram IEEE/IEC Pin Descriptions Pin Names D0–D7 © 1999 Fairchild Semiconductor Corporation DS011670.prf Description Data Inputs MR Master Reset CP Clock Pulse Input Q0–Q7 Data Outputs www.fairchildsemi.com 74VHC273 Octal D-Type Flip-Flop April 1994 74VHC273 Function Table Operating Mode Inputs MR CP Reset (Clear) L Load ’1’ H Load ’0’ H X H = HIGH Voltage Level L = LOW Voltage Level X = Immaterial = LOW-to-HIGH Transition Outputs Dn Qn X L H H L L Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. www.fairchildsemi.com 2 Supply Voltage (VCC) −0.5V to +7.0V DC Input Voltage (VIN) −0.5V to +7.0V Recommended Operating Conditions (Note 2) 2.0V to +5.5V Supply Voltage (VCC) −0.5V to VCC + 0.5V DC Output Voltage (VOUT) 0V to +5.5V Input Voltage (VIN) Input Diode Current (IIK) −20 mA Output Voltage (VOUT) Output Diode Current (IOK) ±20 mA Operating Temperature (TOPR) DC Output Current (IOUT) ±25 mA Input Rise and Fall Time (tr, tf) DC VCC /GND Current (ICC ) ±75 mA VCC = 3.3V ± 0.3V 0 ns/V ∼ 100 ns/V −65°C to +150°C VCC = 5.0V ± 0.5V 0 ns/V ∼ 20 ns/V Storage Temperature (TSTG) Lead Temperature (TL) (Soldering, 10 seconds) 0V to VCC −40°C to +85°C Note 1: Absolute Maximum Ratings are values beyond which the device may be damaged or have its useful life impaired. The databook specifications should be met, without exception, to ensure that the system design is reliable over its power supply, temperature, and output/input loading variables. Fairchild does not recommend operation outside databook specifications. 260°C Note 2: Unused inputs must be held HIGH or LOW. They may not float. DC Electrical Characteristics Symbol VIH VCC (V) Parameter HIGH Level Input Voltage VIL VOH VOL IIN Typ TA = −40°C to +85°C Max Min 2.0 1.50 1.50 3.0 − 5.5 0.7 VCC 0.7 VCC LOW Level Input Voltage TA = 25°C Min Max 2.0 0.50 0.50 0.3 VCC 0.3 VCC 2.0 1.9 2.0 1.9 Voltage 3.0 2.9 3.0 2.9 4.5 4.4 4.5 4.4 3.0 2.58 2.48 4.5 3.94 3.80 VIN = VIH IOH = −50 µA 2.0 Voltage 3.0 0.0 0.1 0.1 4.5 0.0 0.1 0.1 0.1 IOH = −4 mA 3.0 0.36 0.44 0.36 0.44 0 − 5.5 ±0.1 ±1.0 5.5 4.0 40.0 Current IOH = −8 mA VIN = VIH IOL = 50 µA 0.1 4.5 Quiescent Supply or VIL V Current ICC V V LOW Level Output Input Leakage 0.0 Conditions V 3.0 − 5.5 HIGH Level Output Units V V µA µA or VIL IOL = 4 mA IOL = 8 mA VIN = 5.5V or GND VIN = VCC or GND Noise Characteristics Symbol VOLP TA = 25°C VCC (V) Typ Limits Quiet Output Maximum Dynamic VOL 5.0 0.6 0.9 Quiet Output Minimum Dynamic VOL 5.0 −0.6 −0.9 Minimum HIGH Level Dynamic Input Voltage 5.0 3.5 Maximum LOW Level Dynamic Input Voltage 5.0 1.5 Parameter (Note 3) VOLV (Note 3) VIHD (Note 3) VILD (Note 3) Units V V V V Conditions CL = 50 pF CL = 50 pF CL = 50 pF CL = 50 pF Note 3: Parameter guaranteed by design. 3 www.fairchildsemi.com 74VHC273 Absolute Maximum Ratings(Note 1) 74VHC273 AC Electrical Characteristics Symbol fMAX Maximum Clock Typ 3.3 ± 0.3 75 120 65 50 75 45 120 165 100 80 110 5.0 ± 0.5 Propagation Delay tPHL Time (CK - Q) 3.3 ± 0.3 5.0 ± 0.5 tPHL 3.3 ± 0.3 Propagation Delay TA = −40°C to +85°C Min Frequency tPLH TA = 25°C VCC (V) Parameter Time (MR - Q) 5.0 ± 0.5 Max Min Max Units Conditions CL = 15 pF MHz CL = 50 pF CL = 15 pF MHz 70 8.7 13.6 1.0 16.0 11.2 17.1 1.0 19.5 5.8 9.0 1.0 10.5 7.3 11.0 1.0 12.5 8.9 13.6 1.0 16.0 11.4 17.1 1.0 19.5 5.2 8.5 1.0 10.0 6.7 10.5 1.0 12.0 tOSLH Output to 3.3 ± 0.3 1.5 1.5 tOSHL Output Skew 5.0 ± 0.5 1.0 1.0 CIN Input Capacitance 4 10 10 CPD Power Dissipation 31 ns CL = 50 pF CL = 15 pF ns CL = 50 pF CL = 15 pF ns CL = 50 pF CL = 15 pF ns ns pF pF Capacitance CL = 50 pF CL = 15 pF CL = 50 pF (Note 4) CL = 50 pF CL = 50 pF VCC = Open (Note 5) Note 4: Parameter guaranteed by design tOSLH = |tPLHmax − tPLHmin|; tOSHL = |tPHLmax − tPHLmin|. Note 5: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained from the equation: ICC (opr.) = CPD * VCC * fIN + ICC/8 (per F/F). The total CPD when n pieces of the Flip Flop operates can be calculated by the equation: CPD (total) = 22 + 9n. AC Operating Requirements Symbol tW(L) Parameter Minimum Pulse Width (CK) tW(H) tW(L) tS tH tREC Minimum Pulse Width (MR) Minimum Setup Time Minimum Hold Time Minimum Removal Time (MR) VCC (V) (Note 6) Typ TA = −40°C to +85°C Guaranteed Minimum 3.3 5.5 6.5 5.0 5.0 5.0 3.3 5.0 6.0 5.0 5.0 5.0 3.3 5.5 6.5 5.0 4.5 4.5 3.3 1.0 1.0 5.0 1.0 1.0 3.3 2.5 2.5 5.0 2.0 2.0 Units ns ns Note 6: VCC is 3.3 ± 0.3V or 5.0 ± 0.5V www.fairchildsemi.com TA = 25°C 4 ns ns ns 74VHC273 Physical Dimensions inches (millimeters) unless otherwise noted 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M20B 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Package Number M20D 5 www.fairchildsemi.com 74VHC273 Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC20 www.fairchildsemi.com 6 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Package Number N20A LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component in any component of a life support 1. Life support devices or systems are devices or systems device or system whose failure to perform can be reawhich, (a) are intended for surgical implant into the sonably expected to cause the failure of the life support body, or (b) support or sustain life, and (c) whose failure device or system, or to affect its safety or effectiveness. to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the www.fairchildsemi.com user. Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. 74VHC273 Octal D-Type Flip-Flop Physical Dimensions inches (millimeters) unless otherwise noted (Continued)