19-2265; Rev 0; 12/01 MAX3670 Evaluation Kit Features ♦ Fully Assembled and Tested ♦ 5.0V Operation Ordering Information Component Suppliers SUPPLIER PHONE FAX AVX 843-448-9411 843-448-1943 Coilcraft 408-224-8566 408-224-6304 Murata 770-436-1300 770-436-3030 Vectron 1-88-VECTRON-1 1-888-PAX-VECTRON PART TEMP RANGE IC PACKAGE MAX3670EVKIT -40°C to +85°C 32 QFN-EP* *Exposed pad Electrical Component List DESIGNATION QTY DESCRIPTION DESIGNATION QTY C1, C4–C9, C12, C15, C16, C20, C22, C31–C35 17 0.1µF ±10% ceramic capacitors (0402) R1, R11, R12, R13, R18–R21, R23, R24, R26, R27, R29, R31 0 C1A, C1B 2 0.015µF ±10% ceramic capacitors (0805) C2, C3, C3A, C10, C11, C14, C19, C21, C23–C27, C29, C30 0 C3B 1 6800pF ±10% ceramic capacitor (0805) C13 1 1µF ±10% ceramic capacitor (0805) C17 1 10µF ±10% tantalum capacitor J1–J8, J11 9 SMA connectors (edge-mount) J9, J10, J12, J15, J16 0 Open DESCRIPTION Open R1A, R1B 2 200kΩ ±1% resistors (0402) R2 1 100Ω ±1% resistor (0402) R3, R4, R6, R8, R10, R16, R17 7 332Ω ±1% resistors (0402) R5, R7, R9, R14, R15, R22, R28, R30, R32 9 0Ω resistors (0402) U1 1 MAX3670EGJ 32 QFN-EP Y1 1 622.08MHz voltage-controlled SAW oscillator Vectron VS500A622 None 1 MAX3670 EV kit circuit board Open J13, J14 2 Test points JU1–JU5, JU7–JU10 9 1 × 3-pin headers JU1–JU13 13 Shunts JU6, JU11, JU12, JU13 4 1 × 2-pin headers L1, L3, L4 0 Open L2 1 56nH inductor None 1 MAX3670 EV kit data sheet None 1 MAX3670 data sheet ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 Evaluates: MAX3670 General Description The MAX3670 evaluation kit (EV kit) is an assembled, surface-mount demonstration board that provides easy evaluation of the MAX3670 155MHz to 670MHz reference clock generator. The EV kit comes with external components and a 622.08MHz voltage-controlled crystal oscillator (VCXO). Evaluates: MAX3670 MAX3670 Evaluation Kit Quick Start 6) Connect ground to GND. 1) Install shunts JU1, JU4, JU5, JU7, and JU10 between pins 1 and 2. 7) Apply a 1VP-P differential clock input at 622.08MHz to REFCLK+ and REFCLK-. 2) Install shunts JU11, JU12, and JU13. 8) Monitor MOUT+ and MOUT- with a 50Ω system. A 622.08MHz clock signal appears on the oscilloscope. 3) Open shunts JU3 and JU6. 4) Install shunts JU2, JU8, and JU9 between pins 2 and 3. 5) Connect a 5V power supply to VCCA. Adjustment and Control Descriptions* COMPONENT NAME FUNCTION JU1 GSEL1 Sets the phase-detector gain (KPD) and the frequency divider ratio (N2). Shunting between pins 1 and 2 sets to GND. Shunting between pins 2 and 3 sets to VCC (see Table 1). JU2 GSEL2 Sets the phase-detector gain (KPD) and the frequency divider ratio (N2). Shunting between pins 1 and 2 sets to GND. Shunting between pins 2 and 3 sets to VCC (see Table 1). JU3 GSEL3 Sets the phase-detector gain (KPD) and the frequency divider ratio (N2). Shunting between pins 1 and 2 sets to GND. Shunting between pins 2 and 3 sets to VCC (see Table 1). JU4 RSEL Sets the predivider ratio for the reference input clock. Shunting between pins 1 and 2 sets to GND. Shunting between pins 2 and 3 sets to VCC (see Table 2). JU5 VSEL Sets the predivider ratio for the VCO input clock. Shunting between pins 1 and 2 sets to GND. Shunting between pins 2 and 3 sets to VCC (see Table 3). JU6 — JU7 COMP Sets the internal compensation of the op amp. Shunting between pins 1 and 2 sets the compensation to GND. Shunting between pins 2 and 3 sets the compensation to VCC. JU8 PSEL2 Sets the output clock divider. Shunting between pins 1 and 2 sets to GND. Shunting between pins 2 and 3 sets to VCC (see Table 4). JU9 PSEL1 Sets the output clock divider. Shunting between pins 1 and 2 sets to GND. Shunting between pins 2 and 3 sets to VCC (see Table 4). JU10 POLAR Sets the polarity of the op amp. Shunting between pins 1 and 2 sets the polarity to GND. Shunting between pins 2 and 3 sets the polarity to VCC. Open when VCO is activated. Closed when VCO is disabled. *See Quick Start first. 2 _______________________________________________________________________________________ MAX3670 Evaluation Kit COMPONENT NAME FUNCTION JU11 — Ensure that shunt is installed. JU12 — Ensure that shunt is installed. JU13 — Ensure that shunt is installed. Table 1. Gain Logic Pin Setup Table 2. Reference Clock Divider INPUT PIN GSEL1 INPUT PIN GSEL2 INPUT PIN GSEL3 KPD (µA/UI) DIVIDER RATIO N INPUT PIN RSEL REFERENCE CLOCK INPUT FREQ (MHz) DIVIDER RATIO (N3) PREDIVIDER OUTPUT FREQ (MHz) 77.76 VCC VCC VCC 20 1 VCC 77.76 1 OPEN VCC VCC 20 2 OPEN 155.52 2 77.76 GND VCC VCC 20 4 GND 622.08 8 77.76 VCC OPEN VCC 20 8 OPEN OPEN VCC 20 16 GND OPEN VCC 20 32 VCC GND VCC 20 64 OPEN GND VCC 20 128 GND GND VCC 20 256 Table 3. VCO Clock Divider INPUT PIN VSEL VCO CLOCK INPUT FREQ (MHz) DIVIDER RATIO (N1) PREDIVIDER OUTPUT FREQ (MHz) 77.76 VCC VCC GND 20 512 VCC 77.76 1 OPEN VCC GND 20 1024 OPEN 155.52 2 77.76 VCC VCC OPEN 5 1 GND 622.08 8 77.76 OPEN VCC OPEN 5 2 GND VCC OPEN 5 4 VCC OPEN OPEN 5 8 OPEN OPEN OPEN 5 16 GND OPEN OPEN 5 32 VCC GND OPEN 5 64 OPEN GND OPEN 5 128 GND GND OPEN 5 256 VCC OPEN GND 5 512 OPEN OPEN GND 5 1024 Table 4. Optional Clock Output Divider INPUT PIN PSEL1 INPUT PIN PSEL2 VCO TO POUT DIVIDE RATIO VCC VCC 1 GND VCC 2 VCC GND 4 GND GND 8 _______________________________________________________________________________________ 3 Evaluates: MAX3670 Adjustment and Control Descriptions (continued) JU1 VCCD JU3 VCCD JU2 VCCD C13 TP3 1µF TP1 VCCD C2 OPEN C2- C2+ GSEL1 CTH JU4 TP2 9 GSEL3 VCCD 8 7 GSEL2 6 5 4 THADJ 3 VCCD 2 1 31 30 10 VCCA R21 OPEN 12 J1 13 27 JU9 R2 100Ω 14 C15 0.1µF MAX3670 U1 28 JU8 26 15 25 JU10 VCCD VCCA C1A 0.015µF C1B 0.015µF VCCD 29 VCCD 11 OPAMP+ VCCD 32 JU7 VCCA R1A 200kΩ OPAMPLOL R20 OPEN COMP GND R18 OPEN R1B 200kΩ VCCA RSEL R19 OPEN PSEL2 REFCLK+ C11 OPEN PSEL1 REFCLK- J9 Figure 1. MAX3670 EV Kit Schematic _______________________________________________________________________________________ J2 19 20 21 22 23 24 R1 OPEN VCCD 16 JU5 VCCD POUT- 17 POUT+ 18 VCCO MOUT- MOUT+ VCCO2 VCOIN- VCOIN+ C4 0.1µF VCCD VC VCCA PO1 4 VSEL VTT VCCD VCCD R6 332Ω R8 332Ω R10 332Ω J10 VCCA VCCA R4 332Ω VTT VTT VTT R29 OPEN R27 OPEN R28 0Ω R26 OPEN R23 OPEN R24 OPEN R22 0Ω R30 0Ω R5 0Ω R7 0Ω R9 0Ω R32 0Ω R11 OPEN GND J16 VCCD J15 VTT J14 J13 VCCA J3 J4 J5 J6 R31 OPEN J12 VVCO C5 0.1µF C6 0.1µF C7 0.1µF C8 0.1µF R3 332Ω J11 R12 OPEN R13 OPEN L4 OPEN L3 OPEN L2 56nH L1 OPEN C3A OPEN C3B 6800pF VCCA J8 J7 VVCO C25 OPEN C31 0.1µF C30 OPEN C29 OPEN C21 OPEN C32 0.1µF C26 OPEN Y1 VC OD VEE C33 0.1µF C27 OPEN SAW-OSC 4 OUT 5 OUT 6 VCC JU11 JU12 C20 0.1µF C14 OPEN R16 332Ω VVCO C24 OPEN C19 OPEN C16 0.1µF R14 0Ω R15 0Ω C23 OPEN C17 10µF C3 OPEN C12 0.1µF C9 0.1µF R17 332Ω C34 C35 0.1µF 0.1µF JU13 VCCA JU6 VCCD C10 OPEN VTT C22 0.1µF C1 0.1µF 1 2 3 Evaluates: MAX3670 MAX3670 Evaluation Kit MAX3670 Evaluation Kit Evaluates: MAX3670 1.0" 1.0" Figure 2. MAX3670 EV Kit Component Placement Guide— Component Side 1.0" Figure 3. MAX3670 EV Kit Component Placement Guide— Solder Side 1.0" Figure 4. MAX3670 EV Kit PC Board Layout—Component Side Figure 5. MAX3670 EV Kit PC Board Layout—Solder Side _______________________________________________________________________________________ 5 Evaluates: MAX3670 MAX3670 Evaluation Kit 1.0" 1.0" Figure 6. MAX3670 EV Kit PC Board Layout—Ground Plane Figure 7. MAX3670 EV Kit PC Board Layout—Power Plane Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 6 _____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.