MAXIM MAX5042|MAX5043

19-3046; Rev 0; 1/04
KIT
ATION
EVALU
E
L
B
A
AVAIL
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Features
♦ Reliable Single-Stage Clamped Two-Switch Power
ICs for High Efficiency
The voltage-clamped power topology of the MAX5042/
MAX5043 enables full recovery of stored magnetizing
and leakage inductive energy for enhanced efficiency
and reliability. Operating at up to 500kHz switching frequency, these devices provide up to 50W of output
power. The MAX5042/MAX5043 allow the implementation of both forward and flyback voltage or current-mode
converter topologies. A dedicated latched external shutdown provides protection in addition to internal thermal
shutdown.
The MAX5042/MAX5043 achieve higher efficiency when
used with secondary-side synchronous rectification.
These devices generate a look-ahead signal for driving
secondary-side synchronous rectifiers.
The MAX5042/MAX5043 are rated for operation over the
-40°C to +125°C temperature range and are available in
a small surface-mount 56-pin thin QFN package.
Warning: The MAX5042/MAX5043 are designed to
work with high voltages. Exercise caution.
♦ No Reset Winding Required
♦ Up to 50W Output Power
♦ Integrated High-Voltage 75mΩ Power MOSFETs
♦ 20V to 76V Wide Input Voltage Range
♦ Feed-Forward Voltage or Current-Mode Control
♦ Programmable Brownout Undervoltage Lockout
♦ Integrated Current Signal Amplifier for HighEfficiency, Current-Mode Control
♦ Internal Overtemperature Shutdown
♦ Indefinite Short-Circuit Protection
♦ Integrated Thermally Protected High-Voltage
Startup Linear Regulator
♦ Integrated Hot-Swap Controller (MAX5042)
♦ Integrated Look-Ahead Signal Output Drives
High-Speed Optocoupler for Secondary-Side
Synchronous Rectification
♦ >90% Efficiency with Synchronous Rectification
♦ Up to 500kHz Switching Frequency
♦ High-Power (2.5W), Small-Footprint 56-Pin
Thermally Enhanced QFN Package
Applications
High-Efficiency Telecom/Datacom Power
Supplies
Router/Switch Cards with 48V Backplane Power
Systems
Servers with 48V Backplane Power Systems
Ordering Information
PART
TEMP RANGE
MAX5042ATN
-40°C to +125°C
PIN-PACKAGE
56 Thin QFN
MAX5043ATN*
-40°C to +125°C
56 Thin QFN
*Future product—contact factory for availability.
xDSL Line Cards
xDSL Line-Driver Power Supplies
Selector Guide
Distributed Power Systems with 48V Bus
42V Automotive Power Supplies
Power-Supply Modules
Pin Configurations appear at end of data sheet.
PART
DESCRIPTION
MAX5042
Two-Switch Power IC with Integrated Power
MOSFETs and Hot-Swap Controller for Isolated
Power Supplies
MAX5043
Two-Switch Power IC with Integrated Power
MOSFETs for Isolated Power Supplies
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1
MAX5042/MAX5043
General Description
The MAX5042/MAX5043 isolated multimode PWM power
ICs feature integrated switching power MOSFETs connected in a voltage-clamped, two-transistor, power-circuit
configuration. These devices operate from a wide 20V to
76V input voltage range. The MAX5042 includes a hotswap controller for use with an external power MOSFET to
limit inrush current for applications where the power supply is plugged into a live power backplane. The MAX5043
does not include a hot-swap controller.
MAX5042/MAX5043
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
ABSOLUTE MAXIMUM RATINGS
(See the Absolute Maximum Ratings Diagram below to better understand the absolute maximum ratings of the various blocks.)
XFRMRH Continuous Current (all pins combined)
TJ = +125°C.........................................................................2A
TJ = +150°C......................................................................1.4A
XFRMRL Continuous Current (all pins combined)
TJ = +125°C.........................................................................2A
TJ = +150°C......................................................................1.4A
SRC Continuous Current (all pins combined)
TJ = +125°C.........................................................................2A
TJ = +150°C......................................................................1.4A
POSINHS to NEGIN................................................-0.3V to +80V
HSEN to NEGIN........................................................-0.3V to +4V
DEN to PWMNEG .....................................................-0.3V to +4V
HSGATE to NEGIN .................................................-0.3V to +12V
HSDRAIN, HSOK to NEGIN....................................-0.3V to +80V
HSOK Current .....................................................................20mA
Continuous Power Dissipation (TA = +70°C)
56-Pin Thin QFN (derate 31.3mW/°C above +70°C) .......2.5W
Junction to Ambient Thermal Resistance, θJA ...............+32°C/W
Operating Temperature Range .........................-40°C to +125°C
Junction Temperature ......................................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
PWMNEG, POSINPWM, DRNH,
XFRMRH, XFRMRL, SRC to NEGIN....................-0.3V to +80V
BST to NEGIN.........................................................-0.3V to +95V
BST to XFRMRH .....................................................-0.3V to +12V
SRC to PWMNEG .....................................................-0.3V to +6V
REG15 to PWMNEG ...............................................-0.3V to +40V
REG15 to POSINPWM ............................................-80V to +0.3V
REG9, DRVIN to PWMNEG ....................................-0.3V to +12V
REG5 to PWMNEG ...................................................-0.3V to +6V
REG15 Current..................................................................±80mA
REG9 Current......................................................................40mA
REG5 Current......................................................................20mA
UVLO, RAMP, CSS, FLTINT, CSOUT,
RCFF, RCOSC to PWMNEG ...............................-0.3V to +12V
OPTO, PWMSD, SYNC, CSP, CSN,
DRVDEL to PWMNEG...........................................-0.3V to +6V
PPWM to PWMNEG .................................-0.3V to (REG5 + 0.3V)
PPWM Current .................................................................±20mA
PWMPNEG to PWMNEG .......................................-0.3V to +0.3V
DRNH Continuous Current (all pins combined)
TJ = +125°C.........................................................................2A
TJ = +150°C......................................................................1.4A
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
Absolute Maximum Ratings Diagram
POSINHS,
POSINPWM
BST
12V
XFRMRH, DRNH
XFRMRL
REG15
REG9, UVLO, RAMP, CSS, FLTINT,
CSOUT, RCFF, RCOSC, DRVIN
80V
80V
80V
REG5, OPTO, PWMSD, SYNC, CSP,
CSN, DRVDEL, SRC, PPWM
40V
95V
12V
80V
DEN
6V
4V
PWMNEG,
PWMPNEG,
HSDRAIN,
HSOK
80V
HSGATE
80V
HSEN
12V
4V
IC SUBSTRATE, NEGIN
2
_______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
(VPOSINPWM = 20V to 76V, VREG15 = 18V, CREG15 = 4.7µF, CREG9 = 1µF, CREG5 = 1µF, RRCOSC = 24kΩ, CRCOSC = 100pF, CBST =
0.22µF, RDRVDEL = 10kΩ, CDRVDEL = 0.22µF, VCSS = VCSP = VCSN = VRAMP = VPWMNEG = VNEGIN = 0, TA = -40°C to +125°C,
unless otherwise noted. Typical values are at VPOSINPWM = 48V, TA = +25°C, unless otherwise noted. All voltages are referred to
PWMNEG, unless otherwise noted.)
PARAMETER
Input Supply Range
SYMBOL
CONDITIONS
VPOSINPWM
MIN
MAX
UNITS
20
TYP
76
V
13.0
16.6
V
1.5
V
REG15 REGULATOR
REG15 Output Voltage Range
VREG15
REG15 Output Voltage Load
Regulation
VPOSINPWM = 20V to 76V
VPOSINPWM = 20V, IREG15 = 0 to 80mA
REG15 Output Current
Inferred from load regulation test
REG15 Current Limit
REG15 shorted to PWMNEG with 10Ω
REG15 Overdrive Voltage
80
140
mA
mA
18
40
V
8.3
10.1
V
0.35
V
40
mA
REG9 REGULATOR
REG9 Output Voltage Range
VREG15 = 18V to 40V
REG9 Output Voltage Load
Regulation
IREG9 = 0 to 40mA
REG9 Output Current
Inferred from load regulation test
REG9 Current Limit
REG9 shorted to PWMNEG with 10Ω
100
mA
REG5 REGULATOR
REG5 Output Voltage Range
VREG15 = 18V to 40V
REG5 Output Voltage Load
Regulation
IREG5 = 0 to 20mA
REG5 Output Current
Inferred from load regulation test
REG5 Current Limit
REG5 shorted to PWMNEG with 10Ω
4.5
5.5
V
0.35
V
20
mA
40
mA
PWM COMPARATOR
Common-Mode Range
VCM-PWM
0
Input Offset Voltage
5.5
10
Input Bias Current
-2.5
Propagation Delay
50mV overdrive, 0 ≤ VCM-PWM ≤ 5.5V
V
mV
+2.5
µA
70
ns
3.9
µs
RCOSC OSCILLATOR
PWM Period
tOSC-PWM
Maximum Duty Cycle
Maximum RCOSC Frequency
RCOSC Peak Trip Level
47
%
fRCOSC
1.2
MHz
VTH
2.55
V
RCOSC Valley Trip Level
0.2
V
RCOSC Input Bias Current
-0.3
µA
RCOSC Discharge MOSFET
RDS(ON)
Sinking 10mA
60
RCOSC Discharge Pulse Width
SYNC High Level
SYNC Low Level
120
50
Ω
ns
3.5
V
0.8
V
_______________________________________________________________________________________
3
MAX5042/MAX5043
ELECTRICAL CHARACTERISTICS
MAX5042/MAX5043
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
ELECTRICAL CHARACTERISTICS (continued)
(VPOSINPWM = 20V to 76V, VREG15 = 18V, CREG15 = 4.7µF, CREG9 = 1µF, CREG5 = 1µF, RRCOSC = 24kΩ, CRCOSC = 100pF, CBST =
0.22µF, RDRVDEL = 10kΩ, CDRVDEL = 0.22µF, VCSS = VCSP = VCSN = VRAMP = VPWMNEG = VNEGIN = 0, TA = -40°C to +125°C,
unless otherwise noted. Typical values are at VPOSINPWM = 48V, TA = +25°C, unless otherwise noted. All voltages are referred to
PWMNEG, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
SYNC Leakage Current
SYNC Maximum Frequency
fSYNC
MAX
UNITS
±1
µA
2.4
MHz
SYNC On-Time
50
ns
SYNC Off-Time
200
ns
PWM LOGIC
PWM Comparator Propagation
Delay
70
PPWM to XFRMRL Delay
PPWM rising
DRVDEL Reference Voltage
120
1.14
PPWM Output High
Sourcing 2mA
PPWM Output Low
Sinking 2mA
PWMSD Logic High
ns
ns
1.38
2.8
V
V
0.4
3.5
V
V
PWMSD Logic Low
0.8
V
PWMSD Leakage Current
±1
µA
SOFT-START
Soft-Start Current
ICSS
Minimum OPTO Voltage
33
µA
CSS = 0, sinking 2mA
1.4
V
RCFF sinking 2mA
2.1
V
RAMP GENERATOR
Minimum RCFF Voltage
RCFF Leakage
±0.1
±1
µA
OVERLOAD FAULT
FLTINT Pulse Current
IFLTINT
80
FLTINT Trip Point
2.0
FLTINT Hysteresis
2.7
µA
3.5
0.75
V
V
INTERNAL POWER FETs
VDRVIN = VBST = 9V, VXFRMRH = VSRC = 0,
IDS = 190mA
75
Inferred from supply current with VDS = 50V
45
nC
Low-to-High Latency
Driver delay until FET VGS reaches 0.9 x
(VBST - VXFRMRH)
80
ns
High-to-Low Latency
Driver delay until FET VGS reaches 0.1 x
(VBST - VXFRMRH)
45
ns
Output Drive Voltage
BST to XFRMRH with high side on
8
V
Driver delay until FET VGS reaches 0.9 x
VDRVIN
80
ns
On-Resistance
RDSON
Off-State Leakage Current
Total Gate Charge Per FET
200
10
mΩ
µA
HIGH-SIDE DRIVER
LOW-SIDE DRIVER
Low-to-High Latency
4
_______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
(VPOSINPWM = 20V to 76V, VREG15 = 18V, CREG15 = 4.7µF, CREG9 = 1µF, CREG5 = 1µF, RRCOSC = 24kΩ, CRCOSC = 100pF, CBST =
0.22µF, RDRVDEL = 10kΩ, CDRVDEL = 0.22µF, VCSS = VCSP = VCSN = VRAMP = VPWMNEG = VNEGIN = 0, TA = -40°C to +125°C,
unless otherwise noted. Typical values are at VPOSINPWM = 48V, TA = +25°C, unless otherwise noted. All voltages are referred to
PWMNEG, unless otherwise noted.)
PARAMETER
High-to-Low Latency
SYMBOL
CONDITIONS
MIN
Driver delay until FET VGS reaches
0.1 x VDRVIN
TYP
MAX
45
UNITS
ns
CURRENT-SENSE COMPARATOR
Current-Limit-Comparator
Threshold Voltage
Current-Limit-Comparator
Propagation Delay
140
10mV overdrive
156
172
40
mV
ns
CURRENT-SENSE AMPLIFIER
Current Amplifier Gain
VCSN = 0, VCSP = 0 to 0.35V
9.75
10
10.25
V/V
Input Voltage Offset
VCN = VCSP = -0.3V to +0.3V
185
200
230
mV
+0.3
V
Input Common-Mode Range
-0.3
Input Differential-Mode Range
Inferred from current amplifier gain test
CSP Input Bias Current
VCSP = -0.3V to +0.3V, VCSN = 0
CSN Input Bias Current
VCSP = -0.3V to +0.3V, VCSN = 0
Settling Time
VCSN = 0, VCSP steps from 0 to 0.2V, 10%
settling time, CL = 20pF
0.35
V
-160
-40
µA
-160
-30
µA
3dB Bandwidth
70
ns
7
MHz
BOOST VOLTAGE CIRCUIT
QB RDS(ON)
Sinking 100mA
10
20
Ω
Driver Output Delay
200
ns
One-Shot Pulse Width
300
ns
150
°C
14.5
°C
THERMAL SHUTDOWN
Shutdown Temperature
Temperature rising
Thermal Hysteresis
PWM CONVERTER UNDERVOLTAGE LOCKOUT (UVLO)
Preset UVLO Threshold
Measured at POSINPWM rising
28
UVLO Resistance
Looking into UVLO
30
UVLO Trip Point
Measured at UVLO rising
UVLO Threshold Hysteresis
31
34
V
75
kΩ
1.39
V
3
1.15
UVLO Hysteresis
1.27
V
+127
Preset DEN Threshold
MAX5043 only, measured at POSINPWM
rising
DEN Threshold Hysteresis
MAX5043 only
DEN Startup Delay
MAX5043 only
3.5
DEN Turn-Off Delay
MAX5043 only
0.2
DEN Trip Point
MAX5043 only, rising with respect to
PWMNEG
1.11
27
mV
34
V
12
27.0
ms
0.7
1.5
ms
1.35
V
3.1
V
_______________________________________________________________________________________
5
MAX5042/MAX5043
ELECTRICAL CHARACTERISTICS (continued)
MAX5042/MAX5043
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
ELECTRICAL CHARACTERISTICS (continued)
(VPOSINPWM = 20V to 76V, VREG15 = 18V, CREG15 = 4.7µF, CREG9 = 1µF, CREG5 = 1µF, RRCOSC = 24kΩ, CRCOSC = 100pF, CBST =
0.22µF, RDRVDEL = 10kΩ, CDRVDEL = 0.22µF, VCSS = VCSP = VCSN = VRAMP = VPWMNEG = VNEGIN = 0, TA = -40°C to +125°C,
unless otherwise noted. Typical values are at VPOSINPWM = 48V, TA = +25°C, unless otherwise noted. All voltages are referred to
PWMNEG, unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
DEN Hysteresis
MAX5043 only
DEN Input Resistance
MAX5043 only, looking into DEN
MIN
TYP
MAX
124
18
UNITS
mV
55
kΩ
SUPPLY CURRENT
Supply Current
Standby Supply Current
From VPOSINHS = VPOSINPWM = 76V,
CSS shorted to PWMNEG, REG15 = 18V
2
3
From REG15 = 18V, VPOSINHS =
VPOSINPWM = 76V, CSS shorted to
PWMNEG
6
8.5
From REG15 = 18V, VPOSINHS =
VPOSINPWM = 76V, VDRNH = VXFRMRH =
VXFRMRL = VSRC = 0V
20
MAX5042 only, VPOSINHS = VPOSINPWM =
VPWMNEG = VPWMPNEG = VHSDRAIN = 76V,
HSEN = NEGIN
0.6
mA
1
mA
34
V
55
kΩ
HOT-SWAP CONTROLLER (MAX5042 Only)
POSINHS with respect to NEGIN, voltage
rising
27
Looking into HSEN
18
Startup Delay
From HSEN rising to HSOK falling
50
165
350
ms
HSEN Turn-Off Delay
From HSEN falling to HSOK rising
3
10
25
ms
±1
µA
1.35
V
Hot-Swap UVLO Threshold
Hot-Swap UVLO Hysteresis
Hot-Swap UVLO Resistance
3.1
HSOK Output-High Leakage
Current
HSEN Reference Threshold
Rising with respect to NEGIN
1.11
HSEN Hysteresis
HSOK Output Low Voltage
124
Sinking 5mA
HSGATE Voltage High
Hot-Swap Slew Rate
6
V
7.5
CL = 10µF, from HSDRAIN to NEGIN
10
_______________________________________________________________________________________
mV
0.4
V
10.0
V
V/ms
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
30
29
28
VPOSINHS FALLING
27
26
165
160
155
-25
0
25
50
75
100
125
8.72
8.71
8.70
8.69
150
-50
MAX5042 toc03
170
8.73
HOT-SWAP GATE VOLTAGE (V)
VPOSINHS RISING
HOT-SWAP STARTUP DELAY (ms)
31
175
MAX5042 toc02
32
HOT-SWAP GATE VOLTAGE
vs. INPUT VOLTAGE
HOT-SWAP STARTUP DELAY
vs. TEMPERATURE
MAX5042 toc01
HOT-SWAP UNDERVOLTAGE LOCKOUT THRESHOLD (V)
HOT-SWAP UNDERVOLTAGE LOCKOUT
THRESHOLD vs. TEMPERATURE
-50
-25
0
TEMPERATURE (°C)
25
50
75
100
20
125
30
40
60
70
80
PWM UNDERVOLTAGE LOCKOUT
THRESHOLD vs. TEMPERATURE
HOT-SWAP STARTUP WAVEFORM
MAX5042 toc04
MAX5042 toc05
32
VHSGATE
5V/div
PWM UVLO THRESHOLD (V)
31
OV
VHSDRAIN
20V/div
OV
100kΩ
PULLUP
50
INPUT VOLTAGE (V)
TEMPERATURE (°C)
VPOSINPWM RISING
30
29
28
VHSOK
20V/div
27
OV
26
VPOSINPWM FALLING
-50
10ms/div
-25
0
25
50
75
125
100
TEMPERATURE (°C)
POSINPWM INPUT CURRENT, REG15
INPUT CURRENT vs. INPUT VOLTAGE
4.5
4.0
3.5
IPOSINPWM, VPOSINPWM = 76V
3.0
5
4
3
IPOSINPWM
2
1
2.5
VREG15 = 18V, CSS = 0,
XFRMRH = 0, NO SWITCHING
2.0
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
20
30
40
50
60
INPUT VOLTAGE (V)
70
RRCOSC = 25kΩ, CRCOSC = 100pF
330
310
290
270
RRCOSC = 19kΩ, CRCOSC = 100pF
250
VREG15 = 18V, CSS = 0,
XFRMRH = 0, NO SWITCHING
0
350
MAX5042 toc08
IREG15
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
5.0
MAX5042 toc07
IREG15, VPOSINPWM = 76V
5.5
6
MAX5042 toc06
6.0
OPERATING FREQUENCY
vs. TEMPERATURE
OPERATING FREQUENCY (kHz)
POSINPWM INPUT CURRENT, REG15
INPUT CURRENT vs. TEMPERATURE
230
80
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
_______________________________________________________________________________________
7
MAX5042/MAX5043
Typical Operating Characteristics
(VPOSINPWM = 20V, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics (continued)
(VPOSINPWM = 20V, TA = +25°C, unless otherwise noted.)
REG15 VOLTAGE
vs. REG15 LOAD CURRENT
REG15 VOLTAGE vs. INPUT VOLTAGE
15.0
MAX5042 toc10
15.0
MAX5042 toc09
14.8
14.9
49
14.8
48
14.6
VREG15 (V)
VREG15 (V)
MAXIMUM DUTY CYCLE (%)
50
MAX5042 toc11
MAXIMUM DUTY CYCLE
vs. TEMPERATURE
14.4
14.7
14.6
14.5
47
14.2
14.4
MEASURED AT XFRMRL
14.0
46
0
25
50
75
100
14.3
20
0
125
40
60
80
20
30
40
50
60
70
TEMPERATURE (°C)
REG15 LOAD CURRENT (mA)
INPUT VOLTAGE (V)
REG9 VOLTAGE
vs. REG9 LOAD CURRENT
REG9 OUTPUT VOLTAGE
vs. REG15 VOLTAGE
REG5 VOLTAGE
vs. REG5 LOAD CURRENT
9.4
MAX5042 toc12
9.30
VREG15 = 20V
9.25
VPOSINPWM = 48V
5.1
VREG15 = 20V
9.3
80
MAX5042 toc14
-25
MAX5042 toc13
-50
5.0
9.15
VREG5 (V)
VREG9 (V)
VREG9 (V)
9.20
9.2
4.9
9.10
9.1
4.8
9.05
9.0
9.00
10
20
30
30
35
0
4
8
12
16
20
REG15 VOLTAGE (V)
REG5 LOAD CURRENT (mA)
REG5 OUTPUT VOLTAGE
vs. REG15 VOLTAGE
SOFT-START CURRENT
vs. TEMPERATURE
MINIMUM RCFF LEVEL, MINIMUM OPTO
LEVEL vs. TEMPERATURE
5.00
4.99
4.98
30
REG15 VOLTAGE (V)
35
40
2.5
VRCFF
31
30
29
2.0
VOPTO
1.5
1.0
0.5
27
25
MAX5042 toc17
32
28
4.97
3.0
VOPTO, VRCFF (V)
5.01
33
MAX5042 toc16
MAX5042 toc15
VPOSINPWM = 48V
20
4.7
40
REG9 LOAD CURRENT (mA)
5.02
8
25
20
40
SOFT-START CURRENT (µA)
0
VREG5 (V)
MAX5042/MAX5043
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
IPULLUP INTO OPTO AND
RCFF = 2mA, CSS = 0
0
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
-25
0
25
50
75
TEMPERATURE (°C)
_______________________________________________________________________________________
100
125
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
CURRENT-LIMIT THRESHOLD
vs. TEMPERATURE
154
152
150
150
140
130
120
110
MEASURED FROM CSP RISING
TO XFRMRL RISING
100
-25
0
25
50
75
100
125
-50
-25
0
25
50
MAX5042 toc20
160
140
120
100
MEASURED FROM RAMP RISING
TO XFRMRL RISING
80
75
100
125
-50
-25
0
25
50
75
100
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
PPWM TO XFRMRL SKEW
vs. RDRVDEL
CSA OFFSET vs. TEMPERATURE
FAULT INTEGRATION CURRENT
vs. TEMPERATURE
CSA OFFSET (mV)
215
220
180
210
205
140
125
MAX5042 toc23
80
FAULT INTEGRATION CURRENT (µA)
260
MAX5042 toc22
220
MAX5042 toc21
300
PPWM TO POWER PULSE SKEW (ns)
160
180
CPWM PROPAGATION DELAY (ns)
156
MAX5042 toc19
158
170
CURRENT-LIMIT PROPAGATION DELAY (ns)
MAX5042 toc18
CURRENT-LIMIT THRESHOLD (mV)
160
-50
CPWM PROPAGATION DELAY
vs. TEMPERATURE
CURRENT-LIMIT PROPAGATION DELAY
vs. TEMPERATURE
79
78
77
76
MEASURED FROM PPWM RISING
TO XFRMRL FALLING
100
20
30
40
50
60
70
80
-50
-25
0
25
50
75
100
-50
125
-25
0
25
50
75
100
RDRVDEL (kΩ)
TEMPERATURE (°C)
TEMPERATURE (°C)
FAULT INTEGRATION SHUTDOWN VOLTAGE
vs. TEMPERATURE
FAULT INTEGRATION RESTART VOLTAGE
vs. TEMPERATURE
POWER FETs ON-RESISTANCE
vs. TEMPERATURE
2.6
2.5
2.4
1.90
1.85
1.80
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
125
MAX5042 toc26
MAX5042 toc25
1.95
140
POWER FETs ON-RESISTANCE (Ω)
2.7
2.00
FAULT INTEGRATION RESTART VOLTAGE (V)
2.8
MAX5042 toc24
FAULT INTEGRATION SHUTDOWN VOLTAGE (V)
75
200
10
120
100
HIGH-SIDE FET
80
LOW-SIDE FET
60
40
-50
-25
0
25
50
75
TEMPERATURE (°C)
100
125
-50
-25
0
25
50
75
100
125
TEMPERATURE (°C)
_______________________________________________________________________________________
9
MAX5042/MAX5043
Typical Operating Characteristics (continued)
(VPOSINPWM = 20V, TA = +25°C, unless otherwise noted.)
MAX5042/MAX5043
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Pin Description
PIN
MAX5042
MAX5043
1, 2, 14, 15,
40, 42–45, 56
1, 2, 14, 15,
40, 42–45, 56
FUNCTION
N.C.
No Connection. Not internally connected.
3
3
RCFF
Voltage-Mode PWM Ramp. Connect a resistor to the input supply and a capacitor to
PWMNEG for input voltage feed-forward. Input voltage feed-forward provides
instantaneous input-voltage transient rejection and constant loop gain with varying
input voltage.
4
4
RAMP
PWM Ramp Input. For voltage-mode control, connect RAMP to RCFF. For currentmode control, connect RAMP to CSOUT, the output of the current-sense amplifier.
5
5
OPTO
Inverting Input of the PWM Comparator. Connect OPTO to the collector of the
optotransistor. Connect a pullup resistor from OPTO to REG5.
6
6
CSS
Soft-Start. Connect a capacitor from CSS to PWMNEG to soft-start the converter.
7
7
BST
Boost-Capacitor Bypass for High-Side MOSFET Gate Drive. Connect a 0.1µF
capacitor from BST to XFRMRH for the internal high-side MOSFET driver.
8
8
DRVIN
Low-Side MOSFET Driver Supply. Bypass DRVIN with a 0.22µF capacitor to
PWMPNEG.
9
9
PWMPNEG
Low-Side MOSFET Driver Return. Connect PWMPNEG externally to PWMNEG with a
short trace.
10
10
RCOSC
Oscillator Timing Resistor and Capacitor Connection. Connect a capacitor from
RCOSC to PWMNEG and a resistor from RCOSC to REG5. The switching frequency
is half the frequency of the sawtooth signal at this connection.
11
11
FLTINT
Fault Integration Input. Use FLTINT in addition to cycle-by-cycle current limit. During
persistent current-limit faults, a capacitor connected to FLTINT charges with an
internal 80µA current source. Switching terminates when the voltage reaches 2.7V.
An external resistor connected in parallel discharges the capacitor. Switching
resumes when the voltage drops to 1.8V.
12
12
SYNC
Synchronization Input. The switching frequency of the power supply is half the
synchronization frequency, ensuring less than 50% maximum duty cycle.
13
13
PWMSD
16, 17, 20,
21, 24
16, 17, 20,
21, 24
SRC
18, 19, 22, 23 18, 19, 22, 23
25
10
NAME
—
Latched Shutdown Input. Pull PWMSD low with respect to PWMNEG to stop
switching. To restart, release PWMSD and cycle the input supply. Do not leave
PWMSD unconnected. Use PWMSD to prevent catastrophic secondary rectifier
overheating by monitoring the temperature and issuing a shutdown command with
an optocoupler. Connect PWMSD to REG5 when not used.
Source Connection for the Internal Low-Side Power MOSFET. Connect SRC to
PWMPNEG with a low-value resistor for current limiting.
XFRMRL
Low-Side Connection for the Isolation Transformer
POSINHS
Hot-Swap Controller Positive Input Supply (MAX5042 Only). Connect POSINHS
along with POSINPWM to the most positive rail of the input supply.
______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
PIN
NAME
FUNCTION
MAX5042
MAX5043
26
—
HSOK
Hot-Swap OK (MAX5042 Only). HSOK’s open-drain output is forced to NEGIN upon
hot-swap completion.
27
—
HSEN
Hot-Swap Enable (MAX5042 Only). HSEN is the center point of the internal hot-swap
UVLO divider. Use an external voltage-divider or a 100kΩ pullup resistor to the most
positive rail to override.
28, 29
—
NEGIN
Negative Supply Input (MAX5042 Only). NEGIN connects to the most negative input
supply rail. NEGIN provides the hot-swap circuit’s most negative connection. NEGIN
is at the same potential as the IC substrate.
30
—
HSGATE
Hot-Swap Gate (MAX5042 Only). Connect HSGATE to the gate of the external hotswap MOSFET.
31
—
HSDRAIN
Hot-Swap MOSFET Drain Sense (MAX5042 Only). Connect HSDRAIN to the drain of
the external hot-swap MOSFET.
32
32
CSOUT
Current-Sense Amplifier Output. The amplifier has a gain of 10. Connect CSOUT to
RAMP for current-mode control.
33
33
CSP
Positive Current-Sense Connection. Place the current-sense resistor as close as
possible to the device and use a Kelvin connection.
34
34
CSN
Negative Current-Sense Connection. Place the current-sense resistor as close as
possible to the device and use a Kelvin connection.
35
26, 28, 29,
31, 35
PWMNEG
Analog Signal Return for the PWM Section
Driver Delay Adjust Connection. Connect a resistor and a 0.22µF capacitor from
DRVDEL to PWMNEG. The resistor at DRVDEL controls the skew between the
PPWM signal and the power pulse applied to the internal power MOSFETs. Use in
conjunction with a secondary-side synchronous-rectifier controller. The skew allows
for the optimization of the synchronous-rectifier drive pulse.
36
36
DRVDEL
37
37
PPWM
PWM Pulse Output. PPWM leads the internal power MOSFET pulse by an amount
determined with the resistor value at DRVDEL.
38
38
REG9
9V Internal Regulator Output. Use primarily as a source for the internal gate drivers.
Bypass REG9 to PWMNEG with a 1µF ceramic capacitor.
39
39
REG5
5V Internal Regulator Output. Bypass REG5 to PWMNEG with a 1µF ceramic
capacitor.
41
41
REG15
15V Startup Regulator Output. A voltage greater than 18V on REG15 disables the
regulator. Bypass REG15 to PWMNEG with at least one 1µF ceramic capacitor.
UVLO
PWM Undervoltage Lockout. UVLO is the center point of the PWM undervoltage
lockout divider. Use an external divider or a 100kΩ pullup resistor to POSINPWM to
override. Connect the external resistor-divider network from POSINPWM to
PWMNEG.
46
46
______________________________________________________________________________________
11
MAX5042/MAX5043
Pin Description (continued)
MAX5042/MAX5043
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Pin Description (continued)
PIN
MAX5042
MAX5043
47
25, 47
NAME
FUNCTION
POSINPWM
PWM Analog Positive-Supply Input. Connect POSINPWM to the most positive input
supply rail.
48, 51, 54, 55 48, 51, 54, 55
DRNH
Drain Connection of the Internal High-Side PWM Power MOSFET. Connect DRNH to
the most positive rail of the input supply.
49, 50, 52, 53 49, 50, 52, 53
XFRMRH
High-Side Connection for the Isolation Transformer
—
27
DEN
Delayed Enable Input (MAX5043 Only). DEN is the center point of the delayed
enable divider. Use an external voltage-divider or a 100kΩ pullup resistor to the
most positive rail to override.
—
30
N.C.
No Connection (MAX5043 Only). Leave unconnected.
Detailed Description
The MAX5042/MAX5043 PWM multimode power ICs
are designed for the primary side of voltage or currentmode isolated, forward or flyback power converters.
These devices provide a high degree of integration
aimed at reducing the cost and PC board area of isolated output power supplies. Use the MAX5042/MAX5043
primarily for 24V, 42V, or 48V power bus applications.
The MAX5042/MAX5043 provide a complete system
capable of delivering up to 50W of output power. The
MAX5042 contains a hot-swap controller in addition to
the PWM and power MOSFETs. The hot-swap section
requires an external MOSFET (QHS). Figure 1 details
the MAX5042 conceptual block diagram. CIN represents
the input bulk storage capacitance of the PWM circuit
that requires the soft-start to reduce the inrush current
from the backplane. When input power is applied,
capacitor CIN is completely discharged and QHS is off.
An applied voltage higher than the default undervoltage
lockout threshold of the hot-swap controller (30.5V) for
more than 165ms (internal turn-on delay) causes the
gate voltage of QHS to start gradually increasing. This
results in a controlled slew-rate turn-on. The drain voltage of QHS falls at a rate of approximately 10V/ms,
drawing a current load from the backplane of approximately 1A for each 100µF of C IN capacitance. The
MAX5042’s PWM block is prevented from starting up
until the QHS MOSFET is fully enhanced. After QHS
completely turns on and the voltage across capacitor
CIN is above the default startup voltage (31V) of the
PWM section, the hot swap enables the PWM block and
the soft-start cycle begins. Soft-start limits the amount of
current initially drawn from the primary during startup
and also prevents possible output-voltage overshoots.
12
+VPOSINPWM
MAX5042
BULK STORAGE CAPACITOR
(HOT-SWAPPED CAPACITOR)
QH
CIN
L
T1
PWM
CIRCUIT
WITH
INTEGRATED
FETs
QL
VOUT
COUT
PWMNEG, PWMPNEG
QHS
INTEGRATED
HOT-SWAP
CONTROLLER
EXTERNAL
HOT-SWAP FET
NEGIN
Figure 1. Simplified Diagram of a MAX5042-Based Isolated
Power Supply
The MAX5043, detailed in Figure 2, does not contain an
integrated hot-swap controller. The MAX5043 begins
operating when the input voltage exceeds both of the
undervoltage lockout voltages (at UVLO and DEN pins)
for 10ms.
The MAX5042/MAX5043 support both forward and flyback power topologies. In forward mode, the maximum
output power is approximately 50W. In flyback mode,
the maximum output power is approximately 20W. The
amount of power dissipated by the package limits the
output power. The MAX5042/MAX5043’s QFN package
features an exposed metal pad on the bottom of the
package. Solder the exposed pad directly to the most
negative supply in the system. Use a large copper area
to improve heat dissipation. Facilitate heat transfer with
thermal vias.
______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
+VPOSINPWM
MAX5043
BULK STORAGE CAPACITOR
QH
CIN
PWM
CIRCUIT
WITH
INTEGRATED
FETs
QL
L
T1
VOUT
COUT
• No minimum duty-cycle requirement due to currentsignal filtering or blanking.
• Clean modulator ramp and higher amplitude for
increased stability.
PWMNEG
Figure 2. Simplified Diagram of a MAX5043-Based Isolated
Power Supply
Set the switching frequency with a resistor and a
capacitor at RCOSC. Switching at 250kHz ensures
switching losses are minimal and external power passives are small enough for a compact circuit.
The MAX5042/MAX5043 incorporate an advanced set of
protection features that make them uniquely suitable
when high reliability and comprehensive fault protection
are required, as in telecommunication equipment powersupply applications. The MAX5042/MAX5043 15V linear
regulator output powers the 9V and 5V regulators used to
drive the gates and internal circuitry. A tertiary winding
connects to REG15 through a rectifier to power the
device after startup and reduces power dissipation in the
MAX5042/MAX5043 package. When REG15 is externally
powered, the internal 15V regulator is disabled.
Figures 3 and 4 show the block diagrams of the MAX5042
and MAX5043, respectively. The power-OK signals from
the hot-swap section, regulators, thermal shutdown, and
UVLO combine to generate the internal shutdown signal
SHDN. When asserted, SHDN disables the comparators
and oscillator. Deasserting SHDN releases the comparators and oscillators. The falling edge of SHDN is delayed
allowing the internal signals to settle before the PWM pulses appear. During the time between the falling edge of
SHDN and its delayed signal, the 10Ω internal MOSFET
(QB) from XFRMRH to PWMPNEG turns on, charging the
BST capacitor. After startup, this MOSFET also turns on
for approximately 300ns at each half period to help
charge the BST capacitor.
• Stable bias point of the optocoupler LED and phototransistor for maximized control-loop bandwidth (in
current-mode applications, the optocoupler bias
point is output-load dependent).
• Predictable loop dynamics simplifying the design of
the control loop.
The two-switch power topology recovers energy stored
in both the magnetizing and parasitic leakage inductances of the transformer. Figure 7 shows the schematic diagram of a 48V input and 5V, 8A output isolated
power supply built with the MAX5042.
The MAX5042/MAX5043 also support current-mode control. Current-mode control has advantages such as a single-pole power circuit and a small-signal transfer
function that simplify the design of power supplies with
widely varying output capacitors.
Undervoltage Lockout
The MAX5042 has two UVLO functions. Both the hotswap section and the PWM section contain their own
undervoltage lockout comparators (HSEN and UVLO,
respectively). The MAX5043 lacks the hot-swapping
function, but retains the PWM UVLO and the deglitched
undervoltage lockout/power-on reset. In both cases,
internal resistors set a default input-voltage enable
threshold of 31V (typ).
The PWM default input voltage threshold value can be
adjusted by using an external divider in parallel with the
internal divider. The tolerances of the external divider
resistors dominate the precision of the UVLO trip point if
their values are smaller than those of the internal divider.
Override the default threshold by using:
RHe =
RLe × RLi × RHi × (VIN - VREF )
VREF × RHi (RLi + RLe ) - RLe × RLi × (VIN - VREF )
______________________________________________________________________________________
13
MAX5042/MAX5043
Power Topology
The two-switch forward-converter topology offers outstanding robustness against faults and transformer saturation while affording efficient use of the integrated
75mΩ power MOSFETs. Voltage-mode control with feedforward compensation allows the rejection of input supply disturbances within a single cycle similar to that of
current-mode controlled topologies. This control method
offers some significant benefits when compared with
current-mode control. These benefits include:
MAX5042/MAX5043
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
REG15
REG5
REG9
RCFF
MAX5042
41
39
REG15 OK
REG9 OK
REG5
(5V)
REG5 OK
REG9
(9V)
REG15 OK
OVT
REG15
(15V)
38
46
UVLO
CUVLO
1.25V
1.125V
3
7.5V
"1" 7.5V
36
80µA
Q
D
7
PWMNEG
OVRLD
11
LEADINGEDGE
DELAY
2.3V/1.6V
4
R
CPWM
5
Q
QH
0.1Ω
LEVEL
SHIFT
R
OPTO
50kΩ
37
IFLT
RAMP
UVLO
PWMNEG
5V
FLTINT
POSINPWM
1.2MΩ
REF
(1.25V)
REF OK
REG5 OK
47
48
PPWM
DRVDEL
BST
DRNH (51, 54, 55)
RES
49
XFRMRH (50, 52, 53)
S
5V
CLK
32µA
CSS
SHDN
T-FF
OSC
QB
10Ω
35
13
R
UVLO
LEADINGEDGE
DELAY
OVT
UVLO
REFOK
REG15OK
REG9OK
REG5OK
OVRLD
PWMNEG
PWMSD
R
6
7.5V
PWMNEG
Q
THERMAL
SHUTDOWN
+150°C
12°C HYSTERESIS
Q
ONE
SHOT
8
OVT
QL
0.1Ω
18
16
DRVIN
XFRMRL (19, 22, 23)
SRC (17, 20, 21, 24)
S
9
10
12
33
ILIM
10MHz
34
PWMPNEG
RCOSC
SYNC
CSP
CSN
150mV
CSOUT
GAIN = 10
32
IAMP
LEVEL SHIFT
TO PWM
POSINHS
31
30
26
HOT-SWAP
CONTROL
LOGIC
27
35kΩ
NEGIN (29)
HOT-SWAP SECTION
25
840kΩ
HSEN
200mV
3V
40Ω
80V, DMOS
460kΩ
28
Figure 3. Block Diagram of the MAX5042 Power IC
14
______________________________________________________________________________________
HSDRAIN
HSGATE
HSOK
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
REG5
REG9
RCFF
MAX5043
41
REG15 OK
39
REG9 OK
REG5
(5V)
REG5 OK
REG9
(9V)
REG15 OK
38
REF
(1.25V)
46
CUVLO
1.25V
1.125V
7.5V
UVLO
50kΩ
PWMNEG
"1" 7.5V
80µA
Q
37
36
3Ω
D
7
PWMNEG
OVRLD
11
4
R
CPWM
5
LEADINGEDGE
DELAY
Q
QH
0.1Ω
LEVEL
SHIFT
R
2.3V/1.6V
OPTO
POSINPWM
1.2MΩ
3
IFLT
RAMP
REF OK
REG5 OK
47
UVLO
5V
FLTINT
OVT
REG15
(15V)
MAX5042/MAX5043
REG15
48
PPWM
DRVDEL
BST
DRNH (51, 54, 55)
RES
49
XFRMRH (50, 52, 53)
S
5V
CLK
32µA
CSS
SHDN
T-FF
OSC
QB
10Ω
35
50Ω
13
R
UVLO
LEADINGEDGE
DELAY
OVT
UVLO
REFOK
REG15OK
REG9OK
REG5OK
OVRLD
PWMNEG
PWMSD
R
6
7.5V
PWMNEG (26)
Q
THERMAL
SHUTDOWN
+150°C
12°C HYSTERESIS
Q
ONE
SHOT
8
OVT
QL
0.1Ω
18
16
DRVIN
XFRMRL (19, 22, 23)
SRC (17, 20, 21, 24)
S
9
10
12
33
ILIM
10MHz
34
PWMPNEG
RCOSC
SYNC
CSP
CSN
150mV
CSOUT
POSINPWM
GAIN = 10
32
IAMP
200mV
25
840kΩ
DEN
27
35kΩ
PWMNEG (29, 31)
1.25V
3V 1.125V
CDEN
10ms
DELAY
28
Figure 4. Block Diagram of the MAX5043 Power IC
______________________________________________________________________________________
15
MAX5042/MAX5043
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
where RHe is the external high-side resistor, RLe is the
external low-side resistor, RHi is the internal high-side
resistor (1.2MΩ, typ), RLe is the internal low-side resistor
(50kΩ, typ), VREF is 1.27V (typ), and VIN is the desired
threshold.
Use an external 100kΩ pullup resistor to POSINPWM to
override UVLO functionality for either lockout.
MAX5042/MAX5043
R1
DRVDEL
C1
0.22µF
5V
R2
PPWM
Internal Regulators
An internal high-voltage linear regulator provides a 15V
output at REG15. This serves as the input to the 9V regulator that provides bias for the internal MOSFET drivers. The 15V regulator also provides the bias for REG5,
a 5V supply used both by internal as well as external circuitry. Bypass the REG15, REG9, and REG5 regulators
with 1µF ceramic capacitors. A voltage greater than 18V
and less than 40V on REG15 disables the internal highvoltage startup regulator. The REG9 regulator steps
down the voltage on REG15 to an output of 9V with a
current limit of 100mA. The REG5 regulator steps down
the voltage on REG15 to an output of 5V with a current
limit of 40mA. Disabling the REG15 regulator by powering REG15 with an external power supply considerably
reduces the internal power dissipation in the
MAX5042/MAX5043. The voltage and power necessary
to override the REG15 internal regulator can be generated with a rectifier and an extra winding from the main
transformer.
Soft-Start
Program the MAX5042/MAX5043 soft-start with an
external capacitor between CSS and PWMNEG. When
the device turns on, the soft-start capacitor (C CSS)
charges with a constant current of 33µA, ramping up to
7.3V. During this time, OPTO is clamped to CSS + 0.6V.
This initially holds the duty cycle lower than the value
the regulator tries to impose, limiting the current inrush
and the voltage overshoot at the secondary. When the
MAX5042/MAX5043 turn off, the soft-start capacitor
internally discharges to PWMNEG.
Secondary-Side Synchronization
The MAX5042/MAX5043 provide convenient synchronization of the secondary-side synchronous rectifiers.
Figure 5 shows the connection diagram with a highspeed optocoupler. Choose an optocoupler with a
propagation delay of less than 50ns.
For optimum results, adjust the resistor connected to
DRVDEL to provide the required amount of delay
between the leading edge of the PPWM signal and the
turn-on of the power MOSFETs. Use the following formula to calculate the approximate resistance (RDRVDEL)
16
C2
PS9715
OR EQUIVALENT
HIGH-SPEED
OPTOCOUPLER
PWMNEG
Figure 5. Secondary-Side Synchronous Rectifier Driver Using a
High-Speed Optocoupler
required to set the delay between the PPWM and the
power pulse applied to the transformer:
 kΩ 
RDRVDEL = t DRVDEL − (100ns) 

 2ns 
(
)
where tDRVDEL is the required delay from the rising edge
of PPWM to the switching of the internal power MOSFETs.
PWM Regulation
The MAX5042/MAX5043 are multimode PWM power
ICs supporting both voltage and current-mode control.
Voltage-Mode Control and the PWM Ramp
For voltage-mode control, the feed-forward PWM ramp
is generated at RCFF. From RCFF connect a capacitor
to PWMNEG and a resistor to POSINPWM. The ramp
generated is applied to the noninverting input of the
PWM comparator at RAMP and has a minimum voltage
of 1.5V to 2.5V. The slope of the ramp is determined by
the voltage at POSINPWM and affects the overall loop
gain. The ramp peak must remain below the dynamic
range of RCFF (0 to 5.5V). Assuming the maximum duty
cycle approaches 50% at a minimum input voltage
(PWM UVLO turn-on threshold), use the following formula to calculate the minimum value of either the ramp
capacitor or resistor:
RRCFF × CRCFF ≥
VINUVLO
2 fS × VrP-P
where:
VINUVLO = the minimum input supply voltage (typically
the PWM UVLO turn-on voltage),
fs = the switching frequency,
VrP-P = the peak-to-peak ramp voltage (2V, typ).
______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Current-Sense Amplifier and Current-Mode Control
The MAX5042/MAX5043 can also be programmed for
current-mode control (see Figure 6). This control
method offers beneficial advantages for certain applications. Current-mode control reduces the order of the
output filter, allowing easier control-loop compensation.
In current-mode control, the voltage across the currentsense resistor at SRC is amplified by the internal gainof-10 amplifier IAMP. The cycle-by-cycle current-limit
threshold is 156mV. This is the peak voltage amplified
by IAMP. A 200mV offset is added to this voltage. The
voltage at the output of the current-sense amplifier is:
VCSOUT = 2 + 10(VCSP - VCSN)
The low-frequency, small-signal gain of the power
stage (the gain from the inverting input of the PWM
comparator to the output) can be calculated using the
following formula:
GPS = NPS ×
RL
RSENSE
where NPS = the primary to secondary power transformer turns ratio,
RL = the low-frequency output impedance,
RSENSE = the primary current-sense resistor value.
MAX5042/MAX5043
SRC
RAMP
CSP
RS
50mΩ
(APPROXIMATELY
35W TO 40W)
CSOUT
OPTO
CSN
PWMPNEG
PWMNEG
Figure 6. Simplified Connection Diagram for Current-Mode
Control
Oscillator and Synchronization
Program the MAX5042/MAX5043 oscillator using an RC
network at RCOSC with the resistor connected to REG5
and the capacitor connected to PWMNEG. The PWM
frequency is half the frequency at RCOSC.
Use the following formula to calculate the oscillator
components:
RRCOSC =
1


VREG5
2 fS (CRCOSC + CPCB )ln

 VREG5 − VTH 
where CPCB = 14pF,
REG5 = 5V,
fS = switching frequency,
VTH = RCOSC peak trip level.
The delay programmed by the resistor at DRVDEL limits the power MOSFET’s maximum duty cycle to less
than 50 percent.
SYNC allows synchronization of the MAX5042/MAX5043
to an external clock. For proper synchronization, set the
external SYNC frequency 15% to 20% higher than the
programmed free-running frequency of the MAX5042/
MAX5043’s internal oscillator. The actual switching
frequency will be half the synchronizing frequency.
Integrating Fault Protection
The integrating fault protection feature allows the
MAX5042/MAX5043 to ignore transient overcurrent
conditions for a programmable amount of time, giving
the power supply time to behave like a current source
to the load. This can happen, for example, under loadcurrent transients when the control loop requests maximum current to keep the output voltage from going out
of regulation. Program the ignore time externally by
connecting a capacitor to FLTINT. Under sustained
overcurrent faults, the voltage across this capacitor
ramps up toward the FLTINT shutdown threshold (typically 2.7V). When FLTINT reaches the threshold, the
power supply shuts down. A high-value bleed resistor
connected in parallel with the FLTINT capacitor allows
the capacitor to discharge toward the restart threshold
(typically 1.8V). Crossing the restart threshold softstarts the supply again.
The ILIM comparator provides cycle-by-cycle current
limiting with a typical threshold of 156mV. The fault integration circuit works by forcing an 80µA current out of
FLTINT for one clock cycle every time the current-limit
comparator (Figures 3 and 4, ILIM) trips. Use the following formula to calculate the approximate capacitance (CFLTINT) needed for the desired shutdown time.
______________________________________________________________________________________
17
MAX5042/MAX5043
Maximize the signal-to-noise ratio by setting the ramp
peak as high as possible. Calculate the low-frequency,
small-signal gain of the power stage (the gain from the
inverting input of the PWM comparator to the output)
using the following formula:
GPS = NSP ✕ RRCFF ✕ CRCFF ✕ fS
where NSP = the secondary to primary power transformer
turns ratio.
MAX5042/MAX5043
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
I
×t
CFLTINT ≅ FLTINT SH
1.4
where IFLTINT = 80µA,
tsh is the desired ignore time during which current-limit
events from the current-limit comparator are ignored.
Some testing may be required to fine tune the actual
value of the capacitor.
Calculate the approximate bleed resistance (RFLTINT)
needed for the desired recovery time using the following formula:
tRT
RFLTINT ≅
 2.3 
CFLTINT ln 

 1.6 
where tRT is the desired recovery time.
Choose at least tRT = 10 x tSH. Typical values for tSH
range from a few hundred microseconds to a few milliseconds.
Shutdown Modes
Latched Shutdown
The MAX5042/MAX5043 feature a latched shutdown that
terminates switching in the event of a serious fault.
External faults in synchronously rectified power supplies
cause a loss of control for the rectifiers. Either the body or
the external Schottky diodes conduct, resulting in a very
high power dissipation and a quick rise of the power-supply temperature. A thermal sensor placed on the same
ground plane as the secondary-side rectifiers can sense
this catastrophic increase in temperature and issue a
shutdown signal to PWMSD. Asserting PWMSD stops
switching and latches the fault until the power is cycled.
Connect PWMSD to REG5 to disable latched shutdown.
Functional Shutdown
Shut down the MAX5042/MAX5043 by pulling UVLO to
PWMNEG using an open-collector or open-drain transistor connected to PWMNEG. Pulling HSEN to NEGIN also
shuts down the MAX5042 after a 10ms turn-off delay.
Pulling DEN low also shuts down the MAX5043 with a
1ms turn-off delay. When HSEN is used, the MAX5042
goes through a full hot-swap startup sequence with a
165ms startup delay. The MAX5043 also has a 10ms
delay from when DEN asserts.
18
Thermal Shutdown
The MAX5042/MAX5043 feature internal thermal shutdown. Internal sensors monitor the high-power areas.
Thermal faults arise from excessive dissipation in the
power FETs or in the regulators. When the temperature
limit is reached, switching is terminated and the regulator
shuts down. The integration of thermal shutdown and the
power MOSFETs result in a very robust power circuit.
MAX5042 Hot-Swap Controller
The MAX5042 integrates a PWM power IC with a hotswap controller. The design allows a power supply built
around the MAX5042 to be safely hot-plugged into a
live backplane without causing a glitch on the powersupply rail. The hot-swap section operates from
POSINHS to NEGIN. The MAX5042 only requires an
external N-channel MOSFET to provide hot-swap control. Figures 1 and 3 detail hot-swap functionality.
The MAX5042 controls an external N-channel power
MOSFET placed in the negative power-supply pathway.
When power is applied, the MAX5042 keeps the MOSFET off. The MOSFET remains off indefinitely if HSEN is
below 1.26V, POSINHS is below the undervoltage lockout level (31V), or the die temperature exceeds
+150°C. If none of these conditions exist for 165ms, the
MAX5042 gradually turns on the MOSFET, allowing the
voltage on HSDRAIN to fall no faster than 10V/ms.
During this period, the PWM block remains in shutdown. The inrush current through the external MOSFET
(and therefore through the capacitor CIN) is limited to a
level proportional to its capacitance, and the constant
HSDRAIN slew rate. After the MOSFET completely turns
on, and HSDRAIN falls to its final value, the hot-swap
period is terminated and the PWM section of the IC
powers up.
HSEN offers external control of the MAX5042, facilitating power-supply sequencing. HSEN can also be used
to change the undervoltage lockout level using an
external divider network, if necessary. Undervoltage
lockout keeps the external hot-swap MOSFET switched
off as long as the magnitude of the input voltage is
below the desired level. There is a 10ms turn-off delay
on the HSEN signal.
A power-good output, HSOK, asserts when the external
MOSFET completely turns on. HSOK is an open-drain
output referenced to NEGIN, and can withstand up to
80V above NEGIN.
______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
ICIN
Table 1. MAX5042 Suggested External
Hot-Swap MOSFETs
MAXIMUM ILOAD (A)
dV
= CIN HSDRAIN = CINSHSLR
dt
SUGGESTED EXTERNAL MOSFET
0.25
IRFL110
0.5
IRFL4310
where:
CIN = the load capacitance,
SHSLR is the MAX5042 hot-swap slew rate magnitude
given in the Electrical Characteristics table.
For example, assuming an input bulk capacitance of
100µF, and using the typical value of 10V/ms for the
slew rate, the calculated inrush current is 1A. See Table
1 for suggested external hot-swap MOSFETs.
1
IRFR3910
2
IRF540NS
3
IRF1310NS
4
IRF1310NS
Typical Application Circuits
VIN+
32V TO 72V
C1
220µF
100V
R12
200kΩ
1%
POSINPWM
R22
10kΩ
C30
0.68µF
100V
C3
1µF
R13
1MΩ
UVLO
BST
R11
20Ω
1%
C16
0.001µF
U1
XFRMRL
MAX5042
R9
15Ω
L1
4.4µH
5V
8A
T1
XFRMRH
D4
C17
150µF
6.3V
C18
150µF
6.3V
C4
0.1µF
D2
SGND
C5
0.0047µF
REG15
PWMSD
C25
0.22µF
D3
D1
C6
0.1µF
C7
1µF
CSP, SRC
C9
C12
220pF 0.1µF
R14
10kΩ
R20
10kΩ
REG5
RCOSC HSEN CSS
R15
24.9kΩ
1%
C13
1µF
C20
0.1µF
100V
NEGIN
DRNH
RAMP
RCFF
REG9
DRVIN
FLTINT
DRVDEL
SYNC
NEGIN HSGATE
R4
10Ω
PWMNEG,
HSDRAIN CSN PWMPNEG OPTO
C11
0.1µF
R10
33mΩ
1%
C14
100pF
R3
150Ω
1%
C19
0.15µF
N1
(HOT-SWAP MOSFET)
R21
1.24kΩ
1%
C8
0.33µF
E
LED
FB
R6
200Ω
1%
U2
FOD2712
C15
0.1µF
R1
25.5kΩ
1%
R2
8.25kΩ
1%
COMP
C
GND
R5
10Ω
1%
Figure 7. MAX5042 Typical Application Circuit (48V Power Supply with Hot-Swap Capability)
______________________________________________________________________________________
19
MAX5042/MAX5043
Determining Hot-Swap Inrush Current
Calculate the hot-swap inrush current using the following formula:
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
MAX5042/MAX5043
Typical Application Circuits (continued)
VIN+
32V TO 72V
C1
220µF
100V
R12
200kΩ
1%
POSINPWM
RAMP
RCFF
REG9
DRVIN
FLTINT
DRVDEL
SYNC
R22
10kΩ
0.68µF
100V
C13
1µF
C9
C12
220pF 0.1µF
R13
1MΩ
R14
10kΩ
DRNH
UVLO
BST
R20
10kΩ
5V
10A
T1
C17
150µF
6.3V
U1
XFRMRL
MAX5043
R9
15Ω
D4
C18
150µF
6.3V
C4
0.1µF
D2
SGND
REG15
C7
1µF
REG5
CSS
RCOSC
R15
24.9kΩ
1%
C13
1µF
C6
0.1µF
L1
4.4µH
XFRMRH
PWMSD
C25
0.22µF
D3
D1
PWMNEG
PWMNEG,
CSN
R4
10Ω
OPTO SRC, CSP
C11
0.1µF
R10
33mΩ
1%
C14
100pF
R3
150Ω
1%
C19
0.15µF
PWMNEG
C8
0.33µF
R21
1.24kΩ
1%
E
LED
FB
R6
200Ω
1%
U2
FOD2712
C15
0.1µF
R1
25.5kΩ
1%
R2
8.25kΩ
1%
COMP
C
GND
R5
10Ω
1%
Figure 8. MAX5043 Typical Application Circuit (48V Power Supply without Hot-Swap Capability, this Circuit has not been Tested)
20
______________________________________________________________________________________
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
UVLO
N.C.
N.C.
N.C.
45
POSINPWM
N.C.
46
DRNH
UVLO
47
XFRMRH
POSINPWM
48
XFRMRH
DRNH
49
DRNH
XFRMRH
50
XFRMRH
XFRMRH
51
XFRMRH
DRNH
52
DRNH
XFRMRH
53
DRNH
XFRMRH
54
N.C.
DRNH
55
N.C.
DRNH
56
N.C.
N.C.
TOP VIEW
44
43
56
55
54
53
52
51
50
49
48
47
46
45
44
43
N.C.
1
42 N.C.
N.C.
1
42 N.C.
N.C.
2
41 REG15
N.C.
2
41 REG15
RCFF
3
40 N.C.
RCFF
3
40 N.C.
RAMP
4
39 REG5
RAMP
4
39 REG5
OPTO
5
38 REG9
OPTO
5
38 REG9
CSS
6
37 PPWM
CSS
6
BST
7
36 DRVDEL
BST
7
DRVIN
8
35 PWMNEG
DRVIN
8
35 PWMNEG
PWMPNEG
9
34 CSN
PWMPNEG
9
34 CSN
RCOSC 10
33 CSP
RCOSC 10
33 CSP
FLTINT 11
32 CSOUT
FLTINT 11
32 CSOUT
20
21
22
23
24
25
26
27
28
PWMNEG
19
DEN
18
PWMNEG
17
POSINPWM
16
SRC
THIN QFN
EXPOSED PADDLE CONNECTED TO NEGIN.
15
XFRMRL
28
XFRMRL
27
SRC
26
29 PWMNEG
SRC
25
30 N.C.
N.C. 14
XFRMRL
24
NEGIN
XFRMRL
23
HSEN
XFRMRL
22
HSOK
SRC
21
POSINHS
N.C.
20
SRC
19
XFRMRL
18
XFRMRL
17
SRC
16
SRC
15
SRC
29 NEGIN
31 PWMNEG
SYNC 12
XFRMRL
N.C. 14
36 DRVDEL
PWMSD 13
SRC
30 HSGATE
N.C.
31 HSDRAIN
SYNC 12
PWMSD 13
37 PPWM
MAX5043ATN
SRC
MAX5042ATN
THIN QFN
EXPOSED PADDLE CONNECTED TO PWMNEG.
Chip Information
TRANSISTOR COUNT: 35,247
PROCESS: BiCMOS DMOS
______________________________________________________________________________________
21
MAX5042/MAX5043
Pin Configurations
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
56L THIN QFN.EPS
MAX5042/MAX5043
Two-Switch Power ICs with Integrated
Power MOSFETs and Hot-Swap Controller
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
22 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2004 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.