Application Note
USAGE OF PPC1663, DC to VHF WIDEBAND
DIFFERENTIAL INPUT AND OUTPUT AMPLIFIER IC
Document No. G12290EJ2V0AN00 (2nd edition)
Date Published October 1997 N
©
1997
Printed in Japan
[MEMO]
2
The information in this document will be updated without notice.
This document outlines a typical application of this product, that is, provides an example for designing
concept of an external circuit directly required for this product.
NEC only assures the quality and
characteristics of this product specified in the Data Sheet, and is not responsible for any user’s product
designs or application sets.
The peripheral circuit shown in this document is just an example prepared for evaluating the operations of
this product, and does not imply that the circuit configurations or constants are recommended values or
regulations. In addition, these circuits are not intended for any mass-produced application sets. This is
because the analog characteristics vary depending on the external parts used, mounting patterns, and other
conditions.
For this reason, customers are responsible for designing external circuits according to user-designed system
requirements by referring this document, and should also confirm the characteristics of their application circuit
before use.
No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this
document.
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from use of a device described herein or any other liability arising
from use of such device. No license, either express, implied or otherwise, is granted under any patents,
copyrights or other intellectual property rights of NEC Corporation or others.
While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on
a customer designated "quality assurance program" for a specific application. The recommended applications
of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each
device before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
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systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
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support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
Anti-radioactive design is not implemented in this product.
M4 96. 5
3
[MEMO]
4
CONTENTS
1.
GENERAL........................................................................................................................................................
7
2.
BASIC OPERATIONS.....................................................................................................................................
7
2.1
Outline of Operations...........................................................................................................................
7
2.2
Determination of Gain..........................................................................................................................
8
2.3
Gain Adjustments ................................................................................................................................
8
ELECTRICAL CHARACTERISTICS...............................................................................................................
9
3.
4.
5.
6.
7.
3.1
Differential Voltage Gain (AVD) ............................................................................................................
11
3.2
Bandwidth (BW)....................................................................................................................................
11
3.3
Rise Time (tr) and Propagation Delay Time (tpd) ................................................................................
11
3.4
Input Resistance (Rin) ..........................................................................................................................
11
3.5
Input Capacitance (Cin) ........................................................................................................................
11
3.6
Input Offset Current (IIO) ......................................................................................................................
11
3.7
Input Bias Current (IB)..........................................................................................................................
12
3.8
Input Noise Voltage (Vn) ......................................................................................................................
12
3.9
Input Voltage Range (VI) ......................................................................................................................
12
3.10 Common Mode Rejection Ratio (CMR)...............................................................................................
12
3.11 Supply Voltage Rejection Ratio (SVR) ...............................................................................................
12
3.12 Output Offset Voltage (VO(off))..............................................................................................................
13
3.13 Output Common Mode Voltage (VO(CM))..............................................................................................
13
3.14 Output Voltage Swing (VOp-p)...............................................................................................................
13
3.15 Output Sink Current .............................................................................................................................
13
3.16 Power Supply Current..........................................................................................................................
13
PRECAUTIONS FOR DESIGN IN.................................................................................................................
14
4.1
Cautions on Layout and Wiring ..........................................................................................................
14
4.2
Cautions on External Circuit ...............................................................................................................
14
4.3
Other Caution Points ...........................................................................................................................
14
APPLICATION CIRCUIT EXAMPLES ...........................................................................................................
16
5.1
Video Line Driver Circuit Example......................................................................................................
16
5.2
Optical Signal Detection Circuit Example..........................................................................................
17
EXAMPLE OF MOUNTING MEASURING CIRCUIT ON PRINTED BOARD ...........................................
18
6.1
Example of Mounting PPC1663G on Printed Board ..........................................................................
18
6.2
Example of Mounting PPC1663GV on Printed Board........................................................................
19
CONCLUSION .................................................................................................................................................
20
5
[MEMO]
6
1. GENERAL
The PPC1663 is a differential input, differential output wideband amplifier IC that uses a high-frequency (fT = 6
GHz) silicon bipolar process (called NESAT™ 1). This process improves bandwidth, phase characteristics, input
noise voltage characteristics, and low power consumption compared to conventional HF-band differential amplifier
ICs.
These features make this device suitable as a wideband amplifier in high-definition TVs, high-resolution monitors,
broadcasting satellite receivers, and video cameras, as a sense amplifier in high-density CCD and optical pick-up
products, or as a pulse amplifier for optical data links.
Note, however, that this device's wide frequency range means that extra caution is required with regard to factors
such as oscillation.
This application note describes how to use the PPC1663 and its application circuits.
2. BASIC OPERATIONS
2.1 Outline of Operations
Figure 1. Internal Equivalent Circuit
+
VCC
R10
R1
R2
R11
R8
Q5
Q6
Q3
IN1
G1A
Q1
Q4
IN2
Q2
R14
OUT1
G1B
R3
R4
(G2A)Note
R5
R16
R12
R6
Q8
R7
OUT2
R15
(G2B)
R9
Q9
R13
R18
Q10
R17
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
2.4 kΩ
2.4 kΩ
50 Ω
50 Ω
590 Ω
590 Ω
600 Ω
10 kΩ
1.4 kΩ
1.1 kΩ
R11
R12
R13
R14
R15
R16
R17
R18
R19
1.1 kΩ
750 Ω
300 Ω
7 kΩ
7 kΩ
1.2 kΩ
400 Ω
1.2 kΩ
400 Ω
Q11
R19
Note: The µ PC1664, which included G2A and G2B pins,
has been discontinued.
–
VCC
Figure 1 shows an internal equivalent circuit diagram of the PPC1663. It is a DC direct-coupled amplifier in which
two emitter-followers for transistors Q5 and Q6 are added to the two-stage differential configuration and in which
feedback is propagated from the output via R14 and R15.
Since OUT1 and OUT2 are differential outputs, the output voltage changes to the reverse direction at precisely
double the gain (single-end) of differential voltage 'VDIF added between the differential inputs IN1 and IN2. OUT1
operates in phase with IN1 and OUT2 operates in phase with IN2, so that, for example:
When IN1 > IN2, OUT1 changes to positive and OUT2 changes to negative
When IN1 < IN2, OUT1 changes to negative and OUT2 changes to positive
Accordingly, as is shown in Figure 2, if a sine wave is input to IN1 when IN2 is used as a ground, a sine wave
having the same phase as the IN1 input is output via OUT1 and a sine wave having a 180q inverted phase is output
via OUT2.
7
Figure 2. Response to Sine Wave Input
+
VCC
Remark
OUT1
IN1
For purposes of
simplification, the bypass
capacitor and gain select
IN2
OUT2
pin have been omitted in
some figures, such as
–
VCC
Figure 2.
2.2 Determination of Gain
Given re1 and re2 as the resistance values corresponding to the input differential transistors Q1 and Q2, the gain
can be approximated via the following equations.
Gain AVD1 for IN1 and OUT1
.
AVD1 =.
R14
........................... (1)
re1 + R3 + R5
Gain AVD2 for IN2 and OUT2
.
AVD2 =.
R15
re2 + R4 + R6
........................... (2)
Consequently, assuming that 'VDIF = VIN1 ð VIN2 as the differential voltage between IN1 and IN2, the output
voltage can be calculated as follows.
|'OUT1| =
|'OUT2| =
|'VDIF|
2
|'VDIF|
2
x AVD1 ........................ (3)
x AVD2 ........................ (4)
Since AVD1 = AVD2, we can add equations (3) and (4) to obtain the following.
AVD1 =
|'OUT1| + |'OUT2|
|'VDIF|
................... (5)
In equations (3), (4), and (5), A VD1 (AVD2) represents the differential output gain corresponding to the differential
input voltage. Therefore, the differential voltage gain and AVD1/2 (AVD2/2) are defined as single-end voltage gain
since it represents only one-sided output corresponding to the differential input voltage.
2.3 Gain Adjustments
The gain values shown in equations (1) and (2) in section 2.2 above are determined according to the resistance
applied to the emitter side of input differential transistors Q1 and Q2.
Accordingly, in the equivalent circuit shown in Figure 1, a short between gain select pins G1A and G1B or insertion
of an adjusting resistor can be used to adjust the gain in steps.
Setting a short between G1A and G1B sets maximum gain, with a typical value of 320 times the differential gain.
Setting an open connection between G1A and G1B sets minimum gain, with a typical value of 10 times the differential
gain. The electrical characteristics for the two gain select pin conditions, when Gain 1 is the maximum gain and Gain
2 is the minimum gain, are shown in Table 3.
If a gain adjusting resistor is inserted between G1A and G1B (as shown in Figure 4), any desired gain level can be
obtained. Depending on the application circuit, if the Rs value is changed, the input voltage amplitude appears like it
fluctuates due to changes in the interstage impedance, but the gain of the IC itself does not vary.
8
Figure 3. Pin Configuration of PPC1663 (Top View)
µ PC1663
IN2 1
8 IN1
G1A 2
7 G1B
VCC− 3
+
6 VCC
OUT2 4
5 OUT1
Figure 4. Differential Voltage Gain vs. Gain Adjustment Resistance Characteristics
Avd − RADJ characteristic
Differential gain Avd
1000
100
10
10
100
1k
10 k
Gain adustment resistance RADJ (Ω) between G1A and G1B
3. ELECTRICAL CHARACTERISTICS
The absolute maximum ratings are listed in Table 1, recommended operating conditions in Table 2, and electrical
characteristics in Table 3. Due to limitations that depend on the package, the supply voltage and temperature range
differ slightly. The electrical characteristics are identical, however, because the same chip is employed.
Table 1. Absolute Maximum Ratings
Symbol
Condition
PPC1663C
PPC1663G
PPC1663GV
Unit
VCCr
TA = +25qC
r8
r7
r7
V
Total dissipation
PD
Note
500
(TA = +85°C)
280
(TA = +75°C)
280
(TA = +75°C)
mW
Differential input voltage
VID
TA = +25qC
r5
r5
r5
V
Common mode input voltage
VICM
TA = +25qC,
–
+
within VCC to VCC range
r6
r6
r6
V
Output current
IO
TA = +25qC
35
35
35
mA
Operating ambient temperature
TA
ð45 to +85
ð45 to +75
–45 to +75
qC
Storage temperature
Tstg
ð55 to +150
ð55 to +150
–55 to +150
qC
Parameter
Power supply voltage
Note When mounted on a double sided copper clad 50 u 50 u 1.6 mm epoxy glass PWB
9
Table 2. Recommended Operating Conditions
Parameter
Symbol
MIN.
TYP.
MAX.
Unit
Power supply voltage
VCC (PPC1663C)
r2
r6
r7
V
Power supply voltage
VCCr (PPC1663G, PPC1663GV)
r2
r6
r6.5
V
Output source current
IO source
20
mA
IO sink
2.5
mA
200
MHz
r
Output sink current
Operating frequency range
fopt
DC
Table 3. Electrical Characteristics (TA = +25qqC, VCCr = r6 V)
Parameter
Differential voltage gain
Symbol
Gain 1
Avd
Gain 1
BW
Gain 2
Rise time
Gain 1
MIN.
TYP.
MAX.
200
320
500
8
10
12
RS = 50 :
—
120
—
(3 dB down point)
—
700
—
RS = 50 :, Vout = 1 VP-P
—
2.9
—
—
2.7
—
—
2
—
—
1.2
—
—
4.0
—
50
180
—
f = 10 MHz (Note 1)
f = 10 MHz
Gain 2
Bandwidth
Condition
tr
(Note 2)
Gain 2
Propagation delay
Gain 1
tpd
RS = 50 :, Vout = 1 VP-P
Gain 2
Input resistance
Gain 1
Rin
Gain 2
Unit
MHz
ns
ns
k:
Input capacitance
Cin
—
2
—
pF
Input offset current
IIO
—
0.4
5.0
PA
Input bias current
IR
—
20
40
PA
Input noise voltage
Vn
—
3
—
PVr.m.s
Input voltage range
VI
r1.0
—
—
V
RS = 50 :, 10 k to 10 MHz
CMR
Vcm = r1 V, f d 100 kHz
53
94
—
dB
Supply voltage rejection ratio
SVR
'V = r0.5 V
50
70
—
dB
Output offset voltage
VO(off)
VO(off) = |OUT1 ð OUT2|
—
0.3
1.5
V
—
0.1
1.0
2.4
2.9
3.4
V
3.0
4.0
—
VP-P
Common mode
rejection ratio
Gain 2
Gain 1
Gain 2
Output common mode voltage
VO(CM)
Output voltage swing
VOp-p
Single end
Output sink current
Isink
2.5
3.6
—
mA
Power supply current
ICC
—
13
20
mÁ
Notes 1. Gain 1 is when gain select pins G 1A and G1B are connected
2. Gain 2 is when none of the gain select pins are connected
Remark
10
The detailed specifications and package drawings should be referred to the data sheet (G11024E).
The electrical characteristics are defined as follows.
3.1 Differential Voltage Gain (AVD)
As was described in section 2.2, this indicates the ratio between the differential input and differential output
voltage.
AVD =
|'OUT1| + |'OUT2|
or
|'VDIF|
'|OUT1 ð 'OUT2|
|'VDIF|
The single-end gain (AVS) for single-side output is expressed as one half of A VD shown below.
AVS=
|'OUT1|
|'VDIF|
or
|'OUT2|
|'VDIF|
3.2 Bandwidth (BW)
This is defined as the bandwidth when there is a 3-dB down gain (1 / — 2) in relation to the DC gain.
3.3 Rise Time (tr) and Propagation Delay Time (tpd)
These are defined as shown below for this IC.
Figure 5. Measurement Conditions for tpd and tr
50 %
tpd
90 %
50 %
10 %
tr
3.4 Input Resistance (Rin)
This indicates the ratio of the change in the input bias voltage ('IB) to the change in the input voltage ('VIN).
RIN = 'VIN/'IB
The input resistance is defined as the product of the input transistor's current gain E and the emitter resistance.
Therefore, this value is reduced in relation to higher gain values.
3.5 Input Capacitance (Cin)
This indicates the capacitance between the input and the GND.
3.6 Input Offset Current (IIO)
This is the offset current of the dual input bias current.
IIO = |IB1 ð IB2|
11
3.7 Input Bias Current (IB)
This indicates the base current at input transistors Q1 and Q2.
3.8 Input Noise Voltage (Vn)
In Figure 6, the value measured by an RF AC voltmeter is divided by the single-end gain value.
Figure 6. Input Noise Voltage Measurement Circuit
10 kHz to 10 MHz
(passive filter)
VCC+
6
50 Ω
50 Ω
5
RF AC voltmeter
8
1 kΩ
3 4
1
V
1 kΩ
–
CC
3.9 Input Voltage Range (VI)
This indicates the input voltage range for normal operation, during which input signals must be within this range.
With the intermediate potential between VCC and VCCð as the center, the input voltage range is guaranteed within r1
+
V (when VCC ð
+
VCCð
= 12 V).
3.10 Common Mode Rejection Ratio (CMR)
Figure 7. Common Mode Rejection Ratio Measurement Circuit
+
VCC
6
5
8
∆ VIN
50 Ω
1
Differential probe ∆ VO = ∆ OUT1 + ∆ OUT2
3 4
–
VCC
This indicates the rate of variation in the input conversion offset relative to the common mode input signal. This
can be expressed as follows, based on the circuit shown in Figure 7.
CMR = 20 log 'VIN
'VO
12
x AVD
3.11 Supply Voltage Rejection Ratio (SVR)
This indicates the rate of variation in the input conversion offset relative to the supply voltage.
This can be expressed as follows, based on the circuit shown in Figure 8.
SVR = 20 log
'V+
'VO
x
AVD
+
Figure 8. Supply Voltage Rejection Ratio Measurement Circuit (V side)
+
VCC+ ± ∆ V
6
5
8
50 Ω
∆ VO = ∆ OUT1 + ∆ OUT2
1
50 Ω
3
4
–
VCC
3.12 Output Offset Voltage (VO(off))
This indicates the DC voltage difference between both outputs when both of the differential inputs voltage is not
applied.
VO(off) = |OUT1 – OUT2|
3.13 Output Common Mode Voltage (VO(CM))
This indicates the average value from both output’s DC voltages when both of the differential inputs voltage is not
applied.
VO(CM) = OUT1 + OUT2
2
3.14 Output Voltage Swing (VOp-p)
This indicates the maximum amplitude (swing) that occurs without distortion, mainly in the output common mode
voltage.
3.15 Output Sink Current
This indicates the sink current capacity of transistors Q10 and Q11. If a current that exceeds this value is accepted,
the output voltage swing is greatly reduced.
3.16 Power Supply Current
This indicates the circuit current and does not include the output load current.
13
4. PRECAUTIONS FOR DESIGN IN
4.1 Cautions on Layout and Wiring
In high-frequency circuits, the PCB design can considerably influence circuit performance.
When using this device with an especially high gain, you must note that oscillation might occur even when there is
only a slight amount of external feedback.
The following cautions concern the device mounting layout.
x Form as wide an area as possible for the ground pattern so as to prevent feedback due to conductor
inductance (a double sided copper clad epoxy glass PWB is recommended).
x Make the leads from external components and the link wiring between front and rear components as short as
possible.
x Use a single ground as the ground for input/output circuit and the power supply.
x Form the ground pattern to shield the input and output wiring so as to prevent feedback due to stray
capacitance.
x Lay out the output signal current path at a distance from the input wiring.
x The power supply is bypassed very near to the IC's power supply pin by a small-inductance, high-frequency
capacitor. If the power supply wiring is long, insert a small resistance (up to 10 :) in series.
x The ground for the bypass capacitor should be laid out in order to form a loop only with the power supply line
so as to prevent the high-frequency current that runs throughout the PCB from entering the input.
4.2 Cautions on External Circuit
This IC features greatly improved phase characteristics, such that the characteristics inherent to this IC make it
one of the more stable wideband amplifier ICs. However, the following cautions should be noted when this IC is used
in application circuits.
x Whenever possible, the signal source resistance values should be the same for the two inputs. Signal source
resistance values should be minimized, with 1 k: maximum (If the signal source impedance is too large, the
input amplitude becomes large and the output will become saturated).
x Whenever possible, the load resistance values should be the same for the two outputs.
* For this IC, it is essential that a balance be maintained between the two lines (IN1 to OUT1 and IN2 to OUT2)
in the application circuit.
4.3 Other Caution Points
x Use of single (power) supply
This IC can be used with a single supply if the input voltage is biased at the intermediate between VCC and VCCð,
+
as is shown in the application circuit example in the data sheet. More detailed circuit examples and their
characteristics are shown in Figure 9 and Tables 4 and 5.
Note, however, that in this case the load current along RL is more than twice as great as when the load is
VO(CM)
connected with r power supply to a ground (recommended: max. 20 mA, IO =
).
RL
14
Figure 9. Example Using Single Power Supply
Supply Voltage (See Table 4)
Input
+5 V
5
8
50 Ω
RS
0.01 µF
2.2 µ F
3 kΩ
2.2 µF
6
0.01 µF
RS
50 Ω
3 kΩ
2.2 µF
Output 1
RL
µ PC1663
1
0.01 µF
0.01 µF
50 Ω
Output 2
4
3
RL
50 Ω
0.01 µF
Table 4. Reference Usage Range
Parameter
+
–
VCC – VCC
Supply voltage
Condition
PPC1663C
PPC1663G
PPC1663GV
Unit
Single power supply
–0.3 to +16
–0.3 to +14
–0.3 to +14
V
Symbol
Table 5. +5 V Single Power Supply Operation Performance (Based on Figure 9)
Parameter
Gain
Condition
Gain 1
Characteristics
Unit
35
dB
15 MHz
Gain 2
Bandwidth
Gain 1
11
3 dB down point
Gain 2
106
MHz
115
Rise time
Gain 1
RS = 50 :, VOUT = 80 mVP-P
2.2
ns
Propagation delay
Gain 1
RS = 50 :, VOUT = 80 mVP-P
2.8
ns
time
Gain 2
RS = 50 :, VOUT = 60 mVP-P
1.8
Phase
Gain 1
100 MHz
Gain 2
Output, Max.
–123
degree
–93
RL = 240 :
RL = 50 :
RL = 910 :
15 MHz
RL = 80 :
5.0
dBm
0
–11.5
x Driving a low-impedance line
As was described in section 3.15 above, the sink current of the IC itself is only 3.6 mA (TYP.), which is
inadequate for driving a low-impedance line such as a video line. As is shown in Figure 10, it is possible to
drive a low-impedance line if a bypass resistor rated between 150 and 600 : is connected and a capacitor
coupling is used to link the increased drive capacity of the output-level emitter-follower.
In this case, the output current (IO = (VO(CM) / RL) generated based on the R L value should not be more than 20
mA.
15
Figure 10. Driving a Low Impedance Line
+6 V
6
C
5
RL
150 to 600 Ω
3
4
RL
−6 V
5. APPLICATION CIRCUIT EXAMPLES
5.1 Video Line Driver Circuit Example
Figure 11. Video Line Driver Circuit Example
+6 V
<b>
<a>
0.1 µ F
6 5
75 Ω
COAXIAL
Vout
8
eIN
µ PC1663
75 Ω
1
75 Ω
3 4
200 Ω
75 Ω
200 Ω
−6 V
Maximum output voltage Vout (VP-P)
Figure 12. Vout vs. f Characteristics (Video Line, Single End)
Remark
2.0
the values of point <a> in Figure 11 of the
application circuit. The values for the
PPC1663 are those of point <b>, therefore
when converted, they are equivalent to
1.0
approximately twice the value of Vout at
point <a>. Because the measured values
at point <a> are single-end, in the case of
0
100 k
differential I/O, the values of points <a>
1M
10 M
Frequency f (Hz)
16
The measurement results in Figure 12 are
100 M
1G
and <b> are twice the value of the singleend values.
Phase characteristics (degree)
Figure 13. Phase Characteristics vs. Frequency Characteristics
0
−45
−90
Gain 2
−135
−180
Gain 1
100 k
1M
10 M
Frequency f (Hz)
100 M
5.2 Optical Signal Detection Circuit Example
Figure 14. Optical Signal Detection Circuit Example
VC
VCC+ = +5 V
VC
R2
75 Ω
R5
1 kΩ
R4
50 Ω
8
Pin photodiode
6
5
Q1
µ PC1663
2SK238
4
2 7
1
3
NDL2102
NDL2104
NDL2208
NDL5200
50 Ω
R1
R3
50 Ω
R6
1 kΩ
1 000 pF
C1
1 000 pF
C2
VCC– = –5 V
Since a high gain value may lower the IC's input impedance, stable operation can be ensured by including an FET
buffer (source follower), as is shown in Figure 14. This FET buffer also shifts the level of the input voltage from the
diode. For detail on the FET and PIN photodiode, see the data sheet for each product.
17
6. EXAMPLE OF MOUNTING MEASURING CIRCUIT ON PRINTED BOARD
6.1 Example of Mounting PPC1663G on Printed Board
Figure 15 shows an example of mounting of 8-pin SOP 225-mil type product on a PCB for use in the test circuit
described in the PPC1663 data sheet. The evaluation board in Figure 15 is designed for single-end test circuit of IN2
input and OUT2 output.
Figure 15. Example of assembled test Circuit on Evaluation Board
1
µ PC1663G
IN2
C4
R2
R1
C1
C5
VCC–
C3
VCC+
R3
C2
R4
OUT2
Parts Table
No.
Notes on Printed Board
Value
C1 to 3
0.1 PF
C4 to 5
1000 pF
R1 to 2
50 :
R3
1 k:
R4
950 :*
(*1) 35-Pm copper patterning on both sides of 50 u 50 u 0.4-mm
polyimide board
(*2) Rear side ground pattern
(*3) Solder plating of patterning side
(*4)
{ is through-hole.
(*5) To mount C2, pattern should be cut.
* R4 is the value obtained by subtracting the impedance of the measuring instrument from R3.
18
6.2 Example of Mounting PPC1663GV on Printed Board
Figure 16 shows an example of mounting of 8-pin SSOP 175-mil type product on a PCB for use in the test circuit
described in the PPC1663 data sheet. This evaluation board can be used either for a single-end or differential
amplifier. The assembled example in Figure 16 is for a single-end amplifier and provides one IN1 and one OUT1
pins.
Figure 16. Example of assembled test Circuit on Evaluation Board
VCC–
VCC +
µ PC1663GV
1
C
1
IN1
R1
2
C4
C5
R
C
3
C
2
R
3
4
R
OUT1
Parts Table
No.
C1 to 3
Notes on Printed Board
Value
(*1) 35-Pm copper patterning on both sides of 50 u 50 u 0.4-mm
polyimide board
0.1 PF
C4 to 5
1000 pF
R1 to 2
50 :
R3
1 k:
R4
950 :*
(*2) Rear side ground pattern
(*3) Solder plating of patterning side
(*4)
{ is through-hole.
(*5) To mount R4, pattern should be cut.
* R4 is the value obtained by subtracting the impedance of the measuring instrument from R3.
19
7. CONCLUSION
The usage of the PPC1663 DC to VHF wideband differential input and output amplifier IC has been described
above.
Another product that uses a high-frequency process, the PPC2726T, is also offered as an L-band differential input
and differential output wideband amplifier IC that operates up to 1.6 GHz.
Reference Materials
PPC1663 Data Sheet (Document No. G11024E)
PPC2726T Data Sheet (Document No. P10873E)
20
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21
[MEMO]
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