NSC LM95235

LM95235
Precision Remote Diode Temperature Sensor with
SMBus Interface and TruTherm™ Technology
General Description
The LM95235 is an 11-bit digital temperature sensor with a
2-wire System Management Bus (SMBus) interface and TruTherm technology that can monitor the temperature of a
remote diode as well as its own temperature. The LM95235
can be used to very accurately monitor the temperature of
external devices such as microprocessors, graphics processors, or a diode-connected MMBT3904 transistor. TruTherm
technology allows the LM95235 to precisely monitor thermal
diodes found in 90 nm and smaller geometry processes.
LM95235 reports temperature in two different formats for
+127.875˚C/-128˚C range and 0˚C/255˚C range. The
LM95235 T_CRIT and OS outputs are asserted when either
unmasked channel exceeds its programmed limit and can be
used to shutdown the system, to turn on the system fans, or
as a microcontroller interrupt function. The current status of
the T_CRIT and OS pins can be read back from the status
registers via the SMBus interface. All limits have a shared
programmable hysteresis register.
The remote temperature channel of the LM95235 has a
programmable digital filter. The LM95235 contains a diode
model selection bit to select between a typical Intel ® processor on a 65 nm or 90 nm process or MMBT3904, as well as
an offset register for maximum flexibility and best accuracy.
The LM95235 has a three-level address pin to connect up to
3 devices to the same SMBus master, that is shared with the
OS output. The LM95235 has a programmable conversion
rate register and a standby mode to save power. One conversion can be triggered in standby mode by writing to the
one-shot register.
Features
n Remote and Local temperature channels
n Diode Model Selection Bit - MMBT3904 or 65/90 nm
processor diodes
Two Formats: −128˚C to +127.875˚C and 0˚C to 255˚C
Digital filter for remote channel
Programmable TCRIT and OS thresholds
Programmable shared hysteresis register
Diode Fault Detection
Mask, Offset, and Status Registers
SMBus 2.0 compatible interface, supports TIMEOUT
Programmable conversion rate for best power
consumption
Three-level address pin
Standby mode one-shot conversion control
Pin-for-pin compatible with the LM86/LM89
8-pin MSOP package
n
n
n
n
n
n
n
n
n
n
n
n
Key Specifications
j Supply Voltage
j Supply Current, Conv. Rate = 1 Hz
3.0 V to 3.6 V
350 µA (typ)
j Remote Diode Temperature Accuracy
TA = 25˚C to 85˚C; TD = 60˚C to 100˚C ± 0.75˚C (max)
TA = 25˚C to 85˚C; TD = 40˚C to 120˚C
± 1.5˚C (max)
j Local Temperature Accuracy
TA = 25˚C to 100˚C
j Conversion Rate, Both Channels
± 2.0˚C (max)
16 to 0.4 Hz
Applications
n Processor/Computer System Thermal Management
(e.g. Laptops, Desktops, Workstations, Servers)
n Electronic Test Equipment
n Office Electronics
Connection Diagram
MSOP-8
20174902
TOP VIEW
TruTherm™ is a trademark of National Semiconductor Corporation.
Intel ® is a registered trademark of Intel Corporation.
Pentium ® is a registered trademark of Intel Corporation.
Intel ® Core™ Duo is a trademark of Intel Corporation.
Intel ® Core™ Solo is a trademark of Intel Corporation.
© 2006 National Semiconductor Corporation
DS201749
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LM95235 Precision Remote Diode Temperature Sensor with SMBus Interface and TruTherm
Technology
May 2006
LM95235
Ordering Information
Order Code
Package
Marking
NS Package Number
Transport Media
LM95235CIMM
T36C
MUA08A (MSOP-8)
1000 Units on Tape and Reel
LM95235CIMMX
T36C
MUA08A (MSOP-8)
3500 Units on Tape and Reel
Simplified Block Diagram
20174901
Pin Descriptions
Pin
Number
Name
Type
Function and Connection
1
VDD
Power
Device power supply. Requires bypass capacitor of 10 µF in parallel with
0.1 µF and 100 pF. Place 100 pF closest to device pin.
2
D+
Analog Input/Output
Positive input from the thermal diode.
3
D-
Analog Input/Output
Negative input from the thermal diode.
4
T_CRIT
Digital Output
5
GND
Ground
Critical temperature output. Open-drain output requires pull-up resistor.
Active “LOW”.
Device ground.
6
OS/A0
Digital Input/Output
Over-temperature shutdown comparator output or SMBus slave address
input. Defaults as an SMBus slave address input that selects one of
three addresses. Can be tied to VDD, GND, or to the middle of a resistor
divider connected between VDD and GND. When programmed as an OS
comparator output it is active “Low” and open drain.
7
SMBDAT
Digital Input/Output
SMBus interface data pin. Open-drain output requires pull-up resistor.
8
SMBCLK
Digital Input
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SMBus interface clock pin.
2
LM95235
Typical Application
20174903
3
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LM95235
Absolute Maximum Ratings (Note 1)
Operating Ratings
Supply Voltage, VDD
−0.3V to 6.0V
Voltage at SMBDAT, SMBCLK,
−0.5V to 6.0V
(Note 1)
Operating Temperature Range
Electrical Characteristics
Temperature Range
T_CRIT, OS/A0 Pins
Voltage at Other Pins
(VDD +0.3V)
Input Current at D− Pin (Note 4)
± 1 mA
Input Current at All Other Pins
(Note 4)
± 5 mA
SMBDAT, T_Crit, OS Pins
10 mA
30 mA
ESD Susceptibility (Note 3)
Human Body Model
Machine Model
Charged Device Model
2500V
250V
1000V
Junction Temperature (Note 2)
+3.0V to +3.6V
Soldering process must comply with National Semiconductor’s Reflow Temperature Profile specifications. Refer to
www.national.com/packaging. (Note 5)
Output Sink Current
Storage Temperature
TMIN ≤ TA ≤ TMAX
0˚C ≤ TA ≤ +85˚C
LM95235CIMM
Supply Voltage (VDD)
Package Input Current (Note 4)
0˚C to +125˚C
+125˚C
−65˚C to +150˚C
Temperature-to-Digital Converter Characteristics
Unless otherwise noted, these specifications apply for VDD = +3.0 Vdc to 3.6 Vdc. Boldface limits apply for TA = TJ = TMIN ≤
TA ≤ TMAX; all other limits TA = TJ = +25˚C, unless otherwise noted. TJ is the junction temperature of the LM95235. TD is the
junction temperature of the remote thermal diode.
Parameter
Temperature Accuracy Using Local
Diode (Note 8)
Temperature Accuracy Using
Remote Diode
(Note 9)
Remote Diode
Measurement Resolution
Conditions
TA = 25˚C to +100˚C
Typical
(Note 6)
Limits
(Note 7)
Units
±1
±2
˚C (max)
TA = +25˚C to +85˚C;
TD = +60˚C to +100˚C
65nm Intel Processor
± 0.5
± 0.75
˚C (max)
TA = +25˚C to +85˚C;
TD = +60˚C to +100˚C
MMBT3904
± 0.5
± 1.0
˚C (max)
TA = +25˚C to +85˚C;
TD = +40˚C to +120˚C
MMBT3904 or
65nm Intel Processor
± 0.75
± 1.5
˚C (max)
11
Digital Filter Off
Digital Filter On
Local Diode Measurement
Resolution
˚C
13
Bits
0.03125
˚C
11
Bits
0.125
Conversion Time, Fastest Setting
(Note 10)
Local and Remote Channels
63
Local or Remote Channels
33
Quiescent Current
SMBus Inactive, 1 Hz conversion rate
(Note 11)
350
Standby Mode
300
High-level
172
Low-level
10.75
D− Source Voltage
External Diode Current Source
Bits
0.125
˚C
72
ms
650
µA (max)
µA
400
Diode Source Current Ratio
ms (max)
mV
225
µA (max)
µA
16
Power-On Reset Voltage
2.8
V (max)
1.6
V (min)
T_CRIT Pin Temperature Threshold
Default
+110
˚C
OS Pin Temperature Threshold
Default
+85
˚C
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4
LM95235
Logic Electrical Characteristics
Digital DC Characteristics
Unless otherwise noted, these specifications apply for VDD= +3.0 Vdc to 3.6 Vdc. Boldface limits apply for TA = TJ = TMIN to
TMAX; all other limits TA= TJ= +25˚C, unless otherwise noted.
Symbol
Parameter
Conditions
Typical
Limits
Units
(Note 6)
(Note 7)
(Limit)
SMBDAT, SMBCLK INPUTS
VIN(1)
Logical “1” Input Voltage
2.1
V (min)
VIN(0)
Logical “0” Input Voltage
0.8
V (max)
VIN(HYST)
SMBDAT and SMBCLK Digital Input Hysteresis
IIN(1)
Logical “1” Input Current
VIN = VDD
−0.005
−10
µA (max)
IIN(0)
Logical “0” Input Current
VIN = 0 V
0.005
+10
µA (max)
CIN
Input Capacitance
400
mV
5
pF
A0 DIGITAL INPUT
VIH
Input High Voltage
VIM
Input Middle Voltage
VIL
Input Low Voltage
IIN(1)
Logical “1” Input Current
VIN = VDD
IIN(0)
Logical “0” Input Current
VIN = 0 V
CIN
Input Capacitance
0.90 x VDD
V (min)
0.57 x VDD
V (max)
0.43 x VDD
V (min)
0.10 x VDD
V (max)
−0.005
−10
µA (max)
0.005
+10
µA (max)
5
pF
SMBDAT, T_CRIT, OS DIGITAL OUTPUTS
IOH
High Level Output Leakage Current
VOUT = VDD
10
µA (max)
VOL(T_CRIT, OS)
T_CRIT, OS Low Level Output Voltage
IOL = 6 mA
0.4
V (max)
VOL(SMBDAT)
SMBDAT Low Level Output Voltage
IOL = 4 mA
IOL = 6 mA
0.4
0.6
V (max)
V (max)
COUT
Digital Output Capacitance
5
5
pF
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LM95235
Logic Electrical Characteristics
(Continued)
SMBus Digital Switching Characteristics
Unless otherwise noted, these specifications apply for VDD= +3.0 Vdc to +3.6 Vdc, CL (load capacitance) on output lines =
80 pF. Boldface limits apply for TA = TJ = TMIN to TMAX; all other limits TA = TJ = +25˚C, unless otherwise noted. The
switching characteristics of the LM95235 fully meet or exceed the published specifications of the SMBus version 2.0. The following parameters are the timing relationships between SMBCLK and SMBDAT signals related to the LM95235. They adhere
to, but are not necessarily, the SMBus specifications.
Symbol
Parameter
Conditions
Typical
Limits
Units
(Note
6)
(Note 7)
(Limit)
100
10
kHz (max)
kHz (min)
fSMB
SMBus Clock Frequency
tLOW
SMBus Clock Low Time
from VIN(0)max to VIN(0)max
4.7
25
µs (min)
ms (max)
tHIGH
SMBus Clock High Time
from VIN(1)min to VIN(1)min
4.0
µs (min)
tR,SMB
SMBus Rise Time
(Note 12)
1
µs (max)
tF,SMB
SMBus Fall Time
(Note 13)
0.3
µs (max)
tOF
Output Fall Time
CL = 400 pF,
IO = 3 mA, (Note 13)
tTIMEOUT
tSU;DAT
250
ns (max)
SMBDAT and SMBCLK Time Low for Reset
of Serial Interface (Note 14)
25
35
ms (min)
ms (max)
Data In Setup Time to SMBCLK High
250
ns (min)
tHD;DAT
Data Out Stable after SMBCLK Low
300
1075
ns (min)
ns (max)
tHD;STA
Start Condition SMBDAT Low to SMBCLK
Low (Start condition hold before the first
clock falling edge)
100
ns (min)
tSU;STO
Stop Condition SMBCLK High to SMBDAT
Low (Stop Condition Setup)
100
ns (min)
tSU;STA
SMBus Repeated Start-Condition Setup
Time, SMBCLK High to SMBDAT Low
0.6
µs (min)
tBUF
SMBus Free Time Between Stop and Start
Conditions
1.3
µs (min)
SMBus Communication
20174909
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6
LM95235
Logic Electrical Characteristics
(Continued)
Notes
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its rated operating conditions.
Note 2: Thermal resistance junction-to-ambient when attached to a printed circuit board with 1 oz. foil and no airflow is:
θJA for MSOP-8 package = 210˚C/W
Note 3: Human body model (HBM) is a charged 100 pF capacitor discharged into a 1.5 kΩ resistor. Machine model (MM), is a charged 200 pF capacitor discharged
directly into each pin. Charged Device Model (CDM) simulates a pin slowly acquiring charge (such as from a device sliding down the feeder in an automated
assembler) then rapidly being discharged.
Note 4: When the input voltage (VI) at any pin exceeds the power supplies (VI < GND or VI > VDD), the current at that pin should be limited to 5 mA.
Parasitic components and or ESD protection circuitry are shown in the figures below for the LM95235’s pins. Care should be taken not to forward bias the parasitic
diodes on pins 2 and 3. Doing so by more than 50 mV may corrupt the temperature measurements. SNP refers to Snap-back device.
Pin #
Label
Circuit
1
VDD
B
2
D+
A
3
D−
A
4
T_CRIT
C
5
GND
B
6
OS/A0
C
7
SMBDAT
C
8
SMBCLK
C
Pin ESD Protection Structure Circuits
Circuit A
Circuit B
Circuit C
Note 5: Reflow temperature profiles are different for packages containing lead (Pb) than for those that do not.
Note 6: Typicals are at TA = 25˚C and represent most likely parametric norm.
Note 7: Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8: Local temperature accuracy does not include the effects of self-heating. The rise in temperature due to self-heating is the product of the internal power
dissipation of the LM95235 and the thermal resistance. See (Note 2) for the thermal resistance to be used in the self-heating calculation.
Note 9: The accuracy of the LM95235 is guaranteed when using a typical thermal diode of an Intel processor on a 65 nm process or an MMBT3904
diode-connected transistor, as selected in the Remote Diode Model Select register. See typical performance curve for performance with Intel processor on a 90nm
process.
Note 10: This specification is provided only to indicate how often temperature data is updated. The LM95235 can be read at any time without regard to conversion
state (and will yield last conversion result).
Note 11: Quiescent current will not increase substantially when the SMBus is active.
Note 12: The output rise time is measured from (VIN(0)max - 0.15V) to (VIN(1)min + 0.15V).
Note 13: The output fall time is measured from (VIN(1)min + 0.15V) to (VIN(0)max - 0.15V).
Note 14: Holding the SMBDAT and/or SMBCLK lines Low for a time interval greater than tTIMEOUT will reset the LM95235’s SMBus state machine, therefore setting
SMBDAT and SMBCLK pins to a high impedance state.
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LM95235
Typical Performance Characteristics
Thermal Diode Capacitor or PCB Leakage Current Effect
Remote Diode Temperature Reading
Remote Temperature Reading Sensitivity to Thermal
Diode Filter Capacitance, TruTherm Enabled
20174905
20174907
Conversion Rate Effect on Average Power Supply
Current
Intel Processor on 65nm Process or 90nm Process
Thermal Diode Performance Comparison
20174906
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20174950
8
The LM95235 is a temperature sensor that measures Local
and Remote temperature zones. The LM95235 uses a ∆Vbe
temperature sensing method. A differential voltage, representing temperature, is digitized using a Sigma-Delta analog
to digital converter. TruTherm Technology allows the
LM95235 to accurately sense the temperature of a thermal
diode found on die fabricated using a sub-micron process.
For more information on TruTherm Technology see Section
3.0 Application Hints. The LM95235 is compatible with the
serial SMBus version 2.0 two-wire serial interface.
The LM95235 has OS and TCRIT open-drain digital outputs
that indicate the state of the local and remote temperature
readings when compared to user-programmable limits. If
enabled, the local temperature is compared to the userprogrammable Local Shared OS and TCRIT Limit Register
(Default Value = 85˚C). The comparison result can trigger
the T_CRIT pin and/or the OS pin depending on the settings
of the Local TCRIT Mask and OS Mask bits found in Configuration Register 1. The comparison result can also be
read back from Status Register 1. If enabled, the remote
temperature is compared to the user-programmable Remote
TCRIT Limit Register (Default Value = 110˚C), and the Remote OS Limit Register (Default Value = 85˚C) values. The
comparison result can trigger the T_CRIT pin and/or the OS
pin depending on the settings of Configuration Register 1.
The following table describes the default temperature settings for each measured temperature that triggers T_CRIT
and/or OS pins:
Output Pin
Remote, ˚C
T_CRIT
110
85
OS
85
85
All Limit Registers support unsigned temperature format with
1˚C LSb resolution. The Local Shared TCRIT and OS Limit
Register is 7 bits for limits between 0˚C and 127˚C. The
Remote Temperature TCRIT and OS Limit Registers are 8
bits each for limits between 0˚C and 255˚C.
1.1 CONVERSION SEQUENCE
In the power-up default state the LM95235 takes a maximum
of 1 second to convert the Local Temperature, Remote Temperature, and to update all of its registers. Only during the
conversion process is the Busy bit (D7) in Status Register 1
(02h) high. These conversions are addressed in a roundrobin sequence. The conversion rate may be modified by the
Conversion Rate bits found in the Conversion Rate Register
(R/W: 04h/0Ah). When the conversion rate is modified a
delay is inserted between conversions, the actual maximum
conversion time remains at 72 ms. Different conversion rates
will cause the LM95235 to draw different amounts of supply
current as shown in Figure 1.
Local, ˚C
The following table describes the limit register mapping to
the T_CRIT and/or OS pins:
Output Pin
Remote
Local
T_CRIT
Remote
TCRIT Limit
Local Shared
OS/TCRIT Limit
OS
Remote OS
Limit
Local Shared
OS/TCRIT Limit
The T_CRIT and OS outputs are open-drain, active low.
The remote temperature readings support a programmable
digital filter. Based on the settings in Configuration Register
2 a digital filter can be turned on to improve the noise
performance of the remote temperature as well as to increase the resolution of the temperature reading. If the filter
is enabled the filtered readings are used for TCRIT and OS
comparisons. The LM95235 may be placed in low power
consumption (Standby) mode by setting the STOP/RUN bit
found in Configuration Register 1. In the Standby mode, the
LM95235’s SMBus interface remains active while all circuitry
not required is turned off. In the Standby mode the host can
trigger one round of conversions by writing to the One-Shot
Register. The value written into this register is not kept. Local
and Remote temperatures will be converted once and the
T_CRIT and OS pins will reflect the comparison results
based on this set of conversions results.
All the temperature readings are in 16-bit left-justified word
format. The 10-bit plus sign local temperature reading is
contained in two 8-bit registers: Local Temp MSB and Local
Temp LSB Registers. The remote temperature supports both
a 13-bit unsigned and a 12-bit plus sign format. These
20174906
FIGURE 1. Conversion Rate Effect on Power Supply
Current
1.2 POWER-ON-DEFAULT STATES
LM95235 always powers up to these known default states.
The LM95235 remains in these states until after the first
conversion.
1. Command Register set to 00h
2. Conversion Rate register defaults to 02h (1 second).
3. Local Temperature set to 0˚C until the end of the first
conversion
4. Remote Diode Temperature set to 0˚C until the end of
the first conversion
5. Remote OS limit default is 55h (85 ˚C).
6. Local Shared and TCRIT limit default is 55h (85 ˚C).
9
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LM95235
readings are available in their corresponding registers as
described in the LM95235 Register table. The lower 2-bits of
the remote temperature reading will contain temperature
information only if the digital filter is enabled. If the digital
filter is disabled, these two bits will read back 0.
The signed and unsigned remote temperature readings are
available simultaneously in separate registers, therefore allowing both negative temperatures and temperatures 128˚C
and above to be measured.
1.0 Functional Description
LM95235
1.0 Functional Description
Figure 2 depicts the filter output in response to a step input
and an impulse input.
(Continued)
7.
Remote TCRIT limit default is 6Eh (110 ˚C).
8.
9.
Remote Offset High and Low bytes default to 00h.
Configuration Register 1 defaults to 00h. This sets the
LM95235 as follows:
A. The STOP/RUN defaults to the active/converting
mode.
B. The Local and Remote TCRIT and OS Masks are
reset to 0.
10. Configuration Register 2 defaults to 1Fh. This sets the
LM95235 as follows:
A. Remote Diode digital filter defaults on.
B. The Remote Diode mode defaults to a typical Intel
processor on 65/90 nm process.
C. Diode Fault Mask bit for TCRIT defaults to 1.
20174925
a) Seventeen and fifty degree step response
D. Diode Fault Mask bit for OS defaults to 0.
E. Pin 6 Function defaults to Address Input function
(A0).
1.3 SMBus INTERFACE
The LM95235 operates as a slave on the SMBus, so the
SMBCLK line is an input and the SMBDAT line is bidirectional. The LM95235 never drives the SMBCLK line and it
does not support clock stretching. According to SMBus
specifications, the LM95235 has a 7-bit slave address. Three
SMBus addresses can be selected by connecting pin 6 (A0)
to either Low, Mid-Supply or High voltages. The address
selection table below shows the possible selections.
SMBus Device Address
State of the A0 Pin
HEX
Binary
18
001 1000
Mid-Supply
29
010 1001
High
4C
100 1100
Low
20174926
b) Impulse response with input transients less than
4˚C
The OS/A0 pin, after power-up, defaults as an address
select input pin (A0). After power-up, the OS/A0 pin can only
be programmed as an OS output when it is in the “High”
state. Therefore, 4Ch is the only valid slave address that can
be used when the OS/A0 pin is programmed to function as
an OS output. When the OS/A0 pin is programmed to function as an A0 input the LM95235 will immediately detect the
state of this pin to determine its SMBus slave address. The
LM95235 does not latch the state of the A0 pin when it is
functioning as an input.
1.4 DIGITAL FILTER
In order to suppress erroneous remote temperature readings
due to noise, the LM95235 incorporates a digital filter for the
Remote Temperature Channel. The filter is accessed in the
Configuration Register 2, bits D2 (FE1) and D1(FE0). The
filter can be set according to the following table.
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FE1
FE0
0
0
Filter Off
0
1
Reserved
1
0
Reserved
1
1
Filter On
20174928
c) Impuse response with input transients greater than
4˚C
Filter Setting
FIGURE 2. Filter Impulse and Step Response Curves
Figure 3 shows the filter in use in a typical Intel processor on
a 65/90 nm process system. Note that the two curves have
been purposely offset for clarity. Inserting the filter does not
induce an offset as shown.
10
(Continued)
Temperature
Digital Output
Binary
Hex
+25˚C
0001 1001 0000 0000
1900h
+1˚C
0000 0001 0000 0000
0100h
+0.125˚C
0000 0000 0010 0000
0020h
0˚C
0000 0000 0000 0000
0000h
13-bit, 2’s complement (12-bit plus sign)
Temperature
20174927
FIGURE 3. Digital Filter Response in a typical Intel
processor on a 65 nm or 90 nm process. The filter
curves were purposely offset for clarity.
1.5 TEMPERATURE DATA FORMAT
Temperature data can only be read from the Local and
Remote Temperature registers.
Remote temperature data with the digital filter off is represented by an 10-bit plus sign, two’s complement word and
11-bit unsigned binary word with an LSb (Least Significant
Bit) equal to 0.125˚C. The data format is a left justified 16-bit
word available in two 8-bit registers. Unused bits report "0".
Remote temperature data with the digital filter on is represented by a 12-bit plus sign, two’s complement word and
13-bit unsigned binary word with an LSb (Least Significant
Bit) equal to 0.03125˚C (1/32˚C). The data format is a left
justified 16-bit word available in two 8-bit registers. Unused
bits report "0".
Digital Output
Binary
Hex
+125˚C
0111 1101 0000 0000
7D00h
+25˚C
0001 1001 0000 0000
1900h
+1˚C
0000 0001 0000 0000
0100h
+0.03125˚C
0000 0000 0000 1000
0008h
0˚C
0000 0000 0000 0000
0000h
−0.03125˚C
1111 1111 1111 1000
FFF8h
−1˚C
1111 1111 0000 0000
FF00h
−25˚C
1110 0111 0000 0000
E700h
−55˚C
1100 1001 0000 0000
C900h
13-bit, unsigned binary
Temperature
+255.875˚C
Digital Output
Binary
Hex
1111 1111 1110 0000
FFE0h
+255˚C
1111 1111 0000 0000
FF00h
+201˚C
1100 1001 0000 0000
C900h
+125˚C
0111 1101 0000 0000
7D00h
+25˚C
0001 1001 0000 0000
1900h
0100h
+1˚C
0000 0001 0000 0000
+0.03125˚C
0000 0000 0000 1000
0008h
0˚C
0000 0000 0000 0000
0000h
11-bit, 2’s complement (10-bit plus sign)
Temperature
Local Temperature data is represented by a 10-bit plus sign,
two’s complement word with an LSb (Least Significant Bit)
equal to 0.125˚C. The data format is a left justified 16-bit
word available in two 8-bit registers. Unused bits will always
report "0". Local temperature readings greater than
+127.875˚C are clamped to +127.875˚C, they will not rollover to negative temperature readings.
Digital Output
Binary
Hex
+125˚C
0111 1101 0000 0000
7D00h
+25˚C
0001 1001 0000 0000
1900h
+1˚C
0000 0001 0000 0000
0100h
+0.125˚C
0000 0000 0010 0000
0020h
0˚C
0000 0000 0000 0000
0000h
−0.125˚C
1111 1111 1110 0000
FFE0h
−1˚C
1111 1111 0000 0000
FF00h
−25˚C
1110 0111 0000 0000
E700h
−55˚C
1100 1001 0000 0000
C900h
11-bit, 2’s complement (10-bit plus sign)
Temperature
11-bit, unsigned binary
Temperature
Digital Output
Digital Output
Binary
Hex
+125˚C
0111 1101 0000 0000
7D00h
+25˚C
0001 1001 0000 0000
1900h
0100h
+1˚C
0000 0001 0000 0000
+0.125˚C
0000 0000 0010 0000
0020h
0˚C
0000 0000 0000 0000
0000h
FFE0h
Binary
Hex
−0.125˚C
1111 1111 1110 0000
+255.875˚C
1111 1111 1110 0000
FFE0h
−1˚C
1111 1111 0000 0000
FF00h
+255˚C
1111 1111 0000 0000
FF00h
−25˚C
1110 0111 0000 0000
E700h
+201˚C
1100 1001 0000 0000
C900h
−55˚C
1100 1001 0000 0000
C900h
+125˚C
0111 1101 0000 0000
7D00h
11
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LM95235
1.0 Functional Description
LM95235
1.0 Functional Description
value in the Common Hysteresis Register. The OS output
and the Status Register flags are updated after every Local
and Remote temperature conversion. See Figure 5.
(Continued)
1.6 SMBDAT OPEN-DRAIN OUTPUT
The SMBDAT output is an open-drain output and does not
have internal pull-ups. A “high” level will not be observed on
this pin until pull-up current is provided by some external
source, typically a pull-up resistor. Choice of resistor value
depends on many system factors but, in general, the pull-up
resistor should be as large as possible without effecting the
SMBus desired data rate. This will minimize any internal
temperature reading errors due to internal heating of the
LM95235. The maximum resistance of the pull-up to provide
a 2.1V high level, based on LM95235 specification for High
Level Output Current with the supply voltage at 3.0V, is
82 kΩ (5%) or 88.7 kΩ (1%).
1.7 T_CRIT OUTPUT AND TCRIT LIMIT
The LM95235’s T_CRIT pin is an active-low open-drain output that is triggered when the local and/or the remote temperature conversion is above the limits defined by the Remote and/or Local Limit registers. The state of the T_CRIT
pin will return to the HIGH state when both the Local and
Remote temperatures are below the values programmed
into the Limit Registers less the value in the Common Hysteresis Register. Additionally, if the remote temperature exceeds the value in the Remote TCRIT Limit Register the
Status Bit for Remote TCRIT (RTCRIT), in Status Register 1,
is set to 1. In the same way if the local temperature exceeds
the value in the Local Shared OS and TCRIT Limit Register
the Status Bit for the Shared Local OS and TCRIT (LOC) bit
in Status Register 1 is set to 1.The T_CRIT output and the
Status Register flags are updated after every Local and
Remote temperature conversion. See Figure 4
20174915
FIGURE 5. OS Temperature Response Diagram
1.9 DIODE FAULT DETECTION
The LM95235 is equipped with operational circuitry designed
to detect fault conditions concerning the remote diodes. In
the event that the D+ pin is detected as shorted to GND, D−,
VDD or D+ is floating, the Remote Temperature reading is
–128.000 ˚C if signed format is selected and +255.875 ˚C if
unsigned format is selected. In addition, the Status Register
1 bit D2 is set.
1.10 COMMUNICATING with the LM95235
The data registers in the LM95235 are selected by the
Command Register. At power-up the Command Register is
set to “00”, the location for the Read Local Temperature
Register. The Command Register latches the last location it
was set to. Each data register in the LM95235 falls into one
of four types of user accessibility:
1. Read only
2. Write only
3. Write/Read same address
4. Write/Read different address
A Write to the LM95235 will always include the address byte
and the command byte. A write to any register requires one
data byte.
Reading the LM95235 can take place either of two ways:
1. If the location latched in the Command Register is correct (most of the time it is expected that the Command
Register will point to one of the Read Temperature Registers because that will be the data most frequently read
from the LM95235), then the read can simply consist of
an address byte, followed by retrieving the data byte.
2. If the Command Register needs to be set, then an
address byte, command byte, repeat start, and another
address byte will accomplish a read.
The data byte has the most significant bit first. At the end of
a read, the LM95235 can accept either acknowledge or No
Acknowledge from the Master (No Acknowledge is typically
used as a signal for the slave that the Master has read its
last byte). When retrieving all 11 bits from a previous remote
diode temperature measurement, the master must insure
that all 11 bits are from the same temperature conversion.
This may be achieved by reading the MSB register first. The
LSB will be locked after the MSB is read. The LSB will be
unlocked after being read. If the user reads MSBs consecu-
20174913
FIGURE 4. T_CRIT Comparator Temperature Response
Diagram
1.8 OS OUTPUT AND OS LIMIT
The LM95235’s OS/A0 pin is selected as an OS digital
output as described in Section 1.3. As an OS pin, it is
activated whenever the local and/or remote temperature
conversion is above the limits defined by the Limit registers.
If the remote temperature exceeds the value in the Remote
OS Limit Register the Status Bit for Remote OS (ROS) in
Status Register 1 is set to 1. In the same way if the local
temperature exceeds the value in the Local Shared OS and
TCRIT Limit Register the Status Bit for the Shared Local OS
and TCRIT (LOC) bit in Status Register 1 is set to 1. The
state of the T_CRIT pin output will return to the HIGH state
when both the Local and Remote temperatures are below
the values programmed into the Limit Registers less the
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12
LM95235
1.0 Functional Description
(Continued)
tively, each time the MSB is read, the LSB associated with
that temperature will be locked in and override the previous
LSB value locked-in.
20174911
(a) Serial Bus Write to the Internal Command Register
20174910
(b) Serial Bus Write to the internal Command Register followed by a Data Byte
20174912
(c) Serial Bus byte Read from a Register with the internal Command Register preset to desired value.
20174914
(d) Serial Bus Write followed by a Repeat Start and Immediate Read
FIGURE 6. SMBus Timing Diagrams for Access of Data (Default Address of 4Ch is shown)
13
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LM95235
1.0 Functional Description
2.
(Continued)
1.11 SERIAL INTERFACE RESET
In the event that the SMBus Master is RESET while the
LM95235 is transmitting on the SMBDAT line, the LM95235
must be returned to a known state in the communication
protocol. This may be done in one of two ways:
1.
1.12 ONE-SHOT CONVERSION
The One-Shot register is used to initiate a single conversion
and comparison cycle when the device is in standby mode,
after which the device returns to standby. This is not a data
register and it is the write operation that causes the one-shot
conversion. The data written to this address is irrelevant and
is not stored. A zero will always be read from this register.
When SMBDAT is LOW, the LM95235 SMBus state
machine resets to the SMBus idle state if either SMBDAT or SMBCLK are held low for more than 35 ms
(tTIMEOUT). Note that according to SMBus specification
2.0 all devices are to timeout when either the SMBCLK
or SMBDAT lines are held low for 25 - 35 ms. Therefore,
to insure a timeout of all devices on the bus the SMBCLK or SMBDAT lines must be held low for at least
35 ms.
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When SMBDAT is HIGH, have the master initiate an
SMBus start. The LM95235 will respond properly to an
SMBus start condition at any point during the communication. After the start the LM95235 will expect an SMBus
Address address byte.
14
Command register selects which registers will be read from or written to. Data for this register should be transmitted during the
Command Byte of the SMBus write communication. POR means Power-On Reset.
P0-P7: Command
P7
P6
P5
P4
P3
P2
P1
P0
Command
Register Summary
Register Name
Read
Address
(Hex)
Write
Address
(Hex)
No.
of
bits
POR
Default
(Hex)
Read/
Write
Description
TEMPERATURE SIGNED VALUE REGISTERS
Local Temp MSB
0x00
NA
8
−
RO
Supports SMBus byte
Local Temp LSB
0x30
NA
3
−
RO
All unused bits are reported as "0".
Remote Temp MSB –
Signed
0x01
NA
8
−
RO
Supports SMBus byte
Remote Temp LSB –
Signed
0x10
NA
5/3
−
RO
All unused bits are reported as "0".
TEMPERATURE UNSIGNED VALUE REGISTERS
Remote Temp MSB –
Unsigned
0x31
NA
8
−
RO
Supports SMBus byte reads
Remote Temp LSB –
Unsigned
0x32
NA
5/3
−
RO
All unused bits are reported as "0".
DIODE CONFIGURATION REGISTERS
Configuration Register 2
0xBF
0xBF
5
0x1F
R/W
Filter Enable, Diode Model Select, Diode
Fault Mask; Pin 6 OS/A0 function select
Remote Offset
High Byte
0x11
0x11
8
0x00
R/W
2’s Complement
Remote Offset
Low Byte
0x12
0x12
3
0x00
R/W
2’s Complement
All unused bits are reported as "0".
0x09/
0x03
5
0x00
R/W
STOP/RUN , Remote TCRIT mask,
Remote OS mask, Local TCRIT mask,
Local OS mask
2
0x02
R/W
Continuous or specific settings
GENERAL CONFIGURATION REGISTERS
Configuration Register 1
Conversion Rate
0x03/
0x09
0x04/0x0A 0x04/0x0A
NA
0x0F
−
−
WO
A write to this register activates one
conversion if STOP/RUN bit = 1.
Status Register 1
0x02
NA
5
−
RO
Busy bit, and status bits
Status Register 2
0x33
NA
2
−
RO
Not Ready bit, Diode detect bit
Remote OS Limit
0x07/
0x0D
0x0D/
0x07
8
0x55
R/W
Unsigned 0 to 255 ˚C
Default 85 ˚C
Local Shared OS and
T_Crit Limit
0x20
0x20
7
0x55
R/W
Unsigned 0 to 127 ˚C
Default 85 ˚C
Remote T_Crit Limit
0x19
0x19
8
0x6E
R/W
Unsigned 0 to 255 ˚C
Default 110 ˚C
Common Hysteresis
0x21
0x21
5
0x0A
R/W
up to 31˚C
One-Shot
STATUS REGISTERS
LIMIT REGISTERS
IDENTIFICATION REGISTERS
Manufacturer ID
0xFE
0x01
RO
Always returns 0x01
Revision ID
0xFF
0xB1
RO
Returns revision number.
15
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LM95235
2.0 LM95235 Registers
LM95235
2.0 LM95235 Registers
(Continued)
2.1 LOCAL and REMOTE MSB and LSB TEMPERATURE REGISTERS
Local Temperature MSB
(Read Only Address 00h) 10-bit plus sign format:
BIT
D7
D6
D5
D4
D3
D2
D1
D0
Value
SIGN
64
32
16
8
4
2
1
Temperature Data: LSb = 1˚C.
Local Temperature LSB
(Read Only Address 30h) 10-bit plus sign format:
BIT
D7
D6
D5
D4
D3
D2
D1
D0
Value
0.5
0.25
0.125
0
0
0
0
0
Temperature Data: LSb = 0.125˚C.
Signed Remote Temperature MSB
(Read Only Address 01h) 12-bit plus sign format:
BIT
D7
D6
D5
D4
D3
D2
D1
D0
Value
SIGN
64
32
16
8
4
2
1
Temperature Data: LSb = 1˚C.
Signed Remote Temperature LSB, Filter On
(Read Only Address 10h) 12-bit plus sign binary formats with filter on:
BIT
D7
D6
D5
D4
D3
D2
D1
D0
Value
0.5
0.25
0.125
0.0625
0.03125
0
0
0
Signed Remote Temperature LSB, Filter Off
(Read Only Address 10h) 12-bit plus sign binary formats with filter off:
BIT
D7
D6
D5
D4
D3
D2
D1
D0
Value
0.5
0.25
0.125
0
0
0
0
0
Temperature Data: LSb = 0.125˚C filter off or 0.03125˚C filter on.
Unsigned Remote Temperature MSB
(Read Only Address 31h) 13-bit unsigned format:
BIT
D7
D6
D5
D4
D3
D2
D1
D0
Value
128
64
32
16
8
4
2
1
Temperature Data: LSb = 1˚C.
Unsigned Remote Temperature LSB, Filter On
(Read Only Address 32h) 13-bit unsigned binary formats with filter on:
BIT
D7
D6
D5
D4
D3
D2
D1
D0
Value
0.5
0.25
0.125
0.0625
0.03125
0
0
0
Unsigned Remote Temperature LSB, Filter Off
(Read Only Address 32h) 13-bit unsigned binary formats with filter off:
BIT
D7
D6
D5
D4
D3
D2
D1
D0
Value
0.5
0.25
0.125
0
0
0
0
0
Temperature Data: LSb = 0.125˚C filter off or 0.03125˚C filter on.
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16
(Continued)
For data synchronization purposes, the MSB register should be read first if the user wants to read both MSB and LSB registers.
The LSB will be locked after the MSB is read. The LSB will be unlocked after being read. If the user reads MSBs consecutively,
each time the MSB is read, the LSB associated with that temperature will be locked in and override the previous LSB value
locked-in.
2.2 DIODE CONFIGURATION REGISTERS
Configuration Register 2
(Read/write Address BFh):
D7
0
D6
OS/A0 Function Select
Bits
D5
D4
D3
D2
D1
D0
OS Fault Mask
T_CRIT
Mask
TruTherm Select
RFE1
RFE0
1
Name
Description
7
Reserved
Reports "0" when read.
6
OS/A0 Function Select
0: Address (A0) function is enabled
1: Over-temperature Shutdown (OS) is enabled
5
Diode Fault Mask for OS
0: Off
1: On
4
Diode Fault Mask for T_CRIT
0: Off
1: On
3
Remote Diode TruTherm
Mode Select
0: Selects Diode Model 2, MMBT3904, with TruTherm technology
disabled.
1: Selects Diode Model 1, A typical Intel Processor, with 65 nm or
90 nm technology, and TruTherm technology enabled.
Remote Filter Enable
00:
01:
10:
11:
Reserved
Reports "1" when read.
2-1
0
Filter Disable
Reserved
Reserved
Filter Enable
Power up default is 1Fh.
Remote Offset High Byte (2’s Complement)
(R/W Address 11h) 10-bit plus sign format:
BIT
D7
D6
D5
D4
D3
D2
D1
D0
Value
SIGN
64
32
16
8
4
2
1
Power up default is 00h.
Remote Offset Low Byte (2’s Complement)
(R/W Address 12h) 10-bit plus sign format:
BIT
D7
D6
D5
D4
D3
D2
D1
D0
Value
0.50
0.25
0.125
0
0
0
0
0
Power up default is 00h. LSb = 0.125 ˚C.
17
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LM95235
2.0 LM95235 Registers
LM95235
2.0 LM95235 Registers
(Continued)
2.3 GENERAL CONFIGURATION REGISTERS
Configuration Register 1
(Read/write Address 03h/09h or 09h/03h):
D7
D6
D5
0
STOP/RUN
0
D4
D3
Remote T_CRIT Mask Remote OS Mask
Bits
D2
D1
D0
Local T_CRIT
Mask
Local OS Mask
0
Name
Description
7
Reserved
Reports "0" when read.
6
STOP/RUN
0: Active / Converting
1: Standby
5
Reserved
Reports "0" when read.
4
Remote T_CRIT Mask
0: Off
1: On
3
Remote OS Mask
0: Off
1: On
2
Local T_CRIT Mask
0: Off
1: On
1
Local OS Mask
0: Off
1: On
0
Reserved
Reports "0" when read.
Power up default is 00h.
Conversion Rate Register
(Read/write Address 04h/0Ah or 0Ah/04h):2-bit format:
BIT
D7
D6
D5
D4
D3
D2
D1
D0
Value
0
0
0
0
0
0
MSb
LSb
Bits
Name
7:2
Reserved
1:0
Description
Reports "0" when read.
00: Continuous (33 ms typical when remote
diode is missing or fault or 63 ms typical with
remote diode connected)
Conversion Rate
01: 0.364 seconds
10: 1 second
11: 2.5 seconds
Power up default is 02h (1 second).
One Shot Register
(Write Only Address 0Fh):
Writing to this register will start one conversion if the device is in standby mode (i.e. STOP/RUN bit = 1).
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18
LM95235
2.0 LM95235 Registers
(Continued)
2.4 STATUS REGISTERS
Status Register 1
(Read Only Address 02h):
D7
D6
D5
D4
D3
D2
D1
D0
Busy
0
0
ROS
0
Diode Fault
RTCRIT
LOC
Bits
7
6-5
Name
Description
Busy
When set to "1" the part is converting.
Reserved
Report "0" when read.
4
ROS
Status Bit for Remote OS
3
Reserved
Reports "0" when read.
Diode Fault
Status bit for missing diode (Either D+ is shorted to GND, and/or VDD, and/or D-;
or D+ is floating.)
Note: The unsigned registers will report 0˚C if read; the signed value registers
will report −128.000˚C.
1
RTCRIT
Status bit for Remote TCRIT.
0
LOC
Status bit for the shared Local OS and TCRIT .
2
Status Register 2
(Read Only Address 33h):
D7
D6
D5
D4
D3
D2
D1
D0
Not Ready
TruTherm 3904 Detect
0
0
0
0
0
0
Bits
Name
Description
7
Not Ready
Waiting for 30 ms power-up sequence to end.
6
TruTherm 3904 Detect
1: MMBT3904 is connected and TruTherm technology is enabled.
0: MMBT3904 is connected and TruTherm technology is disabled.
Reserved
Reports "0" when read.
5-0
2.5 LIMIT REGISTERS
Unsigned Remote OS Limit - 0˚C to 255˚C
(Read/Write Address 07h/0Dh or 0Dh/07h):
D7
D6
D5
D4
D3
D2
D1
D0
128
64
32
16
8
4
2
1
Power on Reset default is 55h (85˚C).
Unsigned Local Shared OS and T_CRIT Limit - 0˚C to 127˚C
(Read/Write Address 20h):
D7
D6
D5
D4
D3
D2
D1
D0
128
64
32
16
8
4
2
1
Power on Reset default is 55h (85˚C).
Unsigned Remote T_CRIT Limit - 0˚C to 255˚C
(Read/Write Address 19h):
D7
D6
D5
D4
D3
D2
D1
D0
128
64
32
16
8
4
2
1
Power on Reset default is 6Eh (110˚C).
19
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LM95235
2.0 LM95235 Registers
(Continued)
Common Hysteresis Register
(Read/Write Address 21h):
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
16
8
4
2
1
Power on Reset default is 0Ah (10˚C).
2.6 IDENTIFICATION REGISTERS
Manufacturers ID Register
(Read Only Address FEh): Always returns 01h.
D7
D6
D5
D4
D3
D2
D1
D0
0
0
0
0
0
0
0
1
Revision ID Register
(Read Only Address FFh): Default is B1h. This register will increment by 1 every time
there is a revision to the die by National Semiconductor. The initial revision bits for B1h
are shown below.
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D7
D6
D5
D4
D3
D2
D1
D0
1
0
1
1
0
0
0
1
20
The LM95235 can be applied easily in the same way as
other integrated-circuit temperature sensors, and its remote
diode sensing capability allows it to be used in new ways as
well. It can be soldered to a printed circuit board, and because the path of best thermal conductivity is between the
die and the pins, its temperature will effectively be that of the
printed circuit board lands and traces soldered to the
LM95235’s pins. This presumes that the ambient air temperature is almost the same as the surface temperature of
the printed circuit board; if the air temperature is much higher
or lower than the surface temperature, the actual temperature of the LM95235 die will be at an intermediate temperature between the surface and air temperatures. Again, the
primary thermal conduction path is through the leads, so the
circuit board temperature will contribute to the die temperature much more strongly than will the air temperature.
To measure temperature external to the LM95235’s die, use
a remote diode. This diode can be located on the die of a
target IC, allowing measurement of the IC’s temperature,
independent of the LM95235’s temperature. A discrete diode
can also be used to sense the temperature of external
objects or ambient air. Remember that a discrete diode’s
temperature will be affected, and often dominated, by the
temperature of its leads. Most silicon diodes do not lend
themselves well to this application. It is recommended that
an MMBT3904 transistor base-emitter junction be used with
the collector tied to the base.
The LM95235’s TruTherm technology allows accurate sensing of integrated thermal diodes, such as those found on
most processors. With TruTherm technology turned off, the
LM95235 can measure a diode-connected transistor such as
the MMBT3904 or the thermal diode found in an AMD processor.
(2)
In Equation (2), η and IS are dependant upon the process
that was used in the fabrication of the particular diode. By
forcing two currents with a very controlled ratio (IF2 / IF1) and
measuring the resulting voltage difference, it is possible to
eliminate the IS term. Solving for the forward voltage difference yields the relationship:
(3)
Solving Equation (3) for temperature yields:
(4)
Equation (4) holds true when a diode connected transistor
such as the MMBT3904 is used. When this “diode” equation
is applied to an integrated diode such as a processor transistor with its collector tied to GND as shown in Figure 7 it
will yield a wide non-ideality spread. This wide non-ideality
spread is not due to true process variation but due to the fact
that Equation (4) is an approximation.
TruTherm technology uses the transistor equation, Equation
(5), which is a more accurate representation of the topology
of the thermal diode found in an FPGA or processor.
The LM95235 has been optimized to measure the remote
thermal diode integrated in a typical Intel processor on
65 nm or 90 nm process or an MMBT3904 transistor. Using
the Remote Diode Model Select register either pair of remote
inputs can be assigned to be either a typical Intel processor
on 65 nm or 90 nm process or an MMBT3904.
3.1 DIODE NON-IDEALITY
3.1.1 Diode Non-Ideality Factor Effect on Accuracy
When a transistor is connected as a diode, the following
relationship holds for variables VBE, T and IF:
(5)
(1)
where:
• q = 1.6x10−19 Coulombs (the electron charge),
• T = Absolute Temperature in Kelvin
• k = 1.38x10−23 joules/K (Boltzmann’s constant),
21
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LM95235
• η is the non-ideality factor of the process the diode is
manufactured on,
• IS = Saturation Current and is process dependent,
• If = Forward Current through the base-emitter junction
• VBE = Base-Emitter Voltage drop
In the active region, the -1 term is negligible and may be
eliminated, yielding the following equation
3.0 Applications Hints
LM95235
3.0 Applications Hints
(Continued)
20174943
FIGURE 7. Thermal Diode Current Paths
to 6.24Ω or ± 1.73Ω. The equation to calculate the temperature error due to series resistance (TER) for the LM95235 is
simply:
TruTherm should only be enabled when measuring the temperature of a transistor integrated as shown in the processor
of Figure 7, because Equation (5) only applies to this topology.
3.1.2 Calculating Total System Accuracy
The voltage seen by the LM95235 also includes the IFRS
voltage drop of the series resistance. The non-ideality factor,
η, is the only other parameter not accounted for and depends on the diode that is used for measurement. Since
∆VBE is proportional to both η and T, the variations in η
cannot be distinguished from variations in temperature.
Since the non-ideality factor is not controlled by the temperature sensor, it will directly add to the inaccuracy of the
sensor. For the for Intel processor on 65nm process, Intel
specifies a +4.06%/−0.897% variation in η from part to part
when the processor diode is measured by a circuit that
assumes diode equation, Equation (4), as true. As an example, assume a temperature sensor has an accuracy
specification of ± 1.0˚C at a temperature of 80˚C (353 Kelvin)
and the processor diode has a non-ideality variation of
+1.19%/−0.27%. The resulting system accuracy of the processor temperature being sensed will be:
TACC = + 1.0˚C + (+4.06% of 353 K) = +15.3 ˚C
and
TACC = - 1.0˚C + (−0.89% of 353 K) = −4.1 ˚C
TrueTherm technology uses the transistor equation, Equation (5), resulting in a non-ideality spread that truly reflects
the process variation which is very small. The transistor
equation non-ideality spread is ± 0.39% for the Pentium 4
processor on 90 nm process. The resulting accuracy when
using TruTherm technology improves to:
TACC = ± 0.75˚C + ( ± 0.39% of 353 K) = ± 2.16 ˚C
The next error term to be discussed is that due to the series
resistance of the thermal diode and printed circuit board
traces. The thermal diode series resistance is specified on
most processor data sheets. For Intel processors in 65 nm
process, this is specified at 4.52Ω typical. The LM95235
accommodates the typical series resistance of Intel Processor on 65 nm process. The error that is not accounted for is
the spread of the processor’s series resistance, that is 2.79Ω
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(6)
Solving Equation (6) for RPCB equal to ± 1.73Ω results in the
additional error due to the spread in the series resistance of
± 1.07˚C. The spread in error cannot be canceled out, as it
would require measuring each individual thermal diode device. This is quite difficult and impractical in a large volume
production environment.
Equation (6) can also be used to calculate the additional
error caused by series resistance on the printed circuit
board. Since the variation of the PCB series resistance is
minimal, the bulk of the error term is always positive and can
simply be cancelled out by subtracting it from the output
readings of the LM95235.
Transistor Equation ηD,
non-ideality
Processor Family
min
typ
max
Intel Processor on
65 nm process
0.997
1.001
1.005
Processor Family
min
typ
max
1
1.0065
1.0125
Pentium III CPUID
68h/PGA370Socket/ 1.0057
Celeron
1.008
1.0125
Pentium 4, 423 pin
0.9933
1.0045
1.0368
Pentium 4, 478 pin
0.9933
1.0045
1.0368
Pentium III CPUID
67h
22
Diode Equation ηD,
non-ideality
Series
R,Ω
4.52
Series
R,Ω
LM95235
3.0 Applications Hints
(Continued)
Pentium 4 on 0.13
micron process, 2
- 3.06 GHz
1.0011
Pentium 4 on 90
nm process
1.0083
1.011
1.023
3.33
Intel Processor on
65 nm process
1.000
1.009
1.050
4.52
1.00151
1.00220
1.00289
3.06
Pentium M
(Centrino)
MMBT3904
1.0021
1.0030
(8)
Therefore, 1.75˚C should be subtracted from the temperature readings of the LM95235 to compensate for the differing
typical non-ideality target.
3.2 PCB LAYOUT FOR MINIMIZING NOISE
1.003
AMD Athlon MP
model 6
1.002
1.008
1.016
AMD Athlon 64
1.008
1.008
1.096
AMD Opteron
1.008
1.008
1.096
AMD Sempron
3.64
1.00261
0.93
20174917
3.1.3 Compensating for Different Non-Ideality
In order to compensate for the errors introduced by nonideality, the temperature sensor is calibrated for a particular
processor. National Semiconductor temperature sensors are
always calibrated to the typical non-ideality and series resistance of a given processor type. The LM95235 is calibrated
for two non-ideality factors and series resistance values thus
supporting the MMBT3904 transistor and Intel processors on
65nm process without the requirement for additional trims.
For most accurate measurements TruTherm mode should
be turned on when measuring the Intel processor on 65nm
process to minimize the error introduced by the false nonideality spread (see Section 3.1.1 Diode Non-Ideality Factor
Effect on Accuracy). When a temperature sensor calibrated
for a particular processor type is used with a different processor type, additional errors are introduced.
Temperature errors associated with non-ideality of different
processor types may be reduced in a specific temperature
range of concern through use of software calibration. Typical
Non-ideality specification differences cause a gain variation
of the transfer function, therefore the center of the temperature range of interest should be the target temperature for
calibration purposes. The following equation can be used to
calculate the temperature correction factor (TCF) required to
compensate for a target non-ideality differing from that supported by the LM95235.
FIGURE 8. Ideal Diode Trace Layout
In a noisy environment, such as a processor mother board,
layout considerations are very critical. Noise induced on
traces running between the remote temperature diode sensor and the LM95235 can cause temperature conversion
errors. Keep in mind that the signal level the LM95235 is
trying to measure is in microvolts. The following guidelines
should be followed:
1. VDD should be bypassed with a 0.1 µF capacitor in
parallel with 100 pF. The 100 pF capacitor should be
placed as close as possible to the power supply pin. A
bulk capacitance of approximately 10 µF needs to be in
the near vicinity of the LM95235.
2. A 100 pF diode bypass capacitor is recommended to
filter high frequency noise but may not be necessary.
Make sure the traces to the 100 pF capacitor are
matched. Place the filter capacitors close to the
LM95235 pins.
3. Ideally, the LM95235 should be placed within 10 cm of
the Processor diode pins with the traces being as
straight, short and identical as possible. Trace resistance of 1Ω can cause as much as 0.62˚C of error. This
error can be compensated by using simple software
offset compensation.
4. Diode traces should be surrounded by a GND guard ring
to either side, above and below if possible. This GND
guard should not be between the D+ and D− lines. In the
event that noise does couple to the diode lines it would
be ideal if it is coupled common mode. That is equally to
the D+ and D− lines.
5. Avoid routing diode traces in close proximity to power
supply switching or filtering inductors.
6. Avoid running diode traces close to or parallel to high
speed digital and bus lines. Diode traces should be kept
at least 2 cm apart from the high speed digital traces.
7. If it is necessary to cross high speed digital traces, the
diode traces and the high speed digital traces should
cross at a 90 degree angle.
8. The ideal place to connect the LM95235’s GND pin is as
close as possible to the Processors GND associated
with the sense diode.
(7)
where
• ηS = LM95235 non-ideality for accuracy specification
• ηPROCESSOR = Processor thermal diode typical nonideality
• TCR = center of the temperature range of interest in ˚C
The correction factor should be directly added to the temperature reading produced by the LM95235. For example
when using the LM95235, with the 3904 mode selected, to
measure a AMD Athlon processor, with a typical non-ideality
of 1.008, for a temperature range of 60 ˚C to 100 ˚C the
correction factor would calculate to:
23
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LM95235
3.0 Applications Hints
9.
the SMBus maximum frequency of communication is rather
low (100 kHz max), care still needs to be taken to ensure
proper termination within a system with multiple parts on the
bus and long printed circuit board traces. An RC lowpass
filter with a 3 dB corner frequency of about 40 MHz is
included on the LM95235’s SMBCLK input. Additional resistance can be added in series with the SMBDAT and SMBCLK lines to further help filter noise and ringing. Minimize
noise coupling by keeping digital traces out of switching
power supply areas as well as ensuring that digital lines
containing high speed data communications cross at right
angles to the SMBDAT and SMBCLK lines.
(Continued)
Leakage current between D+ and GND and between D+
and D− should be kept to a minimum. Thirteen nanoamperes of leakage can cause as much as 0.2˚C of
error in the diode temperature reading. Keeping the
printed circuit board as clean as possible will minimize
leakage current.
Noise coupling into the digital lines greater than 400 mVp-p
(typical hysteresis) and undershoot less than 500 mV below
GND, may prevent successful SMBus communication with
the LM95235. SMBus no acknowledge is the most common
symptom, causing unnecessary traffic on the bus. Although
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24
inches (millimeters) unless otherwise noted
8-Lead Molded Mini-Small-Outline Package (MSOP),
JEDEC Registration Number MO-187
Order Number LM95235CIMM, LM95235CIMMX
NS Package Number MUA08A
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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LM95235 Precision Remote Diode Temperature Sensor with SMBus Interface and TruTherm
Technology
Physical Dimensions