HN1B01FDW1T1 Complementary Dual General Purpose Amplifier Transistor PNP and NPN Surface Mount http://onsemi.com • • • • High Voltage and High Current: VCEO = 50 V, IC = 200 mA High hFE: hFE = 200400 Moisture Sensitivity Level: 1 ESD Rating – Human Body Model: 3A ESD Rating – Machine Model: C (6) (5) (4) Q2 Q1 MAXIMUM RATINGS (TA = 25°C) Rating Symbol Value Unit Collector–Base Voltage V(BR)CBO 60 Vdc Collector–Emitter Voltage V(BR)CEO 50 Vdc Emitter–Base Voltage V(BR)EBO 7.0 Vdc IC 200 mAdc Collector Current – Continuous (1) (2) 6 THERMAL CHARACTERISTICS Characteristic Power Dissipation 5 4 12 Symbol Max Unit PD 380 mW Junction Temperature TJ 150 °C Storage Temperature Tstg –55 to +150 °C (3) 3 SC–74 CASE 318F STYLE 3 MARKING DIAGRAM R9 M R9 = Specific Device Code M = Date Code ORDERING INFORMATION Device Package Shipping HN1B01FDW1T1 SC–74 3000/Tape & Reel †The “T1” suffix refers to a 7 inch reel. Semiconductor Components Industries, LLC, 2002 March, 2002 – Rev. 0 Publication Order Number: HN1B01FDW1T1/D HN1B01FDW1T1 Q1: PNP ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Symbol Min Max Unit Collector–Emitter Breakdown Voltage (IC = 2.0 mAdc, IB = 0) V(BR)CEO –50 – Vdc Collector–Base Breakdown Voltage (IC = 10 µAdc, IE = 0) V(BR)CBO –60 – Vdc Emitter–Base Breakdown Voltage (IE = 10 µAdc, IC = 0) V(BR)EBO –7.0 – Vdc Collector–Base Cutoff Current (VCB = 45 Vdc, IE = 0) ICBO – –0.1 µAdc Collector–Emitter Cutoff Current (VCE = 10 Vdc, IB = 0) (VCE = 30 Vdc, IB = 0) (VCE = 30 Vdc, IB = 0, TA = 80°C) ICEO – – – –0.1 –2.0 –1.0 µAdc nAdc mAdc DC Current Gain (Note 1) (VCE = 6.0 Vdc, IC = 2.0 mAdc) hFE –200 –400 –0.15 –0.3 Vdc Symbol Min Max Unit Collector–Emitter Breakdown Voltage (IC = 2.0 mAdc, IB = 0) V(BR)CEO 50 – Vdc Collector–Base Breakdown Voltage (IC = 10 µAdc, IE = 0) V(BR)CBO 60 – Vdc Emitter–Base Breakdown Voltage (IE = 10 µAdc, IC = 0) Characteristic Collector–Emitter Saturation Voltage (IC = 100 mAdc, IB = 10 mAdc) VCE(sat) – Q2: NPN ELECTRICAL CHARACTERISTICS (TA = 25°C unless otherwise noted) Characteristic V(BR)EBO 7.0 – Vdc Collector–Base Cutoff Current (VCB = 45 Vdc, IE = 0) ICBO – 0.1 µAdc Collector–Emitter Cutoff Current (VCE = 10 Vdc, IB = 0) (VCE = 30 Vdc, IB = 0) (VCE = 30 Vdc, IB = 0, TA = 80°C) ICEO – – – 0.1 2.0 1.0 µAdc nAdc mAdc DC Current Gain (Note 1) (VCE = 6.0 Vdc, IC = 2.0 mAdc) hFE 200 400 0.15 0.25 Collector–Emitter Saturation Voltage (IC = 100 mAdc, IB = 10 mAdc) VCE(sat) 1. Pulse Test: Pulse Width ≤ 300 µs, D.C. ≤ 2%. http://onsemi.com 2 – Vdc HN1B01FDW1T1 Typical Electrical Characteristics: PNP Transistor 1000 –1.5 mA –2.0 mA –160 hFE, DC CURRENT GAIN IC, COLLECTOR CURRENT (mA) –200 –1.0 mA –120 –0.5 mA –80 IB = –0.2 mA –40 TA = 100°C 25°C TA = 25°C 0 VCE = –1.0 V 10 0 –1 –2 –3 –4 –5 –6 –1 VCE, COLLECTOR–EMITTER VOLTAGE (V) –25°C 100 VCE = –6.0 V –100 –1000 VCE(sat), MAXIMUM COLLECTOR VOLTAGE (V) hFE, DC CURRENT GAIN TA = 100°C –10 IC/IB = 10 TA = 100°C 25°C –25°C –0.1 –0.01 –1 –10 –100 –1000 IC, COLLECTOR CURRENT (mA) Figure 3. DC Current Gain Figure 4. VCE(sat) versus IC –10 –10,000 COMMON EMITTER VCE = 6 V –1 TA = 25°C IC/IB = 10 IB, BASE CURRENT (A) BASE–EMITTER SATURATION VOLTAGE (V) –1000 –1 IC, COLLECTOR CURRENT (mA) –0.1 –1 –100 Figure 2. DC Current Gain 1000 10 –1 –10 IC, COLLECTOR CURRENT (mA) Figure 1. Collector Saturation Region 25°C –25°C 100 –1000 25°C TA = 100°C –25°C –100 –10 –1 –0.1 –10 –100 –1000 0 –0.1 –0.2 –0.3 –0.4 –0.5 –0.6 –0.7 –0.8 –0.9 IC, COLLECTOR CURRENT (mA) VBE, BASE–EMITTER VOLTAGE (V) Figure 5. VBE(sat) versus IC Figure 6. Base–Emitter Voltage http://onsemi.com 3 –1 HN1B01FDW1T1 Typical Electrical Characteristics: NPN Transistor 1000 6.0 mA 5.0 mA 240 2.0 mA 3.0 mA hFE, DC CURRENT GAIN IC, COLLECTOR CURRENT (mA) 280 200 1.0 mA 160 120 0.5 mA 80 IB = 0.2 mA TA = 100°C 25°C –25°C 100 40 TA = 25°C 0 0 1 2 3 VCE = 1.0 V 10 4 5 6 1 10 VCE, COLLECTOR–EMITTER VOLTAGE (V) hFE, DC CURRENT GAIN 1000 TA = 100°C 25°C –25°C 100 VCE = 6.0 V 1 1 IC/IB = 10 TA = 100°C 25°C 0.1 –25°C 0.01 10 100 1000 1 10 IC, COLLECTOR CURRENT (mA) 100 1000 IC, COLLECTOR CURRENT (mA) Figure 9. DC Current Gain Figure 10. VCE(sat) versus IC 10 10,000 COMMON EMITTER VCE = 6 V IB, BASE CURRENT (A) BASE–EMITTER SATURATION VOLTAGE (V) 1000 Figure 8. DC Current Gain VCE(sat), MAXIMUM COLLECTOR VOLTAGE (V) Figure 7. Collector Saturation Voltage 10 100 IC, COLLECTOR CURRENT (mA) 1 TA = 25°C IC/IB = 10 0.1 TA = 100°C 25°C 1000 –25°C 100 10 1 0.1 1 10 100 1000 0 IC, COLLECTOR CURRENT (mA) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 VBE, BASE–EMITTER VOLTAGE (V) Figure 11. VBE(sat) versus IC Figure 12. Base–Emitter Voltage http://onsemi.com 4 0.9 1 HN1B01FDW1T1 INFORMATION FOR USING THE SC-74 SURFACE MOUNT PACKAGE MINIMUM RECOMMENDED FOOTPRINT FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to ensure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self-align when subjected to a solder reflow process. 0.094 2.4 0.037 0.95 0.074 1.9 0.037 0.95 0.028 0.7 0.039 1.0 inches mm SC-74 SC-74 POWER DISSIPATION one can calculate the power dissipation of the device which in this case is 380 milliwatts. The power dissipation of the SC-74 is a function of the pad size. This can vary from the minimum pad size for soldering to a pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RθJA, the thermal resistance from the device junction to ambient, and the operating temperature, TA. Using the values provided on the data sheet for the SC-74 package, PD can be calculated as follows: PD = PD = 150°C – 25°C = 380 milliwatts 329°C/W The 329°C/W for the SC-74 package assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 380 milliwatts. There are other alternatives to achieving higher power dissipation from the SC-74 package. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal Clad. Using a board material such as Thermal Clad, an aluminum core board, the power dissipation can be doubled using the same footprint. TJ(max) – TA RθJA The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values into the equation for an ambient temperature TA of 25°C, SOLDER STENCIL GUIDELINES SC-59, SC-74, SC-70/SOT-323, SOD-123, SOT-23, SOT-143, SOT-223, SO-8, SO-14, SO-16, and SMB/SMC diode packages, the stencil opening should be the same as the pad size or a 1:1 registration. Prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. Solder stencils are used to screen the optimum amount. These stencils are typically 0.008 inches thick and may be made of brass or stainless steel. For packages such as the http://onsemi.com 5 HN1B01FDW1T1 SOLDERING PRECAUTIONS • The soldering temperature and time should not exceed 260°C for more than 10 seconds. • When shifting from preheating to soldering, the maximum temperature gradient should be 5°C or less. • After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used since the use of forced cooling will increase the temperature gradient and will result in latent failure due to mechanical stress. • Mechanical stress or shock should not be applied during cooling. The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. • Always preheat the device. • The delta temperature between the preheat and soldering should be 100°C or less.* • When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference should be a maximum of 10°C. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device. TYPICAL SOLDER HEATING PROFILE temperature versus time. The line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. The two profiles are based on a high density and a low density board. The Vitronics SMD310 convection/infrared reflow soldering system was used to generate this profile. The type of solder used was 62/36/2 Tin Lead Silver with a melting point between 177–189°C. When this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. The components on the board are then heated by conduction. The circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. Because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints. For any given circuit board, there will be a group of control settings that will give the desired heat pattern. The operator must set temperatures for several heating zones and a figure for belt speed. Taken together, these control settings make up a heating “profile” for that particular circuit board. On machines controlled by a computer, the computer remembers these profiles from one operating session to the next. Figure 13 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. This profile will vary among soldering systems, but it is a good starting point. Factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. This profile shows STEP 1 PREHEAT ZONE 1 RAMP" 200°C STEP 2 STEP 3 VENT HEATING SOAK" ZONES 2 & 5 RAMP" STEP 4 HEATING ZONES 3 & 6 SOAK" STEP 5 HEATING ZONES 4 & 7 SPIKE" STEP 6 VENT 205° TO 219°C PEAK AT SOLDER JOINT 170°C DESIRED CURVE FOR HIGH MASS ASSEMBLIES 160°C 150°C 150°C 140°C 100°C 100°C SOLDER IS LIQUID FOR 40 TO 80 SECONDS (DEPENDING ON MASS OF ASSEMBLY) DESIRED CURVE FOR LOW MASS ASSEMBLIES 50°C TIME (3 TO 7 MINUTES TOTAL) TMAX Figure 13. Typical Solder Heating Profile http://onsemi.com 6 STEP 7 COOLING HN1B01FDW1T1 PACKAGE DIMENSIONS SC–74 CASE 318F–03 ISSUE F A L 6 S 1 5 4 2 3 B D G M J C 0.05 (0.002) H K NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. 4. 318F-01 AND -02 OBSOLETE. NEW STANDARD 318F-03. DIM A B C D G H J K L M S INCHES MIN MAX 0.1142 0.1220 0.0512 0.0669 0.0354 0.0433 0.0098 0.0197 0.0335 0.0413 0.0005 0.0040 0.0040 0.0102 0.0079 0.0236 0.0493 0.0649 0 10 0.0985 0.1181 STYLE 3: PIN 1. 2. 3. 4. 5. 6. http://onsemi.com 7 EMITTER 1 BASE 1 COLLECTOR 2 EMITTER 2 BASE 2 COLLECTOR 1 MILLIMETERS MIN MAX 2.90 3.10 1.30 1.70 0.90 1.10 0.25 0.50 0.85 1.05 0.013 0.100 0.10 0.26 0.20 0.60 1.25 1.65 0 10 2.50 3.00 HN1B01FDW1T1 Thermal Clad is a registered trademark of the Bergquist Company ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: [email protected] JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 Phone: 81–3–5740–2700 Email: [email protected] ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. N. American Technical Support: 800–282–9855 Toll Free USA/Canada http://onsemi.com 8 HN1B01FDW1T1/D