ETC IRHNA57163SE

PD - 93856A
RADIATION HARDENED
POWER MOSFET
SURFACE MOUNT (SMD-2)
IRHNA57163SE
130V, N-CHANNEL
4#
TECHNOLOGY
c
c
Product Summary
Part Number Radiation Level RDS(on)
ID
IRHNA57163SE 100K Rads (Si) 0.0135Ω 75A*
SMD-2
International Rectifier’s R5TM technology provides
high performance power MOSFETs for space applications. These devices have been characterized for
Single Event Effects (SEE) with useful performance
up to an LET of 80 (MeV/(mg/cm2)). The combination
of low RDS(on) and low gate charge reduces the power
losses in switching applications such as DC to DC
converters and motor control. These devices retain
all of the well established advantages of MOSFETs
such as voltage control, fast switching, ease of paralleling and temperature stability of electrical parameters.
Features:
n
n
n
n
n
n
n
n
n
n
Single Event Effect (SEE) Hardened
Ultra Low RDS(on)
Low Total Gate Charge
Proton Tolerant
Simple Drive Requirements
Ease of Paralleling
Hermetically Sealed
Surface Mount
Ceramic Package
Light Weight
Absolute Maximum Ratings
Pre-Irradiation
Parameter
ID @ VGS = 12V, TC = 25°C
ID@ VGS = 12V, TC = 100°C
IDM
PD @ TC = 25°C
VGS
EAS
IAR
EAR
dv/dt
TJ
T STG
Continuous Drain Current
Continuous Drain Current
Pulsed Drain Current ➀
Max. Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy ➁
Avalanche Current ➀
Repetitive Avalanche Energy ➀
Peak Diode Recovery dv/dt ➂
Operating Junction
Storage Temperature Range
Pckg. Mounting Surface Temp.
Weight
Units
75*
62
300
300
2.4
±20
280
75
30
5.5
-55 to 150
A
W
W/°C
V
mJ
A
mJ
V/ns
o
C
300 (for 5s)
3.3 (Typical)
g
* Current is limited by internal wire diameter
For footnotes refer to the last page
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1
08/08/01
IRHNA57163SE
Pre-Irradiation
Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)
Parameter
Min
Typ Max Units
BVDSS
Drain-to-Source Breakdown Voltage
130
∆BV DSS/∆T J Temp.Coefficient of Breakdown Voltage —
RDS(on)
Static Drain-to-Source On-State
—
Resistance
—
—
VGS(th)
Gate Threshold Voltage
2.0
gfs
Forward Transconductance
39
IDSS
Zero Gate Voltage Drain Current
—
—
—
—
0.17
—
V/°C
— 0.0137
— 0.0135 Ω
— 0.0135
—
4.0
V
—
—
S( )
—
10
µA
—
25
IGSS
IGSS
Qg
Q gs
Q gd
td(on)
tr
td(off)
tf
LS + LD
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4.0
100
-100
160
55
75
35
125
80
50
—
Ciss
C oss
C rss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
5020
1490
116
—
—
—
Test Conditions
V
VGS = 0V, ID = 1.0mA
Ω
nA
nC
Reference to 25°C, ID = 1.0mA
VGS = 12V, ID = 75A
VGS = 12V, ID = 62A ➃
VGS = 12V, ID = 45A
VDS = VGS, ID = 1.0mA
VDS > 15V, IDS = 62A ➃
VDS = 104V ,VGS=0V
VDS = 104V,
VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
VGS =12V, ID = 75A
VDS = 65V
VDD = 65V, ID = 75A,
VGS =12V, RG = 2.35Ω
ns
nH
Measured from the center of
drain pad to center of source pad
VGS = 0V, VDS = 25V
f = 1.0MHz
pF
Source-Drain Diode Ratings and Characteristics
Parameter
Min Typ Max Units
IS
ISM
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode) ➀
—
—
—
—
75*
300
A
VSD
t rr
Q RR
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
—
—
—
—
—
—
1.2
300
4.1
V
ns
µC
ton
Forward Turn-On Time
Test Conditions
Tj = 25°C, IS = 75A, VGS = 0V ➃
Tj = 25°C, IF = 75A, di/dt ≤ 100A/µs
VDD ≤ 25V ➃
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by LS + LD.
* Current is limited by internal wire diameter
Thermal Resistance
Parameter
RthJC
RthJ-PCB
Junction-to-Case
Junction-to-PC board
Min Typ Max Units
—
—
—
1.6
0.42
—
°C/W
Test Conditions
soldered to a 2” square copper-clad board
Note: Corresponding Spice and Saber models are available on the G&S Website.
For footnotes refer to the last page
2
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Radiation Characteristics
Pre-Irradiation
IRHNA57163SE
International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability.
The hardness assurance program at International Rectifier is comprised of two radiation environments.
Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both
pre- and post-irradiation performance are tested and specified using the same drive circuitry and test
conditions in order to provide a direct comparison.
Table 1. Electrical Characteristics @ Tj = 25°C, Post Total Dose Irradiation ➄➅
Parameter
BVDSS
VGS(th)
IGSS
IGSS
IDSS
RDS(on)
RDS(on)
VSD
Units
Test Conditions ˆ
V
µA
VGS = 0V, ID = 1.0mA
VGS = VDS, ID = 1.0mA
VGS = 20V
VGS = -20V
VDS= 104V, VGS= 0V
0.014
Ω
VGS = 12V, ID = 45A
—
0.0135
Ω
VGS = 12V, ID = 45A
—
1.2
V
VGS = 0V, ID = 75A
100K Rads (Si)
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Zero Gate Voltage Drain Current
Static Drain-to-Source „
On-State Resistance (TO-3)
Static Drain-to-Source „
On-State Resistance (SMD-2)
Diode Forward Voltage
„
Min
Max
130
2.0
—
—
—
—
4.5
100
-100
10
—
nA
International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for
Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.
Table 2. Single Event Effect Safe Operating Area
Ion
Br
I
Au
LET
MeV/(mg/cm2))
36.7
59.8
82.3
VDS (V)
Range
(µm) @VGS=0V @VGS=-5V @VGS=-10V @VGS=-15V @VGS=-20V
39.5
130
130
130
130
130
32.5
130
130
130
100
50
28.4
130
120
30
—
—
Energy
(MeV)
309
341
350
150
VDS
120
Br
90
I
60
Au
30
0
0
-5
-10
-15
-20
VGS
Fig a. Single Event Effect, Safe Operating Area
For footnotes refer to the last page
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3
IRHNA57163SE
Pre-Irradiation
1000
1000
VGS
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
BOTTOM 5.0V
100
100
10
5.0V
1
20µs PULSE WIDTH
T = 25 C
1
5.0V
10
10
100
I D , Drain-to-Source Current (A)
TJ = 150 ° C
100
TJ = 25 ° C
1
V DS =15
50V
20µs PULSE WIDTH
7
8
9
10
11
VGS , Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
4
R DS(on) , Drain-to-Source On Resistance
(Normalized)
3.0
6
10
100
Fig 2. Typical Output Characteristics
1000
5
1
VDS , Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
0.1
°
J
1
0.1
VDS , Drain-to-Source Voltage (V)
10
20µs PULSE WIDTH
T = 150 C
°
J
0.1
0.1
VGS
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
BOTTOM 5.0V
TOP
I D , Drain-to-Source Current (A)
I D , Drain-to-Source Current (A)
TOP
ID = 75A
2.5
2.0
1.5
1.0
0.5
0.0
-60 -40 -20
VGS = 12V
0
20
40
60
80 100 120 140 160
TJ , Junction Temperature( ° C)
Fig 4. Normalized On-Resistance
Vs. Temperature
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Pre-Irradiation
VGS = 0V,
f = 1MHz
Ciss = Cgs + Cgd , Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
10000
8000
Ciss
6000
Coss
4000
Crss
2000
20
VGS , Gate-to-Source Voltage (V)
12000
C, Capacitance (pF)
IRHNA57163SE
10
12
8
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
100
0
VDS , Drain-to-Source Voltage (V)
50
100
150
200
250
QG , Total Gate Charge (nC)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
1000
1000
OPERATION IN THIS AREA LIMITED
BY R DS(ON)
100
TJ = 150 ° C
ID, Drain Current (A)
ISD , Reverse Drain Current (A)
VDS = 104V
VDS = 65V
VDS = 26V
16
0
1
ID = 75A
100
10
TJ = 25 ° C
1
0.1
0.2
100µs
10
1ms
V GS = 0 V
0.6
1.0
1.4
1.8
VSD ,Source-to-Drain Voltage (V)
2.2
Tc = 25°C
Tj = 150°C
Single Pulse
10ms
1
1
10
100
1000
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
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Fig 8. Maximum Safe Operating Area
5
IRHNA57163SE
Pre-Irradiation
100
RD
VDS
LIMITED BY PACKAGE
VGS
I D , Drain Current (A)
80
D.U.T.
RG
+
-VDD
60
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
40
Fig 10a. Switching Time Test Circuit
20
VDS
90%
0
25
50
75
100
125
150
TC , Case Temperature ( ° C)
10%
VGS
Fig 9. Maximum Drain Current Vs.
Case Temperature
td(on)
tr
t d(off)
tf
Fig 10b. Switching Time Waveforms
Thermal Response (Z thJC )
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P DM
0.01
t1
t2
0.001
0.00001
Notes:
1. Duty factor D = t 1 / t 2
2. Peak TJ = P DM x Z thJC + TC
0.0001
0.001
0.01
0.1
1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
6
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Pre-Irradiation
IRHNA57163SE
1 5V
L
VD S
D .U .T.
RG
IA S
VGS
20V
D R IV E R
+
- VD D
0 .0 1 Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
A
EAS , Single Pulse Avalanche Energy (mJ)
500
TOP
400
BOTTOM
ID
34A
60A
75A
300
200
100
0
25
50
75
100
125
150
Starting TJ , Junction Temperature ( °C)
V (B R )D S S
tp
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
IAS
Current Regulator
Same Type as D.U.T.
Fig 12b. Unclamped Inductive Waveforms
50KΩ
QG
12V
.2µF
.3µF
12 V
QGS
QGD
+
V
- DS
VGS
VG
3mA
Charge
Fig 13a. Basic Gate Charge Waveform
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D.U.T.
IG
ID
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
7
IRHNA57163SE
Pre-Irradiation
Footnotes:
➀ Repetitive Rating; Pulse width limited by
maximum junction temperature.
➁ VDD = 50V, starting TJ = 25°C, L= 0.1 mH
Peak IL = 75A, VGS = 12V
➂ ISD ≤ 75A, di/dt ≤ 280A/µs,
VDD ≤ 130V, TJ ≤ 150°C
➃ Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
➄ Total Dose Irradiation with VGS Bias.
12 volt VGS applied and VDS = 0 during
irradiation per MIL-STD-750, method 1019, condition A.
➅ Total Dose Irradiation with VDS Bias.
104 volt VDS applied and VGS = 0 during
irradiation per MlL-STD-750, method 1019, condition A.
Case Outline and Dimensions — SMD-2
PAD ASSIGNMENTS
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TAC Fax: (310) 252-7903
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Data and specifications subject to change without notice. 08/01
8
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