UTC MJE13002 NPN EPITAXIAL SILICON TRANSISTOR NPN SILICON POWER TRANSISTOR The UTC MJE13002 designed for use in high–volatge,high speed,power switching in inductive circuit, It is particularly suited for 115 and 220V switchmode applications such as switching regulator’s,inverters,DC-DC converter,Motor control, Solenoid/Relay drivers and deflection circuits. FEATURES *Collector-Emitter Sustaining Voltage: VCEO (sus)=300V. *Collector-Emitter Saturation Voltage: VCE(sat)=1.0V(Max.) @Ic=1.0A, IB =0.25A *Switch Time- tf =0.7μs(Max.) @Ic=1.0A. 1 TO-126 1: BASE 2:COLLECTOR 3: EMITTER ABSOLUTE MAXIMUM RATINGS PARAMETER Collector-Emitter Voltage Collector-Emitter Voltage Emitter Base Voltage Collector Current- Continuous - Peak (1) Base Current – Continuous - Peak (1) Emitter Current – Continuous - Peak (1) Total Power Dissipation @ TA=25℃ Derate above 25℃ Total Power Dissipation @ TC=25℃ Derate above 25℃ Operating and Storage Junction Temperature Range SYMBOL RATING UNIT VCEO (sus) VCEV VEBO Ic ICM IB IBM IE IEM PD 300 600 9 1.5 3 0.75 1.5 2.25 4.5 V V 1.4 11.2 Watts MW/℃ PD 40 320 Tj , Tstg -65 to +150 Watts MW/℃ ℃ V A A A THERMAL CHARACTERISTICS CHARACTERISTIC Thermal Resistance, Junction to Case Thermal Resistance, Junction to Ambient Maximum Load Temperature for Soldering Purposes: 1/8” from Case for 5 Seconds (1) Pulse Test : Pulse Width=5ms,Duty Cycle≤10% UTC SYMBOL MAX UNIT RθJC RθJA TL 3.12 89 275 ℃/W ℃/W ℃ UNISONIC TECHNOLOGIES CO. LTD 1 QW-R204-014,B UTC MJE13002 NPN EPITAXIAL SILICON TRANSISTOR Designer 's Data for “Worst Case” Conditions – The Designer 's Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit curves – representing boundaries on device characteristics – are given to facilitate “Worst case” design. ELECTRICAL CHARACTERISTICS (Tc=25℃ unless otherwise noted) CHARACTERISTIC OFF CHARACTERISTICS (1) Collector-Emitter Sustaining Voltage (Ic=10 mA , IB=0) Collector Cutoff Current (VCEV=Rated Value, VBE (off)=1.5 V) (VCEV=Rated Value, VBE(off)=1.5V,Tc=100℃) SYMBOL MIN VCEO(SUS) 300 TYP MAX V ICEV Emitter Cutoff Current (VEB=9 V, Ic=0) SECOND BREAKDOWN Second Breakdown Collector Current with bass forward biased mA 1 5 1 IEBO Is/b hFE1 hFE2 mA See Figure 10 See Figure 11 RBSOA Clamped Inductive SOA with base reverse biased ON CHARACTERISTICS (1) DC Current Gain (Ic=0.5 A, VCE=2 V) (Ic=1 A, VCE=2 V) Collector-Emitter Saturation Voltage (Ic=0.5A,IB=0.1A) (Ic=1A,IB=0.25A) (Ic=1.5A,IB=0.5A) (Ic=1A,IB=0.25A,Tc=100℃) Base-Emitter Saturation Voltage (Ic=0.5A,IB=0.1A) (Ic=1A,IB=0.25 A) (Ic=1A,IB=0.25A,Tc=100℃) UNIT 8 5 40 25 VCE(sat) V 0.5 1 3 1 VBE(sat) V 1 1.2 1.1 DYNAMIC CHARACTERISTICS Current-Gain-Bandwidth Product (Ic=100mA,VCE=10 V, f=1MHz) Output Capacitance (VCB=10V,IE=0,f=0.1MHz) SWITCHING CHARACTERISTICS(TABLE 1) Delay Time (Vcc=125V,Ic=1A, Rise Time IB1=IB2=0.2A,tp=25μs, Storage Time Duty Cycle≤1%) Fall Time 10 MHz Cob 21 pF td 0.05 0.5 2 0.4 0.1 1 4 0.7 μs μs μs μs 1.7 0.29 0.15 4 0.75 μs μs μs fT tr ts tf INDUCTIVE LOAD, CLAMPED (TABLE 1,FIGURE 12) Storage Time (Ic=1A,Vclamp=300V, Crossover Time IB1=0.2A,VBE(off)=5V,Tc=100℃) Fall Time tsv tc tfi 4 (1) Pulse Test : PW=300μs, Duty Cycle≤2% CLASSIFICATION OF HFE1 RANK RANGE UTC A 8 ~ 16 B 15 ~ 21 C 20 ~ 26 D 25 ~ 31 UNISONIC TECHNOLOGIES E 30 ~ 36 F 35 ~ 40 CO. LTD 2 QW-R204-014,B UTC MJE13002 NPN EPITAXIAL SILICON TRANSISTOR TYPICAL PERFORMANCE CHARACTERISTICS Figure 2. Collector Saturation Region VCE,COLLECTOR -EMITTER VOLTAGE (VOLTS) Figure 1. DC Current Gain 80 60 Tj=150℃ hFE,DC CURRENT GAIN 40 25℃ 30 20 -55℃ 10 8 VCE=2V - - - - - -VCE=5V 6 4 0.02 0.03 0.05 0.07 0.1 0.2 0.3 0.5 0.7 2 Tj=25℃ 1.6 0.4 0 0.02 0.05 0.01 0.1 0.2 0.5 VBE(sat)@IC/IB=3 - - - - - - VBE(on)@VCE=2V V,VOLTAGE (VOLTS) 25℃ 0.8 25℃ 0.6 150℃ 0.4 0.02 0.03 0.05 0.07 0.1 0.2 0.3 0.25 IC/IB=3 Tj=-55℃ 0.2 25℃ 0.15 0.1 150℃ 0.05 0.5 0.7 1 0 0.02 0.03 2 IC, COLLECTOR CURRENT (AMP) 0.05 0.07 0.1 VCE=250V 200 V,VOLTAGE (VOLTS) 125℃ 100℃ 1 10 75℃ 50℃ Cib 100 70 50 30 20 0 10 REVERSE -0.2 FORWARD 0 +0.2 +0.4 VBE,BASE-EMITTER VOLTAGE (VOLTS) UTC Cob 10 25℃ -0.4 2 300 Tj=150℃ 2 0.5 0.7 1 500 3 10 0.3 Figure 6. Capacitance Figure 5. Collector Cutoff Region 4 0.2 IC, COLLECTOR CURRENT (AMP) 10 -1 2 0.3 Tj=-55℃ 1 10 1 0.35 1.2 V,VOLTAGE (VOLTS) 0.05 Figure 4. Collector-Emitter Saturation Region Figure 3. Base-Emitter Voltage 1.4 IC,COLLECTOR CURRENT (米A) 0.02 IB, BASE CURRENT (AMP) IC , COLLECTOR CURRENT (AMP) 10 1.5A 1A 0.8 2 1 Ic=0.1A 0.3A 0.5A 1.2 +0. 6 7 5 0.1 0.2 0.5 1 2 5 10 20 50 100 200 500 1000 VR,REVERSE VOLTAGE (VOLTS) UNISONIC TECHNOLOGIES CO. LTD 3 QW-R204-014,B UTC MJE13002 NPN EPITAXIAL SILICON TRANSISTOR TABLE 1.TEST CONDITIONS FOR DYNAMIC PERFORMANCE REVERSE BIAS SAFE OPERATING AREA AND INDUCTIVE SWITCHING +5V 1N4933 Vcc 33 MJE210 L TEST CIRCUITS 0.001μF 33 pw 5V 68 0.02μF IB 5.1k 1k *SELECTED FOR≧1kV SCOPE D1 -4.0V 51 T.U.T. TUT RB VCE 2N2905 270 47 1/2W 100 NOTE PW and Vcc Adjusted for Desired Ic RB Adjusted for Desired IB1 CIRCUIT VALUES Rc Vclamp Ic RB 1k +5V 1N4933 +125V MR826* 1N4933 2N2222 1k DUTY CYCLE≦10% tr,tf≦10ns RESISTIVE SWITHCING MJE200 -VBE(off) Coil Data : FERROXCUBE core #6656 Full Bobbin (-200 Turns) #20 GAP for 30 mH/2 A Lcoil=50mH Vcc=125V Rc=125Ω D1=1N5820 or Equiv. RB=47Ω Vcc=20V Vclamp=300V TEST WAVEFORMS OUTPUT WAVEFORMS Ic tf CLAMPED Ic(pk) t t1 +10.3V t1 Adjusted to Obtain Ic tf t1= VCE VCE or Vclamp TIME t t2 t2= Lcoil(Icpk) Vcc 25μS 0 Test Equipment Scope-Tektronics 475 or Equivalent -8.5V tr,tf<10ns Duty Cycly=1.0% RB and Rc adjusted for desired IB and Ic Lcoil(Icpk) Vclamp TABLE 2.TYPICAL INDUCTIVE SWITCHING PERFORMANCE Ic AMP 0.5 Tc ℃ Tsv Trv Tfi Tti Tc μs μs μs μs μs 0.30 0.30 0.14 0.26 0.10 0.22 0.35 0.40 0.05 0.06 0.05 0.08 0.30 0.36 0.16 0.29 0.16 0.28 25 1.3 0.23 100 1.6 0.26 1 25 1.5 0.10 100 1.7 0.13 1.5 25 1.8 0.07 100 3 0.08 Note: All Data Recorded in the inductive Switching Circuit Table 1 UTC UNISONIC TECHNOLOGIES CO. LTD 4 QW-R204-014,B UTC MJE13002 NPN EPITAXIAL SILICON TRANSISTOR SWITCHING TIMES NOTE In resistive switching circuits, rise, fall, and storage times have been defined and apply to both current and voltage waveforms since they are in phase, However, for inductive loads which are common to SWITCHMODE power supplies and hammer drivers, current and voltage waveforms are not in phase. Therefore, separate measurements must be made on each wave form to determine the total switching time, For this reason, the following new terms have been defined. tsv=Voltage Storage Time, 90% IB1 to 10% Vclamp trv=Voltage Rise Time, 10-90% Vclamp tfi=Current Fall Time, 90-10% Ic tti=Current Tail, 10-2% Ic tc=Crossover Time, 10% Vclamp to 10% IC An enlarged portion of the inductive switching waveforms is shown in Figure 7 to aid in the visual identity of these terms. For the designer, there is minimal switching loss during storage time and the predominant switching power losses occur during the crossover interval and can be obtained using the standard equation from AN-222: PSWT=1/2 VccIc (tc)f In general, trv + tfi≒tc. However, at lower test currents this relationship may not be valid. As is common with most switching transistor, resistive switching is specified at 25℃ and has become a benchmark for designers. However, for designers of high frequency converter circuits, the user oriented specifications which make this a “SWITCHMODE” transistor are the inductive switching speeds (tc and tsv) which are guaranteed at 100 ℃ SAFE OPERATING AREA INFORMATION FORWARD BIAS There are two limitations on the power handling ability of a transistor: average junction temperature and second break-down. Safe operating area curves indicate Ic – VCE limits of the transistor that must be observed for reliable operation; i.e., the transistor must not be subjected to greater dissipation than the curves indicate. The data of Figure 10 is based on Tc=25℃; TJ(pk) is variable depending on power level. Second breakdown pulse limits are valid for duty cycles to 10% but must be derated when Tc≧25℃. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the voltages shown on Figure 10 may be found at any case tem-perature by using the appropriate curve on Figure 12. TJ(pk) may be calculated from the data in Figure 10. At high case temperatures, thermal limitations will reduce the power that can be handled to values less than the limitations imposed by second breakdown. REVERSE BIAS For inductive loads, high voltage and high current must be sustained simultaneously during turn–off, in most cases, with the base to emitter junction reverse biased. Under these conditions the collector voltage must be held to a safe level at or below a specific value of collector current. This can be accomplished by several means such as active clamping, RC snubbing, load line shaping, etc. The safe level for these devices is specified as Reverse Bias Safe Operating Area and represents the voltage–current conditions during re-verse biased turn–off. This rating is verified under clamped conditions so that the device is never subjected to an ava-lanche mode. Figure 11 gives RBSOA characteristics. UTC UNISONIC TECHNOLOGIES CO. LTD 5 QW-R204-014,B UTC MJE13002 NPN EPITAXIAL SILICON TRANSISTOR Figure 7. Inductive Switching Measurements Vclamp 90% Vclamp 1 0.7 90% Ic trv 0.5 tti tfi t,TIME(米S) tsv Ic Figure 8. Turn-On Time 2 ICPK tc VCE 10% Vclamp IB 10% ICPK 90% IB1 Vcc=125V Ic/IB=5 TJ=25℃ tr 0.3 0.2 td @ VBE(off)=5V 0.1 0.07 2% IC 0.05 0.03 0.02 0.02 0.03 TIME Ic,COLLECTOR CURRENT (AMP) t,TIME(米S) 3 1 0.7 0.5 tr 0.2 1 0 20 10μS 2 100μS 1 5.0ms 0.2 0.1 0.05 1.0ms dc 0.5 Tc=25℃ THERMAL LIMIT (SINGLE PULSE) BONDING WIRE LIMIT SECOND BREAKDOWN LIMIT CURVES APPLY BELOW RATED VCEO 0.02 0.1 0.02 0.03 0.05 0.07 0.1 0.2 0.3 0.0 1 5 2 0.5 0.7 1 IC, COLLECTOR CURRENT (AMP) 20 10 Figure 11. Reverse Bias Safe Operating Area POWER DERATING FACTOR 1.2 VBE(off)=9V Tj≦100℃ IB1=1A 5V 0.4 200 500 300 Figure 12. Forward Bias Power Derating 1 0.8 100 50 VCE,COLLECTOR-EMITTERVOLTAGE (VOLTS) 1.6 V,VOLTAGE (VOLTS) 0.5 0.7 5 2 0.3 0.3 10 Vcc=125V Ic/IB=5 TJ=25℃ ts 5 0.2 Figure 10. Active Region Safe Operating Area Figure 9. Turn-Off Time 10 7 0.05 0.07 0.1 IC, COLLECTOR CURRENT (AMP) SECOND BREAKDOWN DERATING 0.8 0.6 THERMAL DERATING 0.4 0.2 3V 1.5V 0 0 100 200 30 0 40 0 0 500 600 700 800 VCEV,COLLECTOR-EMITTER LAMP VOLTAGE(VOLTS) UTC 20 40 60 80 100 120 140 160 IC, CASE TEMPERATURE (℃) UNISONIC TECHNOLOGIES CO. LTD 6 QW-R204-014,B UTC MJE13002 NPN EPITAXIAL SILICON TRANSISTOR Figure 13. Thermal Response r(t),EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) 1 0.7 D=0.5 0.5 0.3 0.2 0.1 0.07 0.05 0.2 0.1 0.02 0.01 0.03 0.02 0.01 0.01 ZθJC(t)=r(t) RθJC RθJC=3.12℃/W MAX D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk)-TC=P(pk) RθJC(t) 0.05 SINGLE PULSE 0.02 0.03 0.05 0.1 0.2 0.3 0.5 1 2 3 5 10 20 50 P (PK) t1 t2 DUTY CYCLE,D=t1/t2 100 200 500 1000 IC, COLLECTOR CURRENT (AMP) UTC assumes no responsibility for equipment failures that result from using products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other parameters) listed in products specifications of any and all UTC products described or contained herein. UTC products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. UTC UNISONIC TECHNOLOGIES CO. LTD 7 QW-R204-014,B