ONSEMI MJ13333

Order this document
by MJ13333/D
SEMICONDUCTOR TECHNICAL DATA
 20 AMPERE
NPN SILICON
POWER TRANSISTORS
400–500 VOLTS
175 WATTS
The MJ13333 transistor is designed for high voltage, high–speed, power switching
in inductive circuits where fall time is critical. It is particularly suited for line operated
switchmode applications such as:
• Switching Regulators
• Inverters
• Solenoid and Relay Drivers
• Motor Controls
• Deflection Circuits
Fast Turn Off Times
200 ns Inductive Fall Time — 25_C (Typ)
1.8 µs Inductive Storage Time — 25_C (Typ)
Operating Temperature Range –65 to + 200_C
CASE 1–07
TO–204AA
(TO–3)
100_C Performance Specified for:
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v
Reversed Biased SOA with Inductive Loads
Switching Times with Inductive Loads
Saturation Voltages
Leakage Currents
MAXIMUM RATINGS
Symbol
Value
Unit
Collector–Emitter Voltage
Rating
VCEO
400
Vdc
Collector–Emitter voltage
VCEV
700
Vdc
Emitter Base Voltage
VEB
6.0
Vdc
Collector Current — Continuous
Peak (1)
IC
ICM
20
30
Adc
Base Current — Continuous
Peak (1)
IB
IBM
10
15
Adc
Total Power Dissipation @ TC = 25_C
@ TC = 100_C
Derate above 25_C
PD
175
100
1.0
Watts
TJ, Tstg
– 65 to + 200
_C
Symbol
Max
Unit
RθJC
1.0
_C/W
TL
275
_C
Operating and Storage Junction Temperature Range
W/_C
THERMAL CHARACTERISTICS
Characteristic
Thermal Resistance, Junction to Case
Maximum Lead Temperature for Soldering Purposes 1/8″ from Case for 5 Seconds
(1) Pulse Test: Pulse Width = 5 ms, Duty Cycle 10%.
(1) Similar device types available with lower VCEO ratings, see the MJ13330 (200 V) and MJ13331 (250 V).
Designer’s and SWITCHMODE are trademarks of Motorola, Inc.
Designer’s Data for “Worst Case” Conditions — The Designer’s Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves — representing boundaries on device characteristics — are given to facilitate “worst case” design.
REV 1
 Motorola, Inc. 1995
Motorola Bipolar Power Transistor Device Data
1
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ELECTRICAL CHARACTERISTICS (TC = 25_C unless otherwise noted)
Characteristic
Symbol
Min
Typ
Max
Unit
VCEO(sus)
400
—
—
Vdc
—
—
—
—
0.25
5.0
OFF CHARACTERISTICS
Collector–Emitter Sustaining Voltage (Table 1)
(IC = 100 mA, IB = 0)
Collector Cutoff Current
(VCEV = Rated Value, VBE(off) = 1.5 Vdc)
(VCEV = Rated Value, VBE(off) = 1.5 Vdc, TC = 150_C)
ICEV
mAdc
Collector Cutoff Current
(VCE = Rated VCEV, RBE = 50 Ω, TC = 100_C)
ICER
—
—
5.0
mAdc
Emitter Cutoff Current
(VEB = 6.0 Vdc, IC = 0)
IEBO
—
—
1.0
mAdc
SECOND BREAKDOWN
Second Breakdown Collector Current with base forward biased
Clamped Inductive SOA with Base Reverse Biased
IS/b
See Figure 12
RBSOA
See Figure 13
ON CHARACTERISTICS (1)
DC Current Gain
(IC = 5.0 Adc, VCE = 5.0 Vdc)
hFE
10
—
60
—
—
—
—
—
—
1.8
5.0
2.4
—
—
—
—
1.8
1.8
Cob
125
—
500
pF
td
—
0.02
0.1
µs
tr
—
0.3
0.7
µs
ts
—
1.6
4.0
µs
tf
—
0.3
0.7
µs
tsv
—
2.5
5.0
µs
tc
—
0.8
2.0
µs
tsv
—
1.8
—
µs
tc
—
0.4
—
µs
tfi
—
0.2
—
µs
Collector–Emitter Saturation Voltage
(IC = 10 Adc, IB = 2.0 Adc)
(IC = 20 Adc, IB = 6.7 Adc)
(IC = 10 Adc, IB = 2.0 Adc, TC = 100_C)
VCE(sat)
Base Emitter Saturation Voltage
(IC = 10 Adc, IB = 2.0 Adc)
(IC = 10 Adc, IB = 2.0 Adc, TC = 100_C)
VBE(sat)
—
Vdc
Vdc
DYNAMIC CHARACTERISTICS
Output Capacitance
(VCB = 10 Vdc, IE = 0, ftest = 1.0 kHz)
SWITCHING CHARACTERISTICS
Resistive Load (Table 1)
Delay Time
Rise Time
Storage Time
(VCC = 250 Vdc, IC = 10 A,
IB1 = 2.0 A, VBE(off) = 5.0 Vdc, tp = 10 µs,
2.0%)
Duty Cycle
Fall Time
Inductive Load, Clamped (Table 1)
Storage Time
Crossover Time
(IC = 10 A(pk), Vclamp = 250 Vdc, IB1 = 2.0 A,
VBE(off) = 5 Vdc, TC = 100°C)
Storage Time
Crossover Time
(IC = 10 A(pk), Vclamp = 250 Vdc, IB1 = 2.0 A,
VBE(off) = 5 Vdc, TC = 25_C)
Fall Time
(1) Pulse Test: PW = 300 µs, Duty Cycle
2
2%.
Motorola Bipolar Power Transistor Device Data
MJ13333
VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS)
100
hFE, DC CURRENT GAIN
150°C
50
25°C
20
VCE = 5 V
10
5.0
0.2
0.5
5.0
1.0
2.0
IC, COLLECTOR CURRENT (AMPS)
10
2.0
1.6
1A
1.2
0.4
0
0.01
20
1.6
1.2
0.8
0.4
25°C
150°C
2.0
5.0
20
10
VBE(sat) , BASE–EMITTER SATURATION VOLTAGE (VOLTS)
VCE , COLLECTOR–EMITTER VOLTAGE (VOLTS)
IC/IB = 5
1.0
0.05
0.1 0.2
0.5
1.0
IB, BASE CURRENT (AMP)
2.0
IC/IB = 5
1.2
25°C
0.8
150°C
0.4
0
0.2
0.5
1.0
2.0
5.0
Figure 3. Collector–Emitter Saturation Region
Figure 4. Base–Emitter Voltage
10
20
3000
2000
Cib
C, CAPACITANCE (pF)
103
TJ = 150°C
102
125°C
101
100°C
75°C
REVERSE
FORWARD
25°C
10–1
– 0.4
10
1.6
IC, COLLECTOR CURRENT (AMP)
100
5.0
2.0
IC, COLLECTOR CURRENT (AMP)
104
IC, COLLECTOR CURRENT ( µA)
0.02
Figure 2. Collector Saturation Region
2.0
0.5
10 A
0.8
Figure 1. DC Current Gain
0
0.2
5A
200
Cob
100
VCE = 250 V
– 0.2
0
+ 0.2
+ 0.4
VBE, BASE–EMITTER VOLTAGE (VOLTS)
Figure 5. Collector Cutoff Region
Motorola Bipolar Power Transistor Device Data
1000
700
500
50
+ 0.6
30
0.1
0.5 1.0
5.0 10
50 100
VR, REVERSE VOLTAGE (VOLTS)
500 1000
Figure 6. Capacitance
3
MJ13333
IC pk
90% Vclamp
IC
VCE
IB
In resistive switching circuits, rise, fall, and storage times
have been defined and apply to both current and voltage
waveforms since they are in phase. However, for inductive
loads which are common to SWITCHMODE power supplies
and hammer drivers, current and voltage waveforms are not
in phase. Therefore, separate measurements must be made
on each waveform to determine the total switching time. For
this reason, the following new terms have been defined.
90% IC
trv
tsv
SWITCHING TIMES NOTE
Vclamp
tfi
tc
10% Vclamp
90% IB1
tti
10%
IC pk
2% IC
tsv = Voltage Storage Time, 90% IB1 to 10% Vclamp
trv = Voltage Rise Time, 10 – 90% Vclamp
tfi = Current Fall Time, 90 – 10% IC
tti = Current Tail, 10 – 2% IC
tc = Crossover Time, 10% Vclamp to 10% IC
An enlarged portion of the inductive switching waveforms
is shown in Figure 7 to aid in the visual identity of these
terms.
For the designer, there is minimal switching loss during
storage time and the predominant switching power losses
occur during the crossover interval and can be obtained using the standard equation from AN–222:
TIME
Figure 7. Inductive Switching Measurements
IB2(pk), BASE CURRENT (AMP)
10
IC = 10 A
IB1 = 2 A
Vclamp = 250 V
TJ = 25°C
7.0
PSWT = 1/2 VCCIC(tc)f
]
In general, trv + t fi
t c . However, at lower test currents this
relationship may not be valid.
As is common with most switching transistors, resistive
switching is specified at 25°C and has become a benchmark
for designers, However, for designers of high frequency converter circuits, the user oriented specifications which make
this a “SWITCHMODE” transistor are the inductive switching
speeds (tc and tsv) which are guaranteed at 100°C.
5.0
2.0
0
2.0
5.0
10
VBE(off), REVERSE BASE VOLTAGE (VOLTS)
Figure 8. Reverse Base Current versus
VBE(off) With No External Base Resistance
RESISTIVE SWITCHING PERFORMANCE
5.0
2.0
1.0
VCC = 250 V
IC/IB = 5
tr
1.0
t, TIME ( µs)
t, TIME ( µs)
0.5
0.2
0.1
0.5
1.0
2.0
5.0
IC, COLLECTOR CURRENT (AMP)
tf
VCE = 250 V
IC/IB = 5
VBE(off) = 5 V
0.1
td
10
Figure 9. Turn–On Switching Times
4
0.5
0.2
0.05
0.02
0.2
ts
2.0
20
0.05
0.2
0.5
1.0
2.0
5.0
IC, COLLECTOR CURRENT (AMP)
10
Figure 10. Turn–Off Switching Times
Motorola Bipolar Power Transistor Device Data
20
MJ13333
Table 1. Test Conditions for Dynamic Performance
VCEO(sus)
RBSOA AND INDUCTIVE SWITCHING
RESISTIVE SWITCHING
+15 V
470 Ω
2W
250 µF
47 Ω
R1
15 V
TURN–ON TIME
0
+10 V
20
INPUT
CONDITIONS
1
330 Ω
1
2
IB1
1
0
5.1 Ω
5W
2
50 Ω
PW Varied to Attain
IC = 100 mA
R2
2
IB1 adjusted to
obtain the forced
hFE desired
100 Ω
TURN–OFF TIME
Use inductive switching
driver as the input to
the resistive test circuit.
39 Ω
430 Ω
All Diodes — 1N4934
All NPN — MJE200
All PNP — MJE210
– 5.2
250 µF
CIRCUIT
VALUES
Adjust R1 to obtain IB1
For switching and RBSOA, R2 = 0
For VCEO(sus), R2 = ∞
Lcoil = 180 µH
Rcoil = 0.05 Ω
VCC = 20 V
Lcoil = 80 mH, VCC = 10 V
Rcoil = 0.7 Ω
TEST CIRCUITS
INDUCTIVE TEST CIRCUIT
OUTPUT WAVEFORMS
1
1N4937
OR
EQUIVALENT
INPUT
SEE ABOVE FOR
DETAILED CONDITIONS
Vclamp
Rcoil
IC(pk)
Lcoil
VCC
r(t), EFFECTIVE TRANSIENT THERMAL
RESISTANCE (NORMALIZED)
t2 ≈
VCE or
Vclamp
TIME
1
0.7
0.5
tf
VCE
RS =
0.1 Ω
2
t1 ≈
tf Clamped
t
t1
RESISTIVE TEST CIRCUIT
t1 Adjusted to
Obtain IC
IC
TUT
VCC = 250 V
RL = 50 Ω
Pulse Width = 10 µs
Vclamp = 250 V
RB adjusted to attain desired IB1
t
t2
Lcoil (IC
pk
)
TUT
VCC
Lcoil (IC
pk
VClamp
RL
1
)
2
VCC
Test Equipment
Scope — Tektronix
475 or Equivalent
D = 0.5
0.3
0.2
0.2
0.1
0.1
0.07
0.05
0.02
0.01
0.03
0.02
0.01
0.01
SINGLE PULSE
0.02 0.03
0.05
0.1
P(pk)
RθJC(t) = r(t) RθJC
RθJC = 1.0°C/W MAX
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) – TC = P(pk) RθJC(t)
0.05
0.2 0.3
0.5
1
2 3
5
t, TIME (ms)
10
20
t1
t2
DUTY CYCLE, D = t1/t2
30
50
100
200 300
500 1000
Figure 11. Thermal Response
Motorola Bipolar Power Transistor Device Data
5
MJ13333
IC, COLLECTOR CURRENT (AMP)
50
10 µs
20
10
5
100 µs
2
dc
FORWARD BIAS
1 ms
1
0.2
0.1
0.05
0.02
0.01
0.005
BONDING WIRE LIMIT
THERMAL LIMIT @ TC = 25°C
(SINGLE PULSE)
SECOND BREAKDOWN LIMIT
MJ13333
6
10
200
350 450 600
20
50
100
400 500
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 12. Forward Bias Safe Operating Area
I C(pk), PEAK COLLECTOR CURRENT (AMPS)
SAFE OPERATING AREA INFORMATION
20
There are two limitations on the power handling ability of a
transistor average junction temperature and second breakdown. Safe operating area curves indicate IC – VCE limits of
the transistor that must be observed for reliable operation,
i.e., the transistor must not be subjected to greater dissipation than the curves indicate.
The data of Figure 12 is based on TC = 25_C. T J(pk) is
variable depending on power level. Second breakdown pulse
limits are valid for duty cycles to 10% but must be derated
when TC ≥ 25_C. Second breakdown limitations do not derate the same as thermal limitations. Allowable current at the
voltages shown on Figure 12 may be found at any case temperature by using the appropriate curve on Figure 14.
T J(pk) may be calculated from the data in Figure 11. At high
case temperatures, thermal limitations will reduce the power
that can be handled to values less than the limitations imposed by second breakdown.
REVERSE BIAS
16
For inductive loads, high voltage and high current must be
sustained simultaneously during turn–off, in most cases, with
the base to emitter junction reverse biased. Under these
conditions the collector voltage must be held to a safe level
at or below a specific value of collector current. This can be
accomplished by several means such as active clamping,
RC snubbing, load line shaping, etc. The safe level for these
devices is specified as Reverse Bias Safe Operating Area
and represents the voltage–current condition allowable during reverse biased turn–off. This rating is verified under
clamped conditions so that the device is never subjected to
an avalanche mode. Figure 13 gives the complete RBSOA
characteristics.
12
8.0
4.0
0
IC/IB ≥ 5
VBE(off) = 5 V
TJ = 100°C
100
200
300
600
400
500
VCE, COLLECTOR–EMITTER VOLTAGE (VOLTS)
Figure 13. RBSOA, Reverse Bias Switching
Safe Operating Area
POWER DERATING FACTOR (%)
100
FORWARD BIAS
SECOND BREAKDOWN
DERATING
80
60
THERMAL
DERATING
40
20
0
0
40
120
80
TC, CASE TEMPERATURE (°C)
160
200
Figure 14. Power Derating
6
Motorola Bipolar Power Transistor Device Data
MJ13333
PACKAGE DIMENSIONS
A
N
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. ALL RULES AND NOTES ASSOCIATED WITH
REFERENCED TO–204AA OUTLINE SHALL APPLY.
C
–T–
E
D
K
2 PL
0.13 (0.005)
U
T Q
M
M
Y
M
–Y–
L
V
SEATING
PLANE
2
H
G
B
M
T Y
1
–Q–
0.13 (0.005)
M
DIM
A
B
C
D
E
G
H
K
L
N
Q
U
V
INCHES
MIN
MAX
1.550 REF
–––
1.050
0.250
0.335
0.038
0.043
0.055
0.070
0.430 BSC
0.215 BSC
0.440
0.480
0.665 BSC
–––
0.830
0.151
0.165
1.187 BSC
0.131
0.188
MILLIMETERS
MIN
MAX
39.37 REF
–––
26.67
6.35
8.51
0.97
1.09
1.40
1.77
10.92 BSC
5.46 BSC
11.18
12.19
16.89 BSC
–––
21.08
3.84
4.19
30.15 BSC
3.33
4.77
STYLE 1:
PIN 1. BASE
2. EMITTER
CASE: COLLECTOR
CASE 1–07
TO–204AA (TO–3)
ISSUE Z
Motorola Bipolar Power Transistor Device Data
7
MJ13333
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8
◊
Motorola Bipolar Power Transistor Device Data
*MJ13333/D*
MJ13333/D