FDD6692/FDU6692 30V N-Channel PowerTrench MOSFET General Description Features This N-Channel MOSFET has been designed specifically to improve the overall efficiency of DC/DC converters using either synchronous or conventional switching PWM controllers. It has been optimized for low gate charge, low RDS( ON) and fast switching speed. • 54 A, 30 V. RDS(ON) = 12 mΩ @ VGS = 10 V RDS(ON) = 14.5 mΩ @ VGS = 4.5 V • Low gate charge (18 nC typical) • Fast switching Applications • High performance trench technology for extremely low RDS(ON) • DC/DC converter • Motor drives D D G S D-PAK TO-252 (TO-252) I-PAK (TO-251AA) G D S Absolute Maximum Ratings Symbol G S TA=25oC unless otherwise noted Ratings Units VDSS Drain-Source Voltage Parameter 30 V VGSS Gate-Source Voltage ±16 V ID Drain Current (Note 3) 54 A (Note 1a) 162 (Note 1) 57 (Note 1a) 3.8 – Continuous – Pulsed PD Power Dissipation for Single Operation 1.6 (Note 1b) TJ, TSTG W Operating and Storage Junction Temperature Range °C -55 to +175 Thermal Characteristics (Note 1) 2.6 °C/W Thermal Resistance, Junction-to-Ambient (Note 1a) 40 °C/W Thermal Resistance, Junction-to-Ambient (Note 1b) 96 °C/W RθJC Thermal Resistance, Junction-to-Case RθJA RθJA Package Marking and Ordering Information Device Marking Device Package Reel Size Tape width Quantity FDD6692 FDD6692 D-PAK (TO-252) 13’’ 12mm 2500 units FDU6692 FDU6692 I-PAK (TO-251) Tube N/A 75 2001 Fairchild Semiconductor Corporation FDD/FDU6692 Rev C(W) FDD6692/FDU6692 April 2001 Symbol TA = 25°C unless otherwise noted Parameter Test Conditions Min Typ Max Units Drain-Source Avalanche Ratings (Note 2) W DSS Drain-Source Avalanche Energy IAR Drain-Source Avalanche Current Single Pulse, VDD = 15 V, ID=14A 165 mJ 14 A Off Characteristics VGS = 0 V, ID = 250 µA BVDSS ∆BVDSS ∆TJ IDSS Drain–Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current VDS = 24 V, VGS = 0 V IGSSF Gate–Body Leakage, Forward VGS = 16 V, IGSSR Gate–Body Leakage, Reverse VGS = –16 V, On Characteristics VGS(th) ∆VGS(th) ∆TJ RDS(on) 30 ID = 250 µA, Referenced to 25°C V 26 mV/°C 1 µA VDS = 0 V 100 nA VDS = 0 V –100 nA 3 V (Note 2) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain–Source On–Resistance VDS = VGS, ID = 250 µA ID = 250 µA, Referenced to 25°C ID(on) On–State Drain Current VGS = 10 V, ID = 14 A ID = 13 A VGS = 4.5 V, VGS = 10 V, ID = 14 A, TJ = 125°C VGS = 10 V, VDS = 5 V gFS Forward Transconductance VDS = 5 V, ID = 14 A VDS = 15 V, f = 1.0 MHz V GS = 0 V, 1 1.6 –5 9.5 11.5 16.5 mV/°C 12 14.5 18 50 mΩ A 54 S Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn–On Delay Time tr Turn–On Rise Time 2164 pF 357 pF 138 pF (Note 2) VDD = 15 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω 9 18 ns 5 10 ns ns td(off) Turn–Off Delay Time 35 56 tf Turn–Off Fall Time 10 20 ns Qg Total Gate Charge 18 25 nC Qgs Gate–Source Charge Qgd Gate–Drain Charge VDS = 15 V, VGS = 5 V ID = 14 A, 5 nC 5 nC Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain–Source Diode Forward Current VSD Drain–Source Diode Forward Voltage VGS = 0 V, IS = 3.2 A (Note 2) 0.72 3.2 A 1.2 V FDD/ FDU6692 Rev. C(W) FDD6692/FDU6692 Electrical Characteristics the drain pins. RθJC is guaranteed by design while RθCA is determined by the user's board design. a) RθJA = 40°C/W when mounted on a 1in2 pad of 2 oz copper b) RθJA = 96°C/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0% 3. Maximum current is calculated as: PD R DS(ON) where PD is maximum power dissipation at TC = 25°C and RDS(on) is at TJ(max) and VGS = 10V. Package current limitation is 21A FDD/ FDU6692 Rev. C(W) FDD6692/FDU6692 Notes: 1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of FDD6692/FDU6692 Typical Characteristics 2.25 50 4.5V 6.0V ID, DRAIN CURRENT (A) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 10V 40 3.5V 3.0V 30 20 10 2.5V 2 1.75 VGS = 3.0V 1.5 3.5V 1.25 4.5V 6.0V 10V 1 0.75 0 0 0.5 1 1.5 2 0 2.5 10 Figure 1. On-Region Characteristics. 30 40 50 Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 1.8 0.03 ID = 7.0 A ID = 14A VGS = 10V 1.6 RDS(ON), ON-RESISTANCE (OHM) RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 20 ID, DRAIN CURRENT (A) VDS, DRAIN-SOURCE VOLTAGE (V) 1.4 1.2 1 0.8 0.025 0.02 TA = 125oC 0.015 0.01 TA = 25oC 0.6 -50 -25 0 25 50 75 100 125 0.005 150 2 o TJ, JUNCTION TEMPERATURE ( C) Figure 3. On-Resistance Variation with Temperature. 10 Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 TA = -55oC VDS = 5V 25oC IS, REVERSE DRAIN CURRENT (A) 50 ID, DRAIN CURRENT (A) 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 125oC 40 30 20 10 VGS = 0V 10 TA = 125oC 1 25oC 0.1 -55oC 0.01 0.001 0.0001 0 1.5 2 2.5 3 VGS, GATE TO SOURCE VOLTAGE (V) Figure 5. Transfer Characteristics. 3.5 0 0.2 0.4 0.6 0.8 1 1.2 VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDD/ FDU6692 Rev. C(W) FDD6692/FDU6692 Typical Characteristics 3000 VDS = 10V ID = 14A 15V 20V 6 4 f = 1MHz VGS = 0 V 2500 8 CAPACITANCE (pF) VGS, GATE-SOURCE VOLTAGE (V) 10 2 CISS 2000 1500 1000 COSS 500 CRSS 0 0 0 5 10 15 20 25 30 0 35 Figure 7. Gate Charge Characteristics. 10 20 25 30 80 P(pk), PEAK TRANSIENT POWER (W) 100µs 100 1ms 10ms 100ms RDS(ON) LIMIT 10 1s 10s 1 DC VGS = 10V SINGLE PULSE RθJA = 96oC/W 0.1 TA = 25oC 0.01 0.01 SINGLE PULSE RθJA = 96°C/W TA = 25°C 60 40 20 0 0.1 1 10 0.1 100 1 10 100 1000 t1, TIME (sec) VDS, DRAIN-SOURCE VOLTAGE (V) Figure 9. Maximum Safe Operating Area. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 15 Figure 8. Capacitance Characteristics. 1000 ID, DRAIN CURRENT (A) 5 VDS, DRAIN TO SOURCE VOLTAGE (V) Qg, GATE CHARGE (nC) Figure 10. Single Pulse Maximum Power Dissipation. 1 D = 0.5 R θJA (t) = r(t) + R θJA R θJA = 96 °C/W 0.2 0.1 0.1 0.05 P(pk) 0.02 0.01 t1 0.01 t2 T J - T A = P * R θJA (t) Duty Cycle, D = t1 / t2 SINGLE PULSE 0.001 0.001 0.01 0.1 1 10 100 1000 t1 , TIME (sec) Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design. FDD/ FDU6692 Rev. C(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOSTM EnSignaTM FACT™ FACT Quiet Series™ FAST FASTr™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MICROWIRE™ OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ PowerTrench QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER SMART START™ Star* Power™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ UHC™ UltraFET VCX™ DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. 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Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. No Identification Needed Full Production This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. H1