LTC4357 Positive High Voltage Ideal Diode Controller FEATURES DESCRIPTION n The LTC®4357 is a positive high voltage ideal diode controller that drives an external N-channel MOSFET to replace a Schottky diode. When used in diode-OR and high current diode applications, the LTC4357 reduces power consumption, heat dissipation, voltage loss and PC board area. n n n n n Reduces Power Dissipation by Replacing a Power Schottky Diode with an N-Channel MOSFET 0.5μs Turn-Off Time Limits Peak Fault Current Wide Operating Voltage Range: 9V to 80V Smooth Switchover without Oscillation No Reverse DC Current Available in 6-Lead (2mm × 3mm) DFN and 8-Lead MSOP Packages APPLICATIONS n n n n n N + 1 Redundant Power Supplies High Availability Systems AdvancedTCA Systems Telecom Infrastructure Automotive Systems The LTC4357 easily ORs power sources to increase total system reliability. In diode-OR applications, the LTC4357 controls the forward voltage drop across the MOSFET to ensure smooth current transfer from one path to the other without oscillation. If the power source fails or is shorted, a fast turn-off minimizes reverse current transients. L, LT, LTC and LTM are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. TYPICAL APPLICATION 48V, 10A Diode-OR Power Dissipation vs Load Current 6 FDB3632 VINA 48V IN GATE LTC4357 OUT VOUT TO LOAD VDD GND FDB3632 VINB 48V POWER DISSIPATION (W) 5 DIODE (MBR10100) 4 3 POWER SAVED 2 1 FET (FDB3632) 0 0 IN GATE OUT 2 4 6 CURRENT (A) 8 10 4357 TA01b LTC4357 GND VDD 4357 TA01 4357fb 1 LTC4357 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) Supply Voltages IN, OUT, VDD ........................................ –0.3V to 100V Output Voltage GATE (Note 3) ........................ VIN – 0.2V to VIN + 10V Operating Ambient Temperature Range LTC4357C ................................................ 0°C to 70°C LTC4357I.............................................. –40°C to 85°C Storage Temperature Range DCB Package ..................................... –65°C to 150°C MS Package ....................................... –65°C to 150°C Lead Temperature (Soldering, 10 sec) MS Package ...................................................... 300°C PIN CONFIGURATION TOP VIEW TOP VIEW 6 VDD OUT 1 7 IN 2 IN NC NC GATE 5 NC 4 GND GATE 3 8 7 6 5 1 2 3 4 OUT VDD NC GND MS8 PACKAGE 8-LEAD PLASTIC MSOP TJMAX = 125°C, θJA = 200°C/W DCB PACKAGE 6-LEAD (2mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 90°C/W EXPOSED PAD (PIN 7) PCB GND CONNECTION OPTIONAL ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC4357CDCB#TRMPBF LTC4357IDCB#TRMPBF LTC4357CMS8#PBF LTC4357IMS8#PBF LTC4357CDCB#TRPBF LTC4357IDCB#TRPBF LTC4357CMS8#TRPBF LTC4357IMS8#TRPBF LCXF LCXF LTCXD LTCXD 6-Lead (2mm × 3mm) Plastic DFN 6-Lead (2mm × 3mm) Plastic DFN 8-Lead Plastic MSOP 8-Lead Plastic MSOP 0°C to 70°C –40°C to 85°C 0°C to 70°C –40°C to 85°C Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LTC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VOUT = VDD, VDD = 9V to 80V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN VDD Operating Supply Range l IDD Supply Current l IIN IN Pin Current VIN = VOUT ±1V l IOUT OUT Pin Current VIN = VOUT ±1V l ΔVGATE External N-Channel Gate Drive (VGATE – VIN) VDD, VOUT = 20V to 80V VDD, VOUT = 9V to 20V l TYP 9 150 10 4.5 MAX UNITS 80 V 0.5 1 mA 350 450 μA 80 170 μA 12 6 15 15 V V 4357fb 2 LTC4357 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VOUT = VDD, VDD = 9V to 80V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS IGATE(UP) External N-Channel Gate Pull Up Current VGATE = VIN, VIN – VOUT = 0.1V l –14 –20 –26 μA VGATE = VIN + 5V l IGATE(DOWN) External N-Channel Gate Pull Down Current in Fault Condition 1 2 tOFF Gate Turn-Off Time – VIN – VOUT = 55mV |––1V, VGATE – VIN < 1V l ΔVSD Source-Drain Regulation Voltage (VIN – VOUT) VGATE – VIN = 2.5V l Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. 10 A 300 500 ns 25 55 mV Note 2: All currents into pins are positive, all voltages are referenced to GND unless otherwise specified. Note 3: An internal clamp limits the GATE pin to a minimum of 10V above IN or 100V above GND. Driving this pin to voltages beyond this clamp may damage the device. 4357fb 3 LTC4357 TYPICAL PERFORMANCE CHARACTERISTICS VDD Current (IDD vs VDD) 800 IN Current (IIN vs VIN) 400 VDD = VIN = VOUT 200 200 100 0 40 20 60 0 80 VDD = VIN = VOUT 90 IOUT (μA) 400 0 VDD = VIN = VOUT 300 IIN (μA) IDD (μA) 600 OUT Current (IOUT vs VOUT) 120 60 30 0 20 VDD (V) 40 60 0 80 0 40 20 VIN (V) 60 4357 G01 4357 G02 GATE Current vs Forward Drop (IGATE(UP) vs ΔVSD) 4357 G03 FET Turn-Off Time vs GATE Capacitance GATE Voltage vs GATE Current (ΔVGATE vs IGATE) 25 500 15 $VGATE = 2.5V VIN > 18V 0 $VGATE (V) 300 VIN = 12V tOFF (ns) IGATE (μA) VGATE < VIN + 1V ΔVSD = 50mV –1V 400 10 –25 80 VOUT (V) VIN = 9V 200 5 100 –50 –50 0 50 VSD (mV) 100 0 0 150 0 5 10 15 IGATE (μA) 4357 G04 60 70 80 4357 G07 2000 VIN = 48V ΔVSD = 55mV VFINAL VIN = 48V ΔVSD = VINITIAL –1V 1500 tPD (ns) tPD (ns) 30 40 50 CGATE (nF) 20 FET Turn-Off Time vs Final Overdrive 300 1000 200 500 100 0 10 4357 G06 FET Turn-Off Time vs Initial Overdrive 400 0 25 20 0 0 0.2 0.6 0.4 VINITIAL (V) 0.8 1.0 4357 G08 –1 –0.8 –0.4 –0.6 VFINAL (V) –0.2 0 4357 G09 4357fb 4 LTC4357 PIN FUNCTIONS Exposed Pad: Exposed Pad may be left open or connected to GND. GATE: Gate Drive Output. The GATE pin pulls high, enhancing the N-channel MOSFET when the load current creates more than 25mV of voltage drop across the MOSFET. When the load current is small, the gate is actively driven to maintain 25mV across the MOSFET. If reverse current develops more than –25mV of voltage drop across the MOSFET, a fast pulldown circuit quickly connects the GATE pin to the IN pin, turning off the MOSFET. is used to control the source-drain voltage across the MOSFET. The GATE fast pulldown current is returned through the IN pin. Connect this pin as close as possible to the MOSFET source. NC: No Connection. Not internally connected. GND: Device Ground. OUT: Drain Voltage Sense. OUT is the cathode of the ideal diode and the common output when multiple LTC4357s are configured as an ideal diode-OR. It connects to the drain of the N-channel MOSFET. The voltage sensed at this pin is used to control the source-drain voltage across the MOSFET. IN: Input Voltage and GATE Fast Pull-Down Return. IN is the anode of the ideal diode and connects to the source of the N-channel MOSFET. The voltage sensed at this pin VDD: Positive Supply Input. The LTC4357 is powered from the VDD pin. Connect this pin to OUT either directly or through an RC hold-up circuit. BLOCK DIAGRAM IN OUT GATE CHARGE PUMP VDD + – 25mV FPD COMP + + – GATE AMP – + – IN 25mV GND 4357 BD 4357fb 5 LTC4357 OPERATION High availability systems often employ parallel-connected power supplies or battery feeds to achieve redundancy and enhance system reliability. ORing diodes have been a popular means of connecting these supplies at the point of load. The disadvantage of this approach is the forward voltage drop and resulting efficiency loss. This drop reduces the available supply voltage and dissipates significant power. Using an N-channel MOSFET to replace a Schottky diode reduces the power dissipation and eliminates the need for costly heat sinks or large thermal layouts in high power applications. The LTC4357 controls an external N-channel MOSFET to form an ideal diode. The voltage across the source and drain is monitored by the IN and OUT pins, and the GATE pin drives the MOSFET to control its operation. In effect the MOSFET source and drain serve as the anode and cathode of an ideal diode. At power-up, the load current initially flows through the body diode of the MOSFET. The resulting high forward voltage is detected at the IN and OUT pins, and the LTC4357 drives the GATE pin to servo the forward drop to 25mV. If the load current causes more than 25mV of voltage drop when the MOSFET gate is driven fully on, the forward voltage is equal to RDS(ON) • ILOAD. If the load current is reduced causing the forward drop to fall below 25mV, the MOSFET gate is driven lower by a weak pull-down in an attempt to maintain the drop at 25mV. If the load current reverses and the voltage across IN to OUT is more negative than –25mV the LTC4357 responds by pulling the MOSFET gate low with a strong pull-down. In the event of a power supply failure, such as if the output of a fully loaded supply is suddenly shorted to ground, reverse current temporarily flows through the MOSFET that is on. This current is sourced from any load capacitance and from the other supplies. The LTC4357 quickly responds to this condition turning off the MOSFET in about 500ns, thus minimizing the disturbance to the output bus. 4357fb 6 LTC4357 APPLICATIONS INFORMATION MOSFET Selection The LTC4357 drives an N-channel MOSFET to conduct the load current. The important features of the MOSFET are on-resistance, RDS(ON), the maximum drain-source voltage, VDSS, and the gate threshold voltage. Gate drive is compatible with 4.5V logic-level MOSFETs in low voltage applications (VDD = 9V to 20V). At higher voltages (VDD = 20V to 80V) standard 10V threshold MOSFETs may be used. An internal clamp limits the gate drive to 15V between the GATE and IN pins. An external zener clamp may be added between GATE and IN for MOSFETs with a VGS(MAX) of less than 15V. The maximum allowable drain-source voltage, BVDSS, must be higher than the power supply voltage. If an input is connected to GND, the full supply voltage will appear across the MOSFET. damage by limiting the magnitude of the peak voltage. In the absence of a surge suppressor, an output capacitance of 10μF is sufficient in most applications to prevent the transient from exceeding 100V. In lower voltage applications, the MOSFET’s drain-source breakdown voltage may be sufficient to protect the LTC4357 provided BVDSS + VIN < 100V, making a surge suppressor unnecessary. Load Sharing The application in Figure 1 combines the outputs of multiple, redundant supplies using a simple technique known as droop sharing. Load current is first taken from the highest output, with the low outputs contributing as the output voltage falls under increased loading. The 25mV regulation technique ensures smooth load sharing between outputs without oscillation. The degree of sharing is a function of RDS(ON), the output impedance of the supplies and their initial output voltages. ORing Two Supply Outputs Where LTC4357s are used to combine the outputs of two power supplies, the supply with the highest output voltage sources most or all of the load current. If this supply’s output is quickly shorted to ground while delivering load current, the flow of current temporarily reverses and flows backwards through the LTC4357’s MOSFET. When the reverse current produces a voltage drop across the MOSFET of more than –25mV, the LTC4357’s fast pull-down activates and quickly turns off the MOSFET. If the other, initially lower, supply was not delivering load current at the time of the fault, the output falls until the body diode of its ORing MOSFET conducts. Meanwhile, the LTC4357 charges its MOSFET gate with 20μA until the forward drop is reduced to 25mV. If instead this supply was delivering load current at the time of the fault, its associated ORing MOSFET was already driven at least partially on, and the LTC4357 will simply drive the MOSFET gate harder in an effort to maintain a drop of 25mV. When the capacitances at the input and output are very small, rapid changes in current can cause transients that exceed the 100V Absolute Maximum Rating of the IN, OUT, and VDD pins. A surge suppressor (TransZorb or TVS) connected from OUT to ground clamps the output and prevents FDB3632 VINA 48V 48V BUS PS1 IN GATE OUT RTNA LTC4357 VDD GND FDB3632 VINB 48V PS2 IN GATE OUT RTNA LTC4357 VDD GND FDB3632 VINC 48V PS3 RTNA IN GATE LTC4357 GND OUT VDD 4357 F01 Figure 1. Droop Sharing Redundant Supplies 4357fb 7 LTC4357 APPLICATIONS INFORMATION VDD Hold-Up Circuit In the event of an input short, parasitic inductance between the input supply of the LTC4357 and the load bypass capacitor may cause VDD to glitch below its minimum operating voltage. This causes the turn-off time (tOFF) to increase. To preserve the fast turn-off time, local output bypassing of 39μF is sufficient at voltages less than 30V. At higher voltages, 100μF is adequate. As an alternative to local bypassing, a 100Ω, 0.1μF RC hold-up circuit on the VDD pin can be used, shown in Figure 2. In applications with unusually large inductance or load current greater than 10A, use 100Ω and 1μF. Design Example The following design example demonstrates the calculations involved for selecting components in a 12V system with 10A maximum load current (see Figure 3). Si4874DY VIN 12V First, calculate the RDS(ON) of the MOSFET to achieve the desired forward drop at full load. Assuming VDROP = 0.1V, RDS(ON) VDROP I LOAD = 0.1V 10A RDS(ON) 10m The Si4874DY offers a good solution, in an S8 package with RDS(ON) = 10mΩ(max) and BVDSS of 30V. The maximum power dissipation in the MOSFET is: P = ILOAD2 • RDS(ON) = (10A)2 • 10mΩ = 1W With less than 39μF of local bypass, the recommended RC values of 100Ω and 0.1μF were used in Figure 3. Since BVDSS + VIN is much less than 100V, output clamping is unnecessary. Si4874DY VIN1 12V VOUT TO LOAD 100Ω IN GATE LTC4357 IN OUT CBYPASS 39μF VDD LTC4357 GATE LTC4357 GND VDD 0.1μF Si4874DY VIN2 12V Si4874DY IN OUT GND GND VIN 12V GATE OUT R1 100Ω 100Ω IN GATE LTC4357 VDD C1 0.1μF 4357 F02 Figure 2. Two Methods of Protecting Against Collapse of VDD From Input Short and Stray Inductance GND OUT VDD 0.1μF 4357 F03 Figure 3. 12V, 10A Diode-OR 4357fb 8 LTC4357 APPLICATIONS INFORMATION Layout Considerations Connect the IN and OUT pins as close as possible to the MOSFET’s source and drain pins. Keep the traces to the MOSFET wide and short to minimize resistive losses. See Figure 4. VIN 1 S D 8 2 S D 7 3 S MOSFET 4 G For the DFN package, pin spacing may be a concern at voltages greater than 30V. Check creepage and clearance guidelines to determine if this is an issue. To increase the pin spacing between high voltage and ground pins, leave the exposed pad connection open. Use no-clean solder to minimize PCB contamination. 1 S D 8 2 S D 7 D 6 3 S D 6 D 5 4 G D 5 VIN VOUT IN OUT 6 3 GATE 1 OUT 2 IN VOUT 4357 F04 LTC4357 7 GATE 5 4 Figure 4. Layout Considerations TYPICAL APPLICATIONS Solar Panel Charging a Battery FDB3632 100Ω 100W SOLAR PANEL IN 14V SHUNT REGULATOR VDD 0.1μF GATE LTC4357 OUT + 12V BATTERY LOAD GND 4357 TA02 4357fb 9 LTC4357 TYPICAL APPLICATIONS –12V Reverse Input Protection Si4874DY VIN2 12V CLOAD IN GATE LTC4357 VOUT 12V 10A OUT VDD GND 4357 F03 MMBD1205 –48V Reverse Input Protection FDB3672 VIN2 48V CLOAD IN GATE LTC4357 GND MMBD1205 VOUT 48V 10A OUT VDD SMAT70A 4357 F05 4357fb 10 LTC4357 PACKAGE DESCRIPTION DCB Package 6-Lead Plastic DFN (2mm × 3mm) (Reference LTC DWG # 05-08-1715 Rev A) R = 0.115 TYP R = 0.05 TYP 2.00 p0.10 (2 SIDES) 0.70 p0.05 3.55 p0.05 1.65 p0.05 (2 SIDES) 3.00 p0.10 (2 SIDES) 0.40 p 0.10 4 6 1.65 p 0.10 (2 SIDES) 2.15 p0.05 PIN 1 NOTCH R0.20 OR 0.25 s 45o CHAMFER PIN 1 BAR TOP MARK (SEE NOTE 6) PACKAGE OUTLINE 3 0.25 p 0.05 0.50 BSC 1.35 p0.05 (2 SIDES) 0.25 p 0.05 0.50 BSC 0.75 p0.05 0.200 REF (DCB6) DFN 0405 1 1.35 p0.10 (2 SIDES) 0.00 – 0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS BOTTOM VIEW—EXPOSED PAD NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (TBD) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE MS8 Package 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660 Rev F) 3.00 p 0.102 (.118 p .004) (NOTE 3) 0.889 p 0.127 (.035 p .005) 0.254 (.010) 8 7 6 5 3.00 p 0.102 (.118 p .004) (NOTE 4) 4.90 p 0.152 (.193 p .006) DETAIL “A” 0.52 (.0205) REF 0o – 6o TYP GAUGE PLANE 5.23 (.206) MIN 1 3.20 – 3.45 (.126 – .136) 0.53 p 0.152 (.021 p .006) DETAIL “A” 0.42 p 0.038 (.0165 p .0015) TYP 0.65 (.0256) BSC 1.10 (.043) MAX 2 3 4 0.86 (.034) REF 0.18 (.007) RECOMMENDED SOLDER PAD LAYOUT NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX SEATING PLANE 0.22 – 0.38 (.009 – .015) TYP 0.65 (.0256) BSC 0.1016 p 0.0508 (.004 p .002) MSOP (MS8) 0307 REV F 4357fb Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 11 LTC4357 TYPICAL APPLICATION Plug-In Card Input Diode for Supply Hold-Up BACKPLANE CONNECTORS PLUG-IN CARD CONNECTOR 1 FDB3632 48V GATE IN Hot Swap CONTROLLER VOUT1 OUT LTC4357 + VDD CHOLDUP GND GND FDB3632 GATE IN Hot Swap CONTROLLER VOUT2 OUT LTC4357 VDD + CHOLDUP GND GND 4357 TA05 GND PLUG-IN CARD CONNECTOR 2 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT1640AH/LT1640AL Negative High Voltage Hot Swap™ Controllers in SO-8 Negative High Voltage Supplies From –10V to –80V LT1641-1/LT1641-2 Positive High Voltage Hot Swap Controllers Active Current Limiting, Supplies From 9V to 80V LTC1921 Dual –48V Supply and Fuse Monitor UV/OV Monitor, –10V to –80V Operation, MSOP Package LT4250 –48V Hot Swap Controller Active Current Limiting, Supplies From –20V to –80V LTC4251/LTC4251-1/ LTC4251-2 –48V Hot Swap Controllers in SOT-23 Fast Active Current Limiting, Supplies From –15V LTC4252-1/LTC4252-2/ LTC4252-1A/LTC4252-2A –48V Hot Swap Controllers in MS8/MS10 Fast Active Current Limiting, Supplies From –15V, Drain Accelerated Response LTC4253 –48V Hot Swap Controller with Sequencer Fast Active Current Limiting, Supplies From –15V, Drain Accelerated Response, Sequenced Power Good Outputs LT4256 Positive 48V Hot Swap Controller with Open-Circuit Detect Foldback Current Limiting, Open-Circuit and Overcurrent Fault Output, Up to 80V Supply LTC4260 Positive High Voltage Hot Swap Controller With I2C and ADC, Supplies from 8.5V to 80V LTC4261 Negative High Voltage Hot Swap Controller With I2C and 10-Bit ADC, Adjustable Inrush and Overcurrent Limits LTC4350 Hot Swappable Load Share Controller Output Voltage: 1.2V to 20V, Equal Load Sharing LT4351 MOSFET Diode-OR Controller External N-Channel MOSFETs Replace ORing Diodes, 1.2V to 20V LTC4354 Negative Voltage Diode-OR Controller and Monitor Controls Two N-Channel MOSFETs, 1μs Turn-Off, 80V Operation LTC4355 Positive Voltage Diode-OR Controller and Monitor Controls Two N-Channel MOSFETs, 0.5μs Turn-Off, 80V Operation Hot Swap is a trademark of Linear Technology Corporation. 4357fb 12 Linear Technology Corporation LT 0108 REV B • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2007