ONSEMI NTMFS4744N

NTMFS4744N
Power MOSFET
30 V, 53 A, Single N-Channel, SO-8 FL
Features
•Low RDS(on) to Minimize Conduction Losses
•Low Capacitance to Minimize Driver Losses
•Optimized Gate Charge to Minimize Switching Losses
•These are Pb-Free Devices
http://onsemi.com
V(BR)DSS
RDS(on) MAX
Applications
•CPU Power Delivery
•DC-DC Converters
•Low Side Switching
10 mW @ 10 V
30 V
Parameter
Drain-to-Source Voltage
Gate-to-Source Voltage
N-Channel
D
Symbol
Value
Unit
VDSS
VGS
30
20
11
V
V
Continuous Drain
Current RqJA
(Note 1)
TA = 25°C
Power Dissipation
RqJA (Note 1)
TA = 25°C
PD
2.2
W
Continuous Drain
Current RqJA
(Note 2)
TA = 25°C
ID
7.0
A
Power Dissipation
RqJA (Note 2)
ID
TA = 85°C
8.0
TA = 85°C
TA = 25°C
G
A
S
MARKING
DIAGRAM
5.0
PD
0.88
D
W
1
Continuous Drain
Current RqJC
(Note 1)
TC = 25°C
Power Dissipation
RqJC (Note 1)
TC = 25°C
PD
47.2
W
TA = 25°C
IDM
106
A
Operating Junction and Storage Temperature
TJ, TSTG
-55 to
+150
°C
Source Current (Body Diode)
Drain to Source dV/dt
Single Pulse Drain-to-Source Avalanche
Energy (VDD = 50 V, VGS = 10 V,
IL = 24 Apk, L = 1.0 mH, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
IS
dV/dt
EAS
46
6.0
286
A
V/ns
mJ
Pulsed Drain
Current
ID
TC = 85°C
tp=10ms
53 A
14 mW @ 4.5 V
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Steady
State
ID MAX
53
A
38
SO-8 FLAT LEAD
CASE 488AA
STYLE 1
S
S
S
G
D
4744N
AYWWG
G
D
D
4744N = Specific Device Code
A
= Assembly Location
Y
= Year
WW
= Work Week
G
= Pb-Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
TL
°C
260
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
Device
Package
Shipping†
NTMFS4744NT1G
SO-8 FL 1500 Tape & Reel
(Pb-Free)
NTMFS4744NT3G
SO-8 FL 5000 Tape & Reel
(Pb-Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2007
July, 2007 - Rev. 4
1
Publication Order Number:
NTMFS4744N/D
NTMFS4744N
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction-to-Case (Drain)
Parameter
RqJC
2.65
Junction-to-Ambient – Steady State (Note 1)
RqJA
56.9
Junction-to-Ambient – Steady State (Note 2)
RqJA
142.4
Unit
°C/W
1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu.
2. Surface-mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain-to-Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain-to-Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate-to-Source Leakage Current
IDSS
V
10
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25 °C
1.0
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = 20 V
VGS(TH)
VGS = VDS, ID = 250 mA
mA
100
nA
2.5
V
ON CHARACTERISTICS (Note 3)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain-to-Source On Resistance
VGS(TH)/TJ
RDS(on)
5.0
VGS = 10 V to
11.5 V
VGS = 4.5 V
Forward Transconductance
1.5
gFS
ID = 30 A
7.6
ID = 15 A
7.3
ID = 10 A
7.3
ID = 30 A
10.4
ID = 15 A
10.1
ID = 10 A
9.9
VDS = 15 V, ID = 15 A
mV/°C
10
mW
14
25
S
CHARGES, CAPACITANCES & GATE RESISTANCE
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
132
Total Gate Charge
QG(TOT)
10
Threshold Gate Charge
QG(TH)
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge
1300
QGS
VGS = 0 V, f = 1 MHz, VDS = 12 V
550
pF
17
0.9
VGS = 4.5 V, VDS = 15 V; ID = 30 A
QGD
nC
1.8
5.9
QG(TOT)
VGS = 11.5 V, VDS = 15 V;
ID = 30 A
25
td(ON)
12
tr
VGS = 4.5 V, VDS = 15 V, ID = 30 A,
RG = 3.0 W
203
37
nC
SWITCHING CHARACTERISTICS (Note 4)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
td(OFF)
tf
14
83
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
http://onsemi.com
2
ns
NTMFS4744N
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
SWITCHING CHARACTERISTICS (Note 4)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
td(ON)
7.0
tr
td(OFF)
VGS = 11.5 V, VDS = 15 V,
ID = 30 A, RG = 3.0 W
tf
94
ns
23
4.7
DRAIN-SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
TJ = 25°C
0.78
TJ = 125°C
0.7
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 30 A
37
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
1.2
V
60
21
ns
17
QRR
37
nC
Source Inductance
LS
0.65
nH
Drain Inductance
LD
PACKAGE PARASITIC VALUES
Gate Inductance
LG
Gate Resistance
RG
0.005
TA = 25°C
1.84
2.0
3. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
4. Switching characteristics are independent of operating junction temperatures.
http://onsemi.com
3
5.0
W
NTMFS4744N
TYPICAL PERFORMANCE CURVES
32
TJ = 25°C
10 V
4.5 V
3.5 V
24
3V
16
2.8 V
8
2.6 V
0
1
3
2
16
TJ = 125°C
8
TJ = 25°C
0
4
5
0
2
1
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W)
Figure 2. Transfer Characteristics
0.06
0.04
0.02
3
3.4
3.8
4.2
4.6
5
6
5
Figure 1. On-Region Characteristics
0.08
0.020
VGS = 10 V
0.016
0.012
TJ = 125°C
0.008
TJ = 25°C
0.004
TJ = -55°C
0
0
15
10
5
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
20
25
30
ID, DRAIN CURRENT (AMPS)
Figure 3. On-Resistance vs. Gate-to-Source
Voltage
Figure 4. On-Resistance vs. Drain Current and
Temperature
1000
1.8
ID = 9 A
VGS = 10 V
TJ = 125°C
IDSS, LEAKAGE (nA)
RDS(on), DRAIN-TO-SOURCE RESISTANCE
(NORMALIZED)
4
VGS, GATE-TO-SOURCE VOLTAGE (VOLTS)
ID = 30 A
1.6
3
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
0.1
0
2.6
24
TJ = -55°C
2.4 V
0
RDS(on), DRAIN-TO-SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (AMPS)
ID, DRAIN CURRENT (AMPS)
32
1.4
1.2
1.0
100
TJ = 85°C
10
TJ = 25°C
1
0.8
0.6
-50
0.1
-25
0
25
50
75
100
125
150
0
6
12
18
24
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 5. On-Resistance Variation with
Temperature
Figure 6. Drain-to-Source Leakage Current
vs. Drain Voltage
http://onsemi.com
4
30
NTMFS4744N
TYPICAL PERFORMANCE CURVES
VGS , GATE-TO-SOURCE VOLTAGE (VOLTS)
2000
C, CAPACITANCE (pF)
TJ = 25°C
VGS = 0 V
1600
Ciss
1200
Coss
800
400
Crss
0
0
4
8
12
16
20
5
4
QGS
2
1
ID = 30 A
TJ = 25°C
0
0
4
8
QG, TOTAL GATE CHARGE (nC)
12
Figure 8. Gate-To-Source and Drain-To-Source
Voltage vs. Total Charge
Figure 7. Capacitance Variation
10
IS, SOURCE CURRENT (AMPS)
1000
tr
100
tf
td(off)
td(on)
10
VDS = 15 V
ID = 30 A
VGS = 4.5 V
1
1
10
RG, GATE RESISTANCE (OHMS)
VGS = 0 V
TJ = 150°C
0.1
0.2
100
10 ms
100 ms
1 ms
10 ms
0.1
RDS(on) LIMIT
Thermal Limit
Package Limit
dc
0.01
0.1
1
10
VDS, DRAIN-TO-SOURCE VOLTAGE (V)
100
EAS, SINGLE PULSE DRAIN-TO-SOURCE
AVALANCHE ENERGY (mJ)
VGS = 2.0 V
SINGLE PULSE
100 TC = 25°C
1
0.4
0.6
VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS)
0.8
Figure 10. Diode Forward Voltage vs. Current
1000
10
TJ = 25°C
1
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
ID, DRAIN CURRENT (A)
QGD
3
GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS)
t, TIME (ns)
QT
300
ID = 24 A
200
100
0
25
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
50
75
100
125
150
TJ, JUNCTION TEMPERATURE (°C)
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
http://onsemi.com
5
175
NTMFS4744N
TYPICAL PERFORMANCE CURVES
I D, DRAIN CURRENT (AMPS)
100
25°C
100°C
125°C
10
1
1
100
10
PULSE WIDTH (ms)
Figure 13. Avalanche Characteristics
http://onsemi.com
6
1000
NTMFS4744N
PACKAGE DIMENSIONS
DFN6 5x6, 1.27P (SO8 FL)
CASE 488AA-01
ISSUE C
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
A
2
B
D1
6
2X
0.20 C
5
4X
E1
q
E
2
c
1
2
3
A1
4
TOP VIEW
0.10 C
3X
C
e
SEATING
PLANE
DETAIL A
A
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
--0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.15 BSC
4.50
4.90
5.10
3.50
--4.22
6.15 BSC
5.50
5.80
6.10
3.45
--4.30
1.27 BSC
0.51
0.61
0.71
0.51
----0.51
0.61
0.71
0.05
0.17
0.20
3.00
3.40
3.80
0_
--12 _
0.10 C
SOLDERING FOOTPRINT*
SIDE VIEW
8X
DETAIL A
b
0.10
C A B
0.05
c
3X
4X
1.270
0.750
4X
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
e/2
L
1
4
K
1.000
0.965
1.330
2X
0.905
2X
0.495
E2
L1
6
G
M
4.530
3.200
0.475
5
D2
2X
1.530
BOTTOM VIEW
4.560
*For additional information on our Pb-Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P
.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada
Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada
Email: [email protected]
N. American Technical Support: 800-282-9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81-3-5773-3850
http://onsemi.com
7
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NTMFS4744N/D