ONSEMI NTTFS4985NFTAG

NTTFS4985NF
Power MOSFET
30 V, 64 A, Single N−Channel, WDFN8
Features
•
•
•
•
•
Integrated Schottky Diode
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
These Devices are Pb−Free and are RoHS Compliant
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V(BR)DSS
ID MAX
3.5 mW @ 10 V
30 V
Applications
•
•
•
•
RDS(on) MAX
64 A
5.2 mW @ 4.5 V
CPU Power Delivery
Synchronous Rectification for DC−DC Converters
Low Side Switching
Telecom Secondary Side Rectification
N−Channel MOSFET
D
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Parameter
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
VGS
±20
V
ID
22
A
Continuous Drain
Current RqJA (Note 1)
TA = 25°C
Power Dissipation RqJA
(Note 1)
TA = 25°C
PD
2.69
W
Continuous Drain
Current RqJA ≤ 10 s
(Note 1)
TA = 25°C
ID
32.4
A
Power Dissipation
RqJA ≤ 10 s (Note 1)
Continuous Drain
Current RqJA (Note 2)
TA = 85°C
23.4
TA = 25°C
PD
5.85
W
TA = 25°C
ID
16.3
A
TA = 85°C
TA = 25°C
PD
1.47
W
Continuous Drain
Current RqJC (Note 1)
TC = 25°C
ID
64
A
Power Dissipation
RqJC (Note 1)
TC = 25°C
TC = 85°C
TA = 25°C, tp = 10 ms
Operating Junction and Storage Temperature
Source Current (Body Diode)
1
S
S
S
G
1
WDFN8
(m8FL)
CASE 511AB
4985
A
Y
WW
G
4985
AYWWG
G
D
D
D
D
= Specific Device Code
= Assembly Location
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
46
PD
22.73
W
IDM
192
A
TJ,
Tstg
−55 to
+150
°C
IS
32
A
Drain to Source dV/dt
dV/dt
6.0
V/ns
Single Pulse Drain−to−Source Avalanche Energy
(TJ = 25°C, VDD = 50 V, VGS = 10 V,
IL = 32 Apk, L = 0.1 mH, RG = 25 W)
EAS
52
mJ
TL
260
°C
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
MARKING DIAGRAM
11.7
Power Dissipation
RqJA (Note 2)
Pulsed Drain Current
S
15.9
TA = 85°C
Steady
State
G
ORDERING INFORMATION
Package
Shipping†
NTTFS4985NFTAG
WDFN8
(Pb−Free)
1500 / Tape &
Reel
NTTFS4985NFTWG
WDFN8
(Pb−Free)
5000 / Tape &
Reel
Device
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 2 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size of 90 mm2.
© Semiconductor Components Industries, LLC, 2012
January, 2012 − Rev. 1
1
Publication Order Number:
NTTFS4985NF/D
NTTFS4985NF
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Unit
Junction−to−Case (Drain)
Parameter
RqJC
5.5
°C/W
Junction−to−Ambient – Steady State (Note 3)
RqJA
46.4
Junction−to−Ambient – Steady State (Note 4)
RqJA
84.8
Junction−to−Ambient – (t ≤ 10 s) (Note 3)
RqJA
21.4
3. Surface−mounted on FR4 board using 1 sq−in pad, 2 oz Cu.
4. Surface−mounted on FR4 board using the minimum recommended pad size of 90 mm2.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/TJ
Typ
Max
Unit
OFF CHARACTERISTICS
V
15
Zero Gate Voltage Drain Current
IDSS
VGS = 0 V,
VDS = 24 V
Gate−to−Source Leakage Current
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
TJ = 25°C
mV/°C
500
mA
±100
nA
2.3
V
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Negative Threshold Temperature
Coefficient
VGS(TH)/TJ
Drain−to−Source On Resistance
RDS(on)
gFS
1.6
5.2
VGS = 10 V
VGS = 4.5 V
Forward Transconductance
1.2
ID = 20 A
2.8
ID = 10 A
2.8
ID = 20 A
4.16
ID = 10 A
4.13
VDS = 1.5 V, ID = 10 A
mV/°C
3.5
mW
5.2
34
S
2075
pF
CHARGES AND CAPACITANCES
Input Capacitance
Ciss
Output Capacitance
Coss
Reverse Transfer Capacitance
Crss
46
Total Gate Charge
QG(TOT)
13.6
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
QG(TOT)
VGS = 0 V, f = 1.0 MHz, VDS = 15 V
VGS = 4.5 V, VDS = 15 V, ID = 20 A
876
nC
2.0
5.8
4.1
VGS = 10 V, VDS = 15 V, ID = 20 A
29.4
nC
td(on)
11
ns
tr
VGS = 4.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
24
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(off)
20
tf
5.4
td(on)
8.5
tr
td(off)
VGS = 10 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
24
25
4.0
5. Pulse Test: pulse width = 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
ns
NTTFS4985NF
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
TJ = 25°C
0.4
0.7
V
TJ = 125°C
0.33
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
Charge Time
Discharge Time
Reverse Recovery Charge
VSD
VGS = 0 V,
IS = 2 A
tRR
ta
tb
35.7
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 2 A
ns
18.2
17.5
QRR
32
nC
Source Inductance
LS
0.65
nH
Drain Inductance
LD
Gate Inductance
LG
Gate Resistance
RG
PACKAGE PARASITIC VALUES
TA = 25°C
0.20
1.5
1.0
5. Pulse Test: pulse width = 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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3
W
NTTFS4985NF
TYPICAL PERFORMANCE CURVES
4.2 V
120
105
3.4 V
4.4 V to 4.5 V
90
75
3.2 V
7.5 V to 10 V
3.0 V
60
45
2.8 V
30
2.6 V
2.4 V
15
0
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
0
1
2
3
4
70
60
TJ = 125°C
50
40
TJ = 25°C
30
TJ = −55°C
20
0
1
1.5
2
2.5
3
3.5
VGS, GATE−TO−SOURCE VOLTAGE (V)
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
ID = 30 A
TJ = 25°C
0.020
0.015
0.010
0.005
3.0
4.0
5.0
6.0
7.0
8.0
9.0
5.50E−03
5.25E−03
5.00E−03
4.75E−03
4.50E−03
4.25E−03
4.00E−03
3.75E−03
3.50E−03
3.25E−03
3.00E−03
2.75E−03
2.50E−03
2.25E−03
10
4
TJ = 25°C
VGS = 4.5 V
VGS = 10 V
5
20
35
50
65
80
95
110 125 140 155
VGS, GATE−TO−SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (A)
Figure 3. On−Resistance vs. Gate−to−Source
Voltage
Figure 4. On−Resistance vs. Drain Current and
Gate Voltage
1.7
1.6
1.5
1.00E−01
VGS = 0 V
ID = 20 A
VGS = 10 V
1.4
IDSS, LEAKAGE (A)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (NORMALIZED)
80
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
0.025
2.0
VDS = 5 V
90
10
5
0.030
0
100
3.6 V
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (A)
135
110
VGS = 3.8 V
4.0 V
ID, DRAIN CURRENT (A)
150
1.3
1.2
1.1
1
0.9
0.8
TJ = 150°C
1.00E−02
TJ = 125°C
1.00E−03
1.00E−04
TJ = 25°C
0.7
0.6
−50
−25
0
25
50
75
100
125
150
1.00E−05
0
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
vs. Voltage
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4
NTTFS4985NF
2800
2600
2400
2200
2000
1800
1600
1400
1200
1000
800
600
400
200
0
VGS, GATE−TO−SOURCE VOLTAGE
(V)
C, CAPACITANCE (pF)
TYPICAL PERFORMANCE CURVES
VGS = 0 V
TJ = 25°C
Ciss
Coss
Crss
0
5
10
15
20
25
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
30
QT
10
8
6
Qgs
4
ID = 30 A
TJ = 25°C
VDD = 15 V
VGS = 10 V
2
0
0
Figure 7. Capacitance Variation
1000
IS, SOURCE CURRENT (A)
t, TIME (ns)
100
tf
tr
10
td(on)
4
6 8 10 12 14 16 18 20 22 24 26 28 30
QG, TOTAL GATE CHARGE (nC)
VGS = 0 V
TJ = 25°C
9
td(off)
2
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
10
VDD = 15 V
ID = 10 A
VGS = 10 V
Qgd
8
7
6
5
4
3
2
1
1
1
100
100
0.2
0.3
0.4
0.5
0.6
0.7
Figure 9. Resistive Switching Time
Variation vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
VGS = 20 V
Single Pulse
TC = 25°C
10 ms
100 ms
1 ms
10 ms
1
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.1
0.1
0.1
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
10
0.01
0
0.0
RG, GATE RESISTANCE (W)
1
dc
10
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
ID, DRAIN CURRENT (A)
1000
10
100
55
50
ID = 32 A
45
40
35
30
25
20
15
10
5
0
25
50
75
100
125
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy vs.
Starting Junction Temperature
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5
150
NTTFS4985NF
TYPICAL PERFORMANCE CURVES
100
r(t)
(°C/W)
10
1
D = 0.5
0.2
0.1
0.05
0.02
0.01
0.1
SINGLE PULSE
0.01
0.000001
0.00001
0.0001
0.001
0.01
0.1
PULSE TIME (s)
Figure 13. Thermal Response
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6
1
10
100
1000
NTTFS4985NF
PACKAGE DIMENSIONS
WDFN8 3.3x3.3, 0.65P
CASE 511AB
ISSUE C
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION D1 AND E1 DO NOT INCLUDE MOLD FLASH
PROTRUSIONS OR GATE BURRS.
0.20 C
D
A
D1
B
2X
0.20 C
8 7 6 5
4X
E1 E
q
c
1 2 3 4
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
E3
e
G
K
L
L1
M
q
A1
TOP VIEW
0.10 C
A
e
SIDE VIEW
0.10
8X b
C A B
0.05
C
4X
L
C
6X
0.10 C
DETAIL A
SEATING
PLANE
DETAIL A
1
8X
0.42
4
MAX
0.031
0.002
0.016
0.010
0.124
0.088
0.124
0.068
0.016
0.020
−−−
0.022
0.008
0.063
12 _
0.65
PITCH
PACKAGE
OUTLINE
4X
0.66
M
E3
8
G
INCHES
NOM
0.030
−−−
0.012
0.008
0.130 BSC
0.116
0.120
0.078
0.083
0.130 BSC
0.116
0.120
0.058
0.063
0.009
0.012
0.026 BSC
0.012
0.016
0.025
−−−
0.012
0.017
0.002
0.005
0.055
0.059
0_
−−−
MIN
0.028
0.000
0.009
0.006
SOLDERING FOOTPRINT*
e/2
K
E2
MILLIMETERS
MIN
NOM
MAX
0.70
0.75
0.80
0.00
−−−
0.05
0.23
0.30
0.40
0.15
0.20
0.25
3.30 BSC
2.95
3.05
3.15
1.98
2.11
2.24
3.30 BSC
2.95
3.05
3.15
1.47
1.60
1.73
0.23
0.30
0.40
0.65 BSC
0.30
0.41
0.51
0.64
−−−
−−−
0.30
0.43
0.56
0.06
0.13
0.20
1.40
1.50
1.60
0_
−−−
12 _
5
D2
BOTTOM VIEW
L1
3.60
0.75
2.30
0.57
0.47
2.37
3.46
DIMENSION: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
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NTTFS4985NF/D