VISHAY DG447_11

DG447, DG448
Vishay Siliconix
Low Power, High Voltage SPST Analog Switches
DESCRIPTION
FEATURES
The DG447, DG448 are dual supply single-pole/single-throw
(SPST) switches. On resistance is 25 W maximum and
flatness is 2.2 W max over the specified analog signal range.
These analog switches were designed to provide high
speed, low error switching of precision analog signals. The
primary application areas are in the routing and switching in
telecommunications and test equipment. Combining low
power, low leakages, low on-resistance and small physical
size, the DG477, DG448 are also ideally suited for portable
and battery powered industrial and military equipment.
The DG477 has one normally closed switch, while the
DG448 switch is normally open. They operate either from a
single + 7 V to 36 V supply or from dual ± 4.5 V to ± 20 V
supplies. They are offered in the very popular, small TSOP6
package.
•
•
•
•
•
•
•
•
± 15 V analog signal range
On-resistance - RDS(on): 25 max.
Fast switching action - tON: 100 ns
VL logic supply not required
TTL CMOS input compatible
Rail to rail signal handling
Dual or single supply operation
Compliant to RoHS Directive 2002/95/EC
BENEFITS
• Wide dynamic range
• Low signal errors and distortion
• Break-before-make switching action
• Simple interfacing
• Reduced board space
• Improved reliability
APPLICATIONS
• Precision test equipment
• Precision instrumentation
• Communications systems
• PBX, PABX systems
• Audio equipment
• Redundant systems
• PC multimedia boards
• Hard disc drives
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG447
TRUTH TABLE
NC
1
6
COM
V-
2
5
V+
IN
3
4
GND
Logic
0
1
DG447
ON
OFF
DG448
OFF
ON
Logic "0" 0.8 V
Logic "1" 2.4 V
Device Marking:
DG447DV = G5xxx
DG448DV = G6xxx
TSOP6
DG448
NO
1
6
COM
V-
2
5
V+
IN
3
4
GND
TSOP6
Document Number: 73854
S11-1336-Rev. D, 04-Jul-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG447, DG448
Vishay Siliconix
ORDERING INFORMATION
Temp. Range
DG447, DG448
Package
- 40 °C to 85 °C
Part Number
DG447DV-T1-E3
DG448DV-T1-E3
6-pin TSOP
ABSOLUTE MAXIMUM RATINGS (TA = 25 °C, unless otherwise noted)
Parameter Referenced to V-
Limit
V+
Unit
44
25
(V-) - 2 V to (V+) + 2 V
or 30 mA, whichever occurs first
30
GND
Digital Inputsa, Vno/nc, VCOM
Current , (Any Terminal) Continuous
Current (NO or NC or COM) Pulsed at 1 ms, 10 % Duty Cycle
Storage Temperature
Power Dissipation (Package)b
6-pin TSOPc
V
mA
100
- 65 to 150
570
°C
mW
Notes:
a. Signals on NO, NC, COM, or IN exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC board.
c. Derate 7 mW/°C above 70 °C.
SPECIFICATIONSa
Test Conditions
Unless Otherwise Specified
V+ = 15 V, V- = - 15 V
Parameter
Analog Switch
Analog Signal Rangee
Drain-Source
On-Resistance
On-Resistance Flatness
Symbol
VANALOG
RON
RON
Flatness
Ino/nc(off)
Switch Off Leakage Current
ICOM(off)
Channel On Leakage Current
VIN = 2.4 V, 0.8 Vf
ICOM(on)
Ino/nc = 10 mA, VCOM = 10 V
V+ = 13.5 V, V- = - 13.5 V
Ino/nc = 10 mA, VCOM = ± 5 V, 0 V
V+ = 13.5 V, V- = - 13.5 V
V+ = 16.5, V- = - 16.5 V
VCOM = ± 15.5 V
Vno/nc = -/+ 15.5 V
V+ = 16.5 V, V- = - 16.5
VCOM = Vno/nc = ± 15.5 V
D Suffix
- 40 °C to 85 °C
Temp.b
Min.d
Full
Room
Full
Room
Full
Room
Full
Room
Full
Room
Full
- 15
Full
Full
Room
2.4
Typ.c
17
0.8
-1
- 10
-1
- 10
-1
- 10
- 0.1
- 0.1
- 0.1
Max.d
Unit
15
25
30
2.2
3
1
10
1
10
1
10
V

nA
Digital Control
Input, High Voltage
Input, Low Voltage
Input Capacitancee
Input Current
IINH
IINL
CIN
IIN
VIN = 0 or 5 V
0.8
5
-1
1
V
pF
µA
Dynamic Characteristics
Turn-On Time
tON
Turn-Off Time
tOFF
Charge Injectione
Off-Isolatione
Source Off Capacitancee
Drain Off Capacitancee
Channel On Capacitancee
Q
OIRR
CS(off)
CD(off)
CD(on)
RL = 300 , CL = 35 pF
Vno/nc = ± 10 V
CL = 10 nF, Vgen = 0 V, Rgen = 0 
CL= 5 pF, RL = 50 , f = 1 MHz
f = 1 MHz
f = 1 MHz
Room
Full
Room
Full
Room
Room
Room
Room
Room
100
50
130
140
95
110
10
- 72
19
8
30
ns
pC
dB
pF
Power Supplies
Positive Supply Current
I+
Negative Supply Current
I-
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V+ = 16.5 V, V- = - 16.5 V
VIN = 0 or 5 V
Room
Full
Room
Full
16
-1
- 10
- 0.02
30
50
µA
Document Number: 73854
S11-1336-Rev. D, 04-Jul-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG447, DG448
Vishay Siliconix
SPECIFICATIONSa
Test Conditions
Unless Otherwise Specified
V+ = 12 V, V- = 0 V
Parameter
Symbol
VIN = 2.4 V, 0.8 Vf
D Suffix
- 40 °C to 85 °C
Temp.b
Min.d
Full
0
Typ.c
Max.d
Unit
12
V
Analog Switch
Analog Signal Rangee
Drain-Source On-Resistance
On-Resistance Flatness
VANALOG
RON
Ino/nc = - 10 mA, VCOM = 8 V
V+ = 10.8 V
Room
Full
32
45
60

RON
Flatness
Ino/nc = 10 mA, VCOM = 2, 6, 8 V
V+ = 10.8 V
Room
Full
2
6
8

140
VNO, NC = ± 10 V, RL = 300 , CL = 35 pF
Room
Full
Room
Full
175
225
120
150
nS
Q
CL = 10 nF, Vgen = 0 V, Rgen = 0 
Room
12
I+
V+ = 13.2 V, VIN = 0 V, 5 V
Room
Full
22
Dynamic Characteristics
Turn-On Time
tON
Turn-Off Time
tOFF
Charge Injectione
50
pC
Power Supplies
Positive Supply Current
50
75
µA
Notes:
a. Refer to PROCESS OPTION FLOWCHART.
b. Room = 25 °C, full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Document Number: 73854
S11-1336-Rev. D, 04-Jul-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG447, DG448
Vishay Siliconix
TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
45
30
40
INO/NC = 10 mA
V+ = 9 V
25
RON - On-Resistance (Ω)
RON - On-Resistance (Ω)
35
30
V+ = 12 V
25
V+ = 24 V
20
15
V+ = 36 V
10
V = ± 15 V
20
15
+ 25 °C
10
- 40 °C
5
5
0
0
0
6
12
18
24
VCOM - Analog Voltage (V)
30
- 15
36
RON vs. VCOM and Single Supply Voltage
10
15
50
V=±8V
INO/NC = 10 mA
V = ± 12 V
45
25
40
V = ± 10 V
V = ± 15 V
20
RON - On-Resistance (Ω)
RON - On-Resistance (Ω)
-5
0
5
VCOM - Analog Voltage (V)
RON vs. Analog Voltage and Temperature
30
V = ± 12
15 V
15
10
5
- 10
V = ± 20
15 V
30
+ 25 °C
25
20
- 40 °C
15
10
T = 25 °C
IS = 10 mA
NC Switch
0
- 20
+ 85 °C
35
5
0
- 15
- 10
-5
0
5
10
15
20
0
2
4
6
8
10
12
VCOM - Analog Voltage (V)
VCOM - Analog Voltage (V)
RON vs. VCOM and Dual Supply Voltage
RON vs. Analog Voltage and Temperature
600
10 000
V = ± 16.5 V
V = ± 16.5 V
200
I COM(ON)
I COM(OFF)
0
I NO/NC(OFF)
- 200
Leakage Current (pA)
Leakage Current (pA)
400
1000
I COM(ON)
I NO/NC(OFF)
100
10
I COM(OFF)
- 400
- 600
- 16.5 - 13.5 - 10.5 - 7.5 - 4.5 - 1.5 1.5
4.5
7.5
10.5 13.5 16.5
VCOM, VNO , VNC - Analog Voltage (V)
Leakage vs. Analog Voltage
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1
- 40
- 20
0
20
40
Temperature (°C)
60
80
Leakage Current vs. Temperature
Document Number: 73854
S11-1336-Rev. D, 04-Jul-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG447, DG448
Vishay Siliconix
TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
1 mA
10 µA
1 µA
V = ± 15 V
I+, I GND
100 nA
100 µA
Isupply
I supply
10 nA
1 nA
V=±8V
V = ± 20 V
10 µA
I100 pA
10 pA
- 15
10
35
Temperature (°C)
60
0
85
V = ± 15 V
V = ± 12 V
1 µA
1 pA
- 40
5
10
15
20
Vin (V)
Supply Current vs. Temperature
Supply Current vs. VIN
350
160
300
140
V + = 12 V
t ON , t OFF (ns)
t ON , t OFF (ns)
t ON
120
250
200
t ON
150
100
100
80
60
t OFF
40
t OFF
50
20
0
- 40
0
±4
± 12
±8
± 20
± 16
- 15
10
35
Temperature (°C)
Supply Voltage (V)
Switching Time vs. Supply Voltages
0
Loss
t ON
V = ± 15 V
- 10
- 20
Loss, OIRR (dB)
t ON , t OFF (ns)
100
80
60
t OFF
40
- 30
- 40
OIRR
- 50
- 60
20
0
- 40
85
Switching Time vs. Temperature
140
120
60
- 70
- 15
10
35
60
85
- 80
100K
1M
10M
100M
1G
Temperature (°C)
Frequency (Hz)
Switching Time vs. Temperature
Off Isolation and Insertion Loss vs. Frequency
Document Number: 73854
S11-1336-Rev. D, 04-Jul-11
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This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG447, DG448
Vishay Siliconix
TYPICAL CHARACTERISTICS (TA = 25 °C, unless otherwise noted)
150
160
CL = 10 nF
140
V+ = + 15 V
V- = - 15 V
V+ = + 12 V
V- = 0 V
50
Qinj - Charge Injection (pC)
120
Qinj - Charge Injection (pC)
CL = 10 nF
100
100
V+ = + 12 V
V- = - 12 V
80
60
40
20
V+ = + 12 V
V- = 0 V
0
0
- 50
- 100
- 200
- 250
- 20
- 300
- 40
- 350
- 60
- 400
- 15
- 10
-5
0
5
10
V+ = + 12 V
V- = - 12 V
- 150
V+ = + 15 V
V- = - 15 V
- 15
15
- 10
Analog Voltage (V)
Charge Injection vs. Analog Voltage
(Measured at COM pin)
-5
0
5
Analog Voltage (V)
10
15
Charge Injection vs. Analog Voltage
(Measured at NC or NO pin)
2.5
2.3
2.1
Vth (V)
1.9
1.7
1.5
1.3
1.1
0.9
0.7
0.5
5
15
10
25
20
30
V+ (V)
Input Switching Threshold vs. Supply Voltage
TEST CIRCUITS
VO is the steady state output with the switch on.
+ 15 V
tr < 20 ns
tf < 20 ns
3V
Logic
Input
50 %
V+
10 V
NO/NC
0V
COM
VO
IN
GND
RL
300 Ω
V-
- 15 V
CL (includes fixture and stray capacitance)
VO = V S
CL
35 pF
tOFF
Switch
Input
VS
Switch
Output
0V
Note:
RL
VO
90 %
tON
Logic input waveform is inverted for switches that have the
opposite logic sense.
RL + rON
Figure 1. Switching Time
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Document Number: 73854
S11-1336-Rev. D, 04-Jul-11
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THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG447, DG448
Vishay Siliconix
TEST CIRCUITS
VO is the steady state output with the switch on.
ΔVO
+ 15 V
Rg
V gen
VO
V+
NO/NC
COM
VO
IN
INX
OFF
CL
1 nF
3V
ON
V-
GND
OFF
Q = ΔVO x CL
- 15 V
Figure 2. Charge Injection
+ 15 V
+ 15 V
C
V+
VS
NO/NC
C
VO
COM
VS
Rg = 50 Ω
0V, 2.4 V
RL
IN
NO/NC
V-
VO
Rg = 50 Ω
RL
IN
0 V, 2.4 V
GND
V+
COM
C
GND
V-
C
- 15 V
Off Isolation = 20 log
- 15 V
VO
VS
Figure 3. Off Isolation
Figure 4. Insertion Loss
+ 15 V
C
V+
NO/NC
Meter
0 V, 2.4 V
IN
HP4192A
Impedance
Analyzer
or Equivalent
COM
GND
V-
C
f = 1 MHz
- 15 V
Figure 5. Source/Drain Capacitances
Document Number: 73854
S11-1336-Rev. D, 04-Jul-11
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THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG447, DG448
Vishay General Semiconductor
TSOP: 5/6−LEAD
JEDEC Part Number: MO-193C
e1
e1
5
4
6
E1
1
2
5
4
E
E1
1
3
2
3
-B-
e
b
E
-B-
e
0.15 M C B A
5-LEAD TSOP
b
0.15 M C B A
6-LEAD TSOP
4x 1
-A-
D
0.17 Ref
c
R
R
A2 A
L2
Gauge Plane
Seating Plane
Seating Plane
0.08
C
-C-
L
A1
(L1)
4x 1
DIM.
MILLIMETERS
INCHES
MIN.
NOM.
MAX.
MIN.
NOM.
MAX.
A
0.91
-
1.10
0.036
-
0.043
A1
0.01
-
0.10
0.0004
-
0.004
A2
0.90
-
1.00
0.035
0.038
0.039
b
0.30
0.32
0.45
0.012
0.013
0.018
c
0.10
0.15
0.20
0.004
0.006
0.008
D
2.95
3.05
3.10
0.116
0.120
0.122
E
2.70
2.85
2.98
0.106
0.112
0.117
E1
1.55
1.65
1.70
0.061
0.065
0.067
1.90
2.00
0.071
-
0.50
0.012
e
0.95 BSC
e1
1.80
L
0.32
L1
0.0374 BSC
0.60 Ref.
L2
0.075
0.079
-
0.020
0.024 Ref.
0.25 BSC
0.010 BSC
R
0.10
-
-
0.004
-
-

0°
4°
8°
0°
4°
8°
1
7° Nom.
7° Nom.
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?73854.
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Document Number: 73854
S11-1336-Rev. D, 04-Jul-11
This document is subject to change without notice.
THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
TSOP: 5/6−LEAD
JEDEC Part Number: MO-193C
e1
e1
5
4
6
E1
1
2
5
4
E
E1
1
3
2
3
-B-
e
b
E
-B-
e
0.15 M C B A
5-LEAD TSOP
b
0.15 M C B A
6-LEAD TSOP
4x 1
-A-
D
0.17 Ref
c
R
R
A2 A
L2
Gauge Plane
Seating Plane
Seating Plane
0.08
C
L
A1
-C-
(L1)
4x 1
MILLIMETERS
Dim
A
A1
A2
b
c
D
E
E1
e
e1
L
L1
L2
R
Min
Nom
Max
Min
Nom
Max
0.91
-
1.10
0.036
-
0.043
0.01
-
0.10
0.0004
-
0.004
0.90
-
1.00
0.035
0.038
0.039
0.30
0.32
0.45
0.012
0.013
0.018
0.10
0.15
0.20
0.004
0.006
0.008
2.95
3.05
3.10
0.116
0.120
0.122
2.70
2.85
2.98
0.106
0.112
0.117
1.55
1.65
1.70
0.061
0.065
0.067
0.95 BSC
0.0374 BSC
1.80
1.90
2.00
0.071
0.075
0.079
0.32
-
0.50
0.012
-
0.020
0.60 Ref
0.024 Ref
0.25 BSC
0.010 BSC
0.10
-
-
0.004
-
-
0
4
8
0
4
8
7 Nom
1
ECN: C-06593-Rev. I, 18-Dec-06
DWG: 5540
Document Number: 71200
18-Dec-06
INCHES
7 Nom
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AN823
Vishay Siliconix
Mounting LITTLE FOOTR TSOP-6 Power MOSFETs
Surface mounted power MOSFET packaging has been based on
integrated circuit and small signal packages. Those packages
have been modified to provide the improvements in heat transfer
required by power MOSFETs. Leadframe materials and design,
molding compounds, and die attach materials have been
changed. What has remained the same is the footprint of the
packages.
The basis of the pad design for surface mounted power MOSFET
is the basic footprint for the package. For the TSOP-6 package
outline drawing see http://www.vishay.com/doc?71200 and see
http://www.vishay.com/doc?72610 for the minimum pad footprint.
In converting the footprint to the pad set for a power MOSFET, you
must remember that not only do you want to make electrical
connection to the package, but you must made thermal connection
and provide a means to draw heat from the package, and move it
away from the package.
In the case of the TSOP-6 package, the electrical connections are
very simple. Pins 1, 2, 5, and 6 are the drain of the MOSFET and
are connected together. For a small signal device or integrated
circuit, typical connections would be made with traces that are
0.020 inches wide. Since the drain pins serve the additional
function of providing the thermal connection to the package, this
level of connection is inadequate. The total cross section of the
copper may be adequate to carry the current required for the
application, but it presents a large thermal impedance. Also, heat
spreads in a circular fashion from the heat source. In this case the
drain pins are the heat sources when looking at heat spread on the
PC board.
Since surface mounted packages are small, and reflow soldering
is the most common form of soldering for surface mount
components, “thermal” connections from the planar copper to the
pads have not been used. Even if additional planar copper area is
used, there should be no problems in the soldering process. The
actual solder connections are defined by the solder mask
openings. By combining the basic footprint with the copper plane
on the drain pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low impedance
path for heat to move away from the device.
REFLOW SOLDERING
Vishay Siliconix surface-mount packages meet solder reflow
reliability requirements. Devices are subjected to solder reflow as a
test preconditioning and are then reliability-tested using
temperature cycle, bias humidity, HAST, or pressure pot. The
solder reflow temperature profile used, and the temperatures and
time duration, are shown in Figures 2 and 3.
Figure 1 shows the copper spreading recommended footprint for
the TSOP-6 package. This pattern shows the starting point for
utilizing the board area available for the heat spreading copper. To
create this pattern, a plane of copper overlays the basic pattern on
pins 1,2,5, and 6. The copper plane connects the drain pins
electrically, but more importantly provides planar copper to draw
heat from the drain leads and start the process of spreading the
heat so it can be dissipated into the ambient air. Notice that the
planar copper is shaped like a “T” to move heat away from the
drain leads in all directions. This pattern uses all the available area
underneath the body for this purpose.
0.167
4.25
0.074
1.875
0.014
0.35
0.122
3.1
0.026
0.65
0.049
1.25
0.049
1.25
0.010
0.25
FIGURE 1. Recommended Copper Spreading Footprint
Document Number: 71743
27-Feb-04
Ramp-Up Rate
+6_C/Second Maximum
Temperature @ 155 " 15_C
120 Seconds Maximum
Temperature Above 180_C
70 − 180 Seconds
Maximum Temperature
240 +5/−0_C
Time at Maximum Temperature
20 − 40 Seconds
Ramp-Down Rate
+6_C/Second Maximum
FIGURE 2. Solder Reflow Temperature Profile
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AN823
Vishay Siliconix
10 s (max)
255 − 260_C
1X4_C/s (max)
3-6_C/s (max)
217_C
140 − 170_C
60 s (max)
60-120 s (min)
Pre-Heating Zone
3_C/s (max)
Reflow Zone
Maximum peak temperature at 240_C is allowed.
FIGURE 3. Solder Reflow Temperature and Time Durations
THERMAL PERFORMANCE
TABLE 1.
Equivalent Steady State Performance—TSOP-6
Thermal Resistance Rqjf
30_C/W
On-Resistance vs. Junction Temperature
1.6
VGS = 4.5 V
ID = 6.1 A
1.4
rDS(on) − On-Resiistance
(Normalized)
A basic measure of a device’s thermal performance is the
junction-to-case thermal resistance, Rqjc, or the
junction-to-foot thermal resistance, Rqjf. This parameter is
measured for the device mounted to an infinite heat sink and
is therefore a characterization of the device only, in other
words, independent of the properties of the object to which the
device is mounted. Table 1 shows the thermal performance
of the TSOP-6.
1.2
1.0
0.8
0.6
−50
SYSTEM AND ELECTRICAL IMPACT OF
TSOP-6
−25
0
25
50
75
100
125
150
TJ − Junction Temperature (_C)
FIGURE 4. Si3434DV
In any design, one must take into account the change in
MOSFET rDS(on) with temperature (Figure 4).
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Document Number: 71743
27-Feb-04
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR TSOP-6
0.099
0.039
0.020
0.019
(1.001)
(0.508)
(0.493)
0.064
(1.626)
0.028
(0.699)
(3.023)
0.119
(2.510)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
APPLICATION NOTE
Return to Index
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Document Number: 72610
Revision: 21-Jan-08
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