VISHAY DG417L

DG417L, DG418L, DG419L
Vishay Siliconix
Precision Monolithic Low-Voltage CMOS Analog Switches
DESCRIPTION
The DG417L, DG418L, DG419L are low voltage pin-for-pin
compatible companion devices to the industry standard
DG417, DG418, DG419 with improved performance.
Using BiCMOS wafer fabrication technology allows the
DG417L, DG418L, DG419L to operate on single and dual
supplies. Single supply voltage ranges from 3 V to 12 V while
dual supply operation is recommended with ± 3 V to ± 6 V.
Combining high speed (tON: 28 ns), flat RON over the analog
signal range (6 ), minimal insertion lose (up to 100 MHz),
and excellent crosstalk and off-isolation performance
(- 70 dB at 1 MHz), the DG417L, DG418L, DG419L are
ideally suited for audio and video signal switching.
The DG417L and DG418L respond to opposite control logic
as shown in the truth table. The DG419L has an SPDT
configuration.
FEATURES
• 2.7 V- thru 12 V single supply or ± 3- thru
± 6 dual supply
• On-resistance - RON: 14 
• Fast switching - tON: 28 ns
- tOFF: 13 ns
• TTL, CMOS compatible
• Low leakage: < 100 pA
• Compliant to RoHS Directive 2002/95/EC
APPLICATIONS
• Precision automatic test equipment
•
•
•
•
•
Precision data acquisition
Communication systems
Battery powered systems
Computer peripherals
SDSL, DSLAM
• Audio and video signal routing
BENEFITS
• Widest dynamic range
• Low signal errors and distortion
• Break-before-make switching action
• Simple interfacing
FUNCTIONAL BLOCK DIAGRAM AND PIN CONFIGURATION
DG417L, DG418L
DG419L
Dual-In-Line, MSOP-8 and SOIC-8
Dual-In-Line, MSOP-8 and SOIC-8
NC/NO
1
8
COM
COM
1
8
NO
*
2
7
V-
NC
2
7
V-
GND
3
6
IN
GND
3
6
IN
V+
4
5
VL
V+
4
5
VL
Top View
Top View
* Not Connected
TRUTH TABLE (DG419L)
TRUTH TABLE
Logic
0
1
DG417L
ON
OFF
DG418L
OFF
ON
ORDERING INFORMATION (DG417L, DG418L)
Temp. Range
Package
8-Pin Narrow SOIC
8-Pin MSOP
Part Number
DG417LDY
DG417LDY-E3
DG417LDY-T1
DG417LDY-T1-E3
DG418LDY
DG418LDY-E3
DG418LDY-T1
DG418LDY-T1-E3
Logic
0
1
NC
ON
OFF
NO
OFF
ON
ORDERING INFORMATION (DG419L)
Temp. Range
- 40 °C to 85 °C
Package
8-Pin Narrow SOIC
8-Pin MSOP
Part Number
DG419LDY
DG419LDY-E3
DG419LDY-T1
DG419LDY-T1-E3
DG419LDQ-T1-E3
DG417LDQ-T1-E3
DG418LDQ-T1-E3
* Pb containing terminations are not RoHS compliant, exemptions may apply
Document Number: 71763
S11-0598-Rev. F, 25-Apr-11
www.vishay.com
1
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG417L, DG418L, DG419L
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Parameter
Limit
Unit
V+ to VGND to VVL
- 0.3 to 13
7
(GND - 0.3) to (V+) + 0.3
- 0.3 to (V+ + 0.3)
or 30 mA, whichever occurs first
V
IN, COM, NC, NOa
Continuous Current (Any Terminal)
Peak Current, S or D (Pulsed 1 ms, 10 % Duty Cycle)
Storage Temperature
(AK, DQ, DY Suffix)
30
100
- 65 to 150
320
400
600
c
8-Pin MSOP
8-Pin SOICc
8-Pin CerDIPd
Power Dissipation (Packages)b
mA
°C
mW
Notes:
a. Signals on NC, NO, COM, or IN exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings.
b. All leads welded or soldered to PC board.
c. Derate 6.5 mW/°C above 25 °C.
d. Derate 12 mW/°C above 75 °C.
SPECIFICATIONS (Single Supply 12 V)
Parameter
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 12 V, V- = 0 V
VL = 5 V, VIN = 2.4 V, 0.8 Vf
A Suffix Limits D Suffix Limits
- 55 °C to 125 °C - 40 °C to 85 °C
Temp.b
Typ.c
Min.d
Max.d
Min.d
Max.d
Unit
0
12
0
12
V
20
23.5

Analog Switch
Analog Signal Rangee
VANALOG
RON
On-Resistance
Switch Off Leakage Current
INO(off)
INC(off)
ICOM(off)
Channel On Leakage Current
ICOM(on)
Full
V+ = 10.8 V, V- = 0 V
Room
INO, INC = 5 mA, VCOM = 2 V / 9 V Full
VCOM = 1 V / 11 V
VNO, VNC = 11 V / 1 V
VNO, VNC = VCOM = 11 V / 1 V
13
20
32
Room
Full
-1
- 15
1
15
-1
- 10
1
10
Room
Full
-1
- 15
1
15
-1
- 10
1
10
Room
Full
-1
- 15
1
15
-1
- 10
1
10
- 1.5
1.5
-1
1
µA
43
46
31
32
ns
nA
Digital Control
IINL or IINH
Input Current
Full
0.01
RL = 300 , CL = 35 pF
VNO, VNC = 5 V, see figure 2
Room
Full
Room
Full
28
tD
DG419L only, VNC, VNO = 5 V
RL = 300 , CL = 35 pF
Room
13
Charge Injectione
QINJ
Vg = 0 V, Rg = 0 , CL = 1 nF
Room
1
Off-Isolatione
OIRR
- 71
Channel-to-Channel Crosstalke
XTALK
RL = 50 , CL = 5 pF , f = 1 MHz
Room
Room
- 71
Room
5
CON
Room
15
Positive Supply Current
I+
0.02
Negative Supply Current
I-
Room
Full
Room
Full
Room
Full
Room
Full
Dynamic Characteristics
Turn-On Time
tON
Turn-Off Time
tOFF
Break-Before-Make Time Delay
CNO(off)
CNC(off)
Source Off Capacitancee
Channel-On Capacitance
Power Supplies
e
VIN = 0 or V+, f = 1 MHz
VIN = 0 or VL
Logic Supply Current
Ground Current
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2
IL
IGND
43
50
31
35
13
- 0.002
pC
dB
pF
1
7.5
-1
- 7.5
0.002
- 0.002
1
5
-1
-5
1
7.5
-1
- 7.5
1
5
µA
-1
-5
Document Number: 71763
S11-0598-Rev. F, 25-Apr-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG417L, DG418L, DG419L
Vishay Siliconix
SPECIFICATIONS (Dual Supply ± 5 V)
Parameter
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 5 V, V- = - 5 V
VL = 5 V, VIN = 2.4 V, 0.8 Vf
A Suffix Limits D Suffix Limits
- 55 °C to 125 °C - 40 °C to 85 °C
Temp.b
Typ.c
Min.d
Max.d
Min.d
Max.d
Unit
-5
5
-5
5
V
18.5
21

Analog Switch
Analog Signal Rangee
On-Resistance
VANALOG
RON
INO(off)
INC(off)
Switch Off
Leakage Currenta
Channel On
Leakage Currenta
ICOM(off)
ICOM(on)
Full
V+ = 5 V, V- = - 5 V
INO, INC = 5 mA, VCOM = ± 3.5 V
Room
Full
V+ = 5.5 , V- = - 5.5 V
VCOM = ± 4.5 V
VNO, VNC = ± 4.5 V
Room
Full
-1
- 15
1
15
-1
- 10
1
10
Room
Full
-1
- 15
1
15
-1
- 10
1
10
V+ = 5.5 V, V- = - 5.5 V
VNO, VNC = VCOM = ± 4.5 V
Room
Full
-1
- 15
1
15
-1
- 10
1
10
- 1.5
1.5
-1
1
14
18.5
30
nA
Digital Control
Input Currenta
IINL or IINH
Full
0.05
Room
Full
30
41
50
41
44
Room
Full
16
32
36
32
33
47
47
µA
Dynamic Characteristics
Turn-On Timee
tON
Turn-Off Timee
tOFF
RL = 300 , CL = 35 pF
VNO, VNC = ± 3.5 V, see figure 2
tD
DG419L only, VNO, VNC = 3.5 V
RL = 300 , CL = 35 pF
Room
10
tTRANS
RL = 300 , CL = 35 pF
VS1 = ± 3.5 V, VS2 = ± 3.5 V
Room
33
QINJ
Vg = 0 V, Rg = 0 , CL = 1 nF
Room
3
Room
- 71
Room
- 76
Room
5.2
CON
Room
15
Positive Supply Currente
I+
Room
Full
0.03
Negative Supply Currente
I-
Room
Full
- 0.002
Room
Full
Room
Full
0.002
Break-Before-Make Time
Delaye
TransitionTime
Charge Injectione
Off-Isolation
e
Channel-to-Channel
Crosstalke
Source Off Capacitancee
Channel-On Capacitancee
OIRR
XTALK
CNO(off)
CNC(off)
RL = 50 , CL = 5 pF , f = 1 MHz
f = 1 MHz
ns
pC
dB
pF
Power Supplies
VIN = 0 or VL
Logic Supply Currente
Ground Currente
Document Number: 71763
S11-0598-Rev. F, 25-Apr-11
IL
IGND
- 0.002
1
7.5
-1
- 7.5
1
5
-1
-5
1
7.5
-1
- 7.5
1
5
µA
-1
-5
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This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG417L, DG418L, DG419L
Vishay Siliconix
SPECIFICATIONS (Single Supply 5 V)
Parameter
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 5 V, V- = 0 V
VL = 5 V, VIN = 2.4 V, 0.8 Vf
A Suffix Limits D Suffix Limits
- 55 °C to 125 °C - 40 °C to 85 °C
Temp.b
Typ.c
Min.d
Max.d
Min.d
Max.d
Unit
5
5
V

Analog Switch
Analog Signal Rangee
On-Resistancee
VANALOG
Full
V+ = 4.5 V, INO, INC = 5 mA
VCOM = 1 V, 3.5 V
Room
Full
26
36.5
50
36.5
40.5
Room
Full
37
49
60
49
54
Room
Full
16
31
35
31
32
tD
DG419L only, VNO, VNC = 3.5 V
RL = 300 , CL = 35 pF
Room
19
QINJ
Vg = 0 V, Rg = 0 , CL = 1 nF
Room
0.4
RON
Dynamic Characteristics
Turn-On Timee
tON
Turn-Off Timee
tOFF
Break-Before-Make Time
Delaye
Charge Injectione
RL = 300 , CL = 35 pF
VNO, VNC = 3.5 V, see figure 2
ns
pC
Power Supplies
Positive Supply Currente
I+
Room
Full
0.02
Negative Supply Currente
I-
Room
Full
- 0.002
Logic Supply Currente
IL
Room
Full
Room
Full
0.002
VIN = 0 or VL
Ground Currente
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IGND
- 0.002
1
7.5
-1
- 7.5
1
5
-1
-5
1
7.5
-1
- 7.5
1
5
µA
-1
-5
Document Number: 71763
S11-0598-Rev. F, 25-Apr-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG417L, DG418L, DG419L
Vishay Siliconix
SPECIFICATIONS (Single Supply 3 V)
Parameter
Symbol
Test Conditions
Unless Otherwise Specified
V+ = 3 V, V- = 0 V
VL = 3 V, VIN = 2 V, 0.4 Vf
A Suffix Limits D Suffix Limits
- 55 °C to 125 °C - 40 °C to 85 °C
Temp.b
Typ.c
Min.d
Max.d
Min.d
Max.d
Unit
0
3
0
3
V
70
75

Analog Switch
Analog Signal Rangee
On-Resistance
VANALOG
RON
INO(off)
INC(off)
Switch Off
Leakage Currenta
Channel On
Leakage Currenta
ICOM(off)
ICOM(on)
Full
V+ = 2.7 V, V- = 0 V
Room
INO, INC = 5 mA, VCOM = 0.5 V, 2.2 V Full
V+ = 3.3 , V- = 0 V
VCOM = 1, 2 V, VNO, VNC = 2, 1 V
V+ = 3.3 V, V- = 0 V
VNO, VNC = VCOM = 1 V, 2 V
70
80
47
Room
Full
-1
- 15
1
15
-1
- 10
1
10
Room
Full
-1
- 15
1
15
-1
- 10
1
10
Room
Full
-1
- 15
1
15
-1
- 10
1
10
- 1.5
1.5
-1
1
nA
Digital Control
Input Currenta
IINL or IINH
Full
0.005
Room
Full
65
75
95
75
85
Room
Full
26
41
45
41
43
Room
33
µA
Dynamic Characteristics
Turn-On Time
tON
Turn-Off Time
tOFF
Break-Before-Make Time
Delay
Charge Injectione
Off-Isolation
e
Channel-to-Channel
Crosstalke
RL = 300 , CL = 35 pF
VNO, VNC = 1.5 V, see figure 2
tD
DG419L only, VNO, VNC = 1.5 V
RL = 300 , CL = 35 pF
QINJ
Vg = 0 V, Rg = 0 , CL = 10 nF
OIRR
XTALK
Source Off Capacitancee
CNO(off)
CNC(off)
Channel On Capacitancee
CD(on)
RL = 50 , CL = 5 pF , f = 1 MHz
f = 1 MHz
Room
1
Room
- 71
Room
- 77
Room
5.6
Room
16
ns
pC
dB
pF
Notes:
a. Leakage parameters are guaranteed by worst case test condition and not subject to production test.
b. Room = 25 °C, Full = as determined by the operating temperature suffix.
c. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
d. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
e. Guaranteed by design, not subject to production test.
f. VIN = input voltage to perform proper function.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
Document Number: 71763
S11-0598-Rev. F, 25-Apr-11
www.vishay.com
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This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG417L, DG418L, DG419L
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
60
80
RON - On-Resistance (Ω)
RON - On-Resistance (Ω)
50
V+ = 2.7 V
40
30
V+ = 4.5 V
20
V+ = 10.8 V
A = 125 °C
B = 85 °C
C = 25 °C
D = - 40 °C
E = - 55 °C
60
A
B
50
V+ = 4.5 V
C
40
D
E
A
B
30
C
D
20
E
10
10
0
0
0
3
6
9
12
0
1
2
VCOM - Analog Voltage (V)
3
4
5
VCOM - Analog Voltage (V)
RON vs. Analog Voltage and Temperature
RON vs. VCOM and Supply Voltage
10 000
30
V±=±5V
VIN = 0 V
20
I+ - Supply Current (nA)
V± =± 5V
IS = 5 mA
25
R ON - On-Resistance (Ω)
V+ = 2.7 V
IS = 5 mA
70
T = 25 °C
IS = 5 mA
125 °C
85 °C
15
25 °C
- 40 °C
10
- 55 °C
1000
5
0
-5
-3
-1
1
3
100
- 55
5
- 35
- 15
5
RON vs. Analog Voltage and Temperature
45
65
85
105
125
105
125
Supply Current vs. Temperature
10 000
10 m
V+ = 12 V
V- = 0 V
1m
1000
100 µ
Leakage Current (pA)
I+ - Supply Current (nA)
25
Temperature (°C)
VCOM - Analog Voltage (V)
10 µ
1µ
100 n
ICOM(on)
100
ICOM(off)
10
10 n
1
10
100
1K
10 K
100 K
1M
10 M
Input Switching Frequency (Hz)
Supply Current vs. Input Switching Frequency
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1
- 55
- 35
- 15
5
25
45
65
85
Temperature (°C)
Leakage Current vs. Temperature
Document Number: 71763
S11-0598-Rev. F, 25-Apr-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG417L, DG418L, DG419L
Vishay Siliconix
TYPICAL CHARACTERISTICS (25 °C, unless otherwise noted)
40
90
80
t ON , t OFF - Switching Time (ns)
Leakage Current (pA)
V+ = 12 V
V- = 0 V
20
ICOM(off)/ICOM(on)
0
INO(off)/INC(on)
- 20
70
tON V+ = 3 V
60
50
40
tON V+ = 5 V
tON V+ = 12 V
30
20
10
0
- 55
- 40
0
2
4
6
8
10
12
tOFF V+ = 12 V
- 35
- 15
5
25
VCOM, V NO, V NC - Analog Voltage (V)
65
85
105
125
Switching Time vs. Temperature and
Single Supply Voltage
80
10
Loss
70
- 10
60
tON V+ = ± 3 V
50
40
tON V+ = ± 5 V
30
tON V+ = ± 6 V
20
tOFF V+ = ± 3 V
Loss, OIRR, X TALK (dB)
t ON , t OFF - Switching Time (ns)
45
Temperature (°C)
Leakage vs. Analog Voltage
- 30
- 50
OIRR
- 70
V+ = 3 V
V- = 0 V
RL = 50 Ω
- 90
10
tOFF V+ = ± 6 V
0
tOFF V+ = ± 5 V
- 110
- 55 - 35
- 15 5
25
45
65
85
105
125
0.1
1
Temperature (°C)
12
10
1.8
VL = V+
V+ = 12 V
Q - Charge Injection (pC)
8
1.4
1.2
1.0
0.8
0.6
0.4
6
4
V+ = 5 V
V=± 5V
2
0
V+ = 3 V
-2
-4
-6
-8
0.2
0.0
2.0
1000
Insertion Loss, Off -Isolation
Crosstalk vs. Frequency
2.0
1.6
100
10
Frequency (Hz)
Switching Time vs. Temperature and
Dual Supply Voltage
VT - Switching Threshold (V)
tOFF V+ = 3 V
tOFF V+ = 5 V
- 10
2.5
3.0
3.5
4.0
4.5
5.0
5.5
V+ - Supply Voltage (V)
Switching Threshold vs. Supply Voltage
Document Number: 71763
S11-0598-Rev. F, 25-Apr-11
6.0
- 12
-6
-4
-2
0
2
4
6
8
10
12
VCOM - Analog Voltage (V)
Charge Injection vs. Analog Voltage)
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This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG417L, DG418L, DG419L
Vishay Siliconix
SCHEMATIC DIAGRAM (Typical Channel)
V+
S
VL
VLevel
Shift/
Drive
VIN
V+
GND
D
V-
Figure 1.
TEST CIRCUITS
VL
V+
Logic
Input
VINH
tr < 5 ns
tf < 5 ns
50 %
VINL
Switch
Input
VIN
VL
Switch
Output
V+
NO or NC
COM
tOFF
VOUT
VOUT
IN
RL
300 Ω
V-
GND
CL
35 pF
0.9 x V OUT
90 %
0V
Switch
Output
tON
VCL (includes fixture and stray capacitance)
RL
VOUT = V IN
Note:
RL + R ON
Logic input waveform is inverted for switches that
have the opposite logic sense control
Figure 2. Switching Time
VL
V+
VL
VNO
VNC
Logic
Input
V+
tr < 5 ns
tf < 5 ns
VINL
COM
NO
VINH
VO
NC
RL
300 Ω
IN
GND
V-
CL
35 pF
VNC = VNO
VO
Switch
Output
90 %
0V
tD
tD
VCL (includes fixture and stray capacitance)
Figure 3. Break-Before-Make (DG419L)
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Document Number: 71763
S11-0598-Rev. F, 25-Apr-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG417L, DG418L, DG419L
Vishay Siliconix
TEST CIRCUITS
+5V
VL
+ 15 V
V+
NO or NC
Logic VINH
Input
VINL
COM
VS1
VO
NC or NO
VS2
RL
300 Ω
IN
tr < 5 ns
tf < 5 ns
50 %
tTRANS
CL
35 pF
tTRANS
VS1
V01
V-
GND
90 %
Switch
Output
10 %
V02
VS2
VCL (includes fixture and stray capacitance)
RL
VO = V S
RL + R ON
Figure 4. Transition Time (DG419L)
VL
V+
VL
V+
ΔVO
VO
Rg
COM
NO or NC
IN
Vg
IN
VO
OFF
ON
CL
1 nF
Q = ΔVO x CL
V-
GND
OFF
IN dependent on switch configuration Input polarity determined
by sense of switch.
VVIN = 0 - V+
Figure 5. Charge Injection
VL
C
V+
C
VL
VS
VIN
NO or NC
V+
COM
Rg = 50 Ω
50 Ω
IN
0 V or 2.4 V
NC or NO
VOUT
GND
XTA LK Isolation = 20 log
V-
C
VOUT
VIN
V-
C = RF bypass
Figure 6. Crosstalk (DG419L)
Document Number: 71763
S11-0598-Rev. F, 25-Apr-11
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9
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
DG417L, DG418L, DG419L
Vishay Siliconix
TEST CIRCUITS
V+
VL
C
C
NO or NC
COM
Rg = 50 Ω
RL
50 Ω
IN
0 V, 2.4 V
GND
V-
C
VOff Isolation = 20 log
C = RF Bypass
VCOM
VNO/NC
Figure 7. Off Isolation
VL
V+
C
C
VL
V+
COM
Meter
IN
HP4192A
Impedance
Analyzer
or Equivalent
0 V, 2.4 V
NO or NC
GND
V-
C
f = 1 MHz
V-
Figure 8. Source/Drain Capacitances
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability
data, see www.vishay.com/ppg?71763.
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10
Document Number: 71763
S11-0598-Rev. F, 25-Apr-11
This datasheet is subject to change without notice.
THE PRODUCT DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000
Package Information
Vishay Siliconix
SOIC (NARROW): 8-LEAD
JEDEC Part Number: MS-012
8
6
7
5
E
1
3
2
H
4
S
h x 45
D
C
0.25 mm (Gage Plane)
A
e
B
All Leads
q
A1
L
0.004"
MILLIMETERS
INCHES
DIM
Min
Max
Min
Max
A
1.35
1.75
0.053
0.069
A1
0.10
0.20
0.004
0.008
B
0.35
0.51
0.014
0.020
C
0.19
0.25
0.0075
0.010
D
4.80
5.00
0.189
0.196
E
3.80
4.00
0.150
e
0.101 mm
1.27 BSC
0.157
0.050 BSC
H
5.80
6.20
0.228
0.244
h
0.25
0.50
0.010
0.020
L
0.50
0.93
0.020
0.037
q
0°
8°
0°
8°
S
0.44
0.64
0.018
0.026
ECN: C-06527-Rev. I, 11-Sep-06
DWG: 5498
Document Number: 71192
11-Sep-06
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1
Package Information
Vishay Siliconix
MSOP:
8−LEADS
JEDEC Part Number: MO-187, (Variation AA and BA)
(N/2) Tips)
2X
5
A B C 0.20
N N-1
0.60
0.48 Max
Detail “B”
(Scale: 30/1)
Dambar Protrusion
E
1 2
0.50
N/2
0.60
0.08 M C B S
b
A S
7
Top View
b1
e1
With Plating
e
A
See Detail “B”
c1
0.10 C
-H-
A1
D
6
Seating Plane
c
Section “C-C”
Scale: 100/1
(See Note 8)
Base Metal
-A-
3
See Detail “A”
Side View
0.25
BSC
C
Parting Line
0.07 R. Min
2 Places
Seating Plane
ς
A2
0.05 S
C
E1
-B-
L 4
T
-C-
3
0.95
End View
Detail “A”
(Scale: 30/1)
N = 8L
NOTES:
1.
Die thickness allowable is 0.203"0.0127.
2.
Dimensioning and tolerances per ANSI.Y14.5M-1994.
3.
Dimensions “D” and “E1” do not include mold flash or protrusions, and are
measured at Datum plane -H- , mold flash or protrusions shall not exceed
0.15 mm per side.
4.
Dimension is the length of terminal for soldering to a substrate.
5.
Terminal positions are shown for reference only.
6.
Formed leads shall be planar with respect to one another within 0.10 mm at
seating plane.
7.
The lead width dimension does not include Dambar protrusion. Allowable
Dambar protrusion shall be 0.08 mm total in excess of the lead width
dimension at maximum material condition. Dambar cannot be located on the
lower radius or the lead foot. Minimum space between protrusions and an
adjacent lead to be 0.14 mm. See detail “B” and Section “C-C”.
8.
Section “C-C” to be determined at 0.10 mm to 0.25 mm from the lead tip.
9.
Controlling dimension: millimeters.
10. This part is compliant with JEDEC registration MO-187, variation AA and BA.
11. Datums -A- and -B- to be determined Datum plane -H- .
MILLIMETERS
Dim
Min
Nom
Max
A
A1
A2
b
b1
c
c1
D
E
E1
e
e1
L
N
T
-
-
1.10
0.05
0.10
0.15
0.75
0.85
0.95
0.25
-
0.38
8
0.25
0.30
0.33
8
0.13
-
0.23
0.15
0.18
0.13
3.00 BSC
Note
3
4.90 BSC
2.90
3.00
3.10
3
0.70
4
0.65 BSC
1.95 BSC
0.40
0.55
8
0_
4_
5
6_
ECN: T-02080—Rev. C, 15-Jul-02
DWG: 5867
12. Exposed pad area in bottom side is the same as teh leadframe pad size.
Document Number: 71244
12-Jul-02
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1
VISHAY SILICONIX
TrenchFET® Power MOSFETs
Application Note 808
Mounting LITTLE FOOT®, SO-8 Power MOSFETs
Wharton McDaniel
Surface-mounted LITTLE FOOT power MOSFETs use
integrated circuit and small-signal packages which have
been been modified to provide the heat transfer capabilities
required by power devices. Leadframe materials and
design, molding compounds, and die attach materials have
been changed, while the footprint of the packages remains
the same.
See Application Note 826, Recommended Minimum Pad
Patterns With Outline Drawing Access for Vishay Siliconix
MOSFETs, (http://www.vishay.com/ppg?72286), for the
basis of the pad design for a LITTLE FOOT SO-8 power
MOSFET. In converting this recommended minimum pad
to the pad set for a power MOSFET, designers must make
two connections: an electrical connection and a thermal
connection, to draw heat away from the package.
0.288
7.3
0.050
1.27
0.196
5.0
0.027
0.69
0.078
1.98
0.2
5.07
Figure 1. Single MOSFET SO-8 Pad
Pattern With Copper Spreading
Document Number: 70740
Revision: 18-Jun-07
0.050
1.27
0.088
2.25
0.088
2.25
0.027
0.69
0.078
1.98
0.2
5.07
Figure 2. Dual MOSFET SO-8 Pad Pattern
With Copper Spreading
The minimum recommended pad patterns for the
single-MOSFET SO-8 with copper spreading (Figure 1) and
dual-MOSFET SO-8 with copper spreading (Figure 2) show
the starting point for utilizing the board area available for the
heat-spreading copper. To create this pattern, a plane of
copper overlies the drain pins. The copper plane connects
the drain pins electrically, but more importantly provides
planar copper to draw heat from the drain leads and start the
process of spreading the heat so it can be dissipated into the
ambient air. These patterns use all the available area
underneath the body for this purpose.
Since surface-mounted packages are small, and reflow
soldering is the most common way in which these are
affixed to the PC board, “thermal” connections from the
planar copper to the pads have not been used. Even if
additional planar copper area is used, there should be no
problems in the soldering process. The actual solder
connections are defined by the solder mask openings. By
combining the basic footprint with the copper plane on the
drain pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces.
The absolute minimum power trace width must be
determined by the amount of current it has to carry. For
thermal reasons, this minimum width should be at least
0.020 inches. The use of wide traces connected to the drain
plane provides a low impedance path for heat to move away
from the device.
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1
APPLICATION NOTE
In the case of the SO-8 package, the thermal connections
are very simple. Pins 5, 6, 7, and 8 are the drain of the
MOSFET for a single MOSFET package and are connected
together. In a dual package, pins 5 and 6 are one drain, and
pins 7 and 8 are the other drain. For a small-signal device or
integrated circuit, typical connections would be made with
traces that are 0.020 inches wide. Since the drain pins serve
the additional function of providing the thermal connection
to the package, this level of connection is inadequate. The
total cross section of the copper may be adequate to carry
the current required for the application, but it presents a
large thermal impedance. Also, heat spreads in a circular
fashion from the heat source. In this case the drain pins are
the heat sources when looking at heat spread on the PC
board.
0.288
7.3
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR SO-8
0.172
(4.369)
0.028
0.022
0.050
(0.559)
(1.270)
0.152
(3.861)
0.047
(1.194)
0.246
(6.248)
(0.711)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
APPLICATION NOTE
Return to Index
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22
Document Number: 72606
Revision: 21-Jan-08
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Disclaimer
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Document Number: 91000
Revision: 11-Mar-11
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1