VISHAY SI3586DV

Si3586DV
Vishay Siliconix
N- and P-Channel 20-V (D-S) MOSFET
FEATURES
PRODUCT SUMMARY
VDS (V)
N-Channel
20
P-Channel
- 20
RDS(on) (Ω)
ID (A)
0.060 at VGS = 4.5 V
3.4
0.070 at VGS = 2.5 V
3.2
0.100 at VGS = 1.8 V
2.5
0.110 at VGS = - 4.5 V
- 2.5
0.145 at VGS = - 2.5 V
- 2.0
0.220 at VGS = - 1.8V
- 1.0
• Halogen-free According to IEC 61249-2-21
Definition
• TrenchFET® Power MOSFET
• Fast Switching In Small Footprint
• Very Low RDS(on) for Increased Efficiency
• Compliant to RoHS Directive 2002/95/EC
APPLICATIONS
• Load Switch for Portable Devices
TSOP-6
Top View
3 mm
S2
D1
G1
1
6
D1
S2
2
5
S1
G2
G1
G2
3
4
D2
2.85 mm
Ordering Information: Si3586DV-T1-E3 (Lead (Pb)-free)
Si3586DV-T1-GE3 (Lead (Pb)-free and Halogen-free)
S1
D2
N-Channel MOSFET
P-Channel MOSFET
ABSOLUTE MAXIMUM RATINGS TA = 25 °C, unless otherwise noted
N-Channel
Parameter
Symbol
Drain-Source Voltage
VDS
Gate-Source Voltage
VGS
TA = 25 °C
Continuous Drain Current (TJ = 150 °C)a
TA = 70 °C
Continuous Source Current (Diode Conduction)a
IS
TA = 25 °C
TA = 70 °C
Operating Junction and Storage Temperature Range
PD
P-Channel
Steady State
5s
Steady State
20
- 20
3.4
2.9
2.7
2.3
- 2.5
- 2.1
- 2.0
- 1.7
±8
1.05
0.75
- 1.05
- 0.75
1.15
0.83
1.15
0.83
0.73
0.53
0.73
0.53
TJ, Tstg
Unit
V
±8
IDM
Pulsed Drain Current
Maximum Power Dissipationa
ID
5s
- 55 to 150
A
W
°C
THERMAL RESISTANCE RATINGS
Parameter
Maximum Junction-to-Ambienta
Maximum Junction-to-Foot (Drain)
Symbol
t≤5s
Steady State
Steady State
RthJA
RthJF
Typical
Maximum
93
110
130
150
90
90
Unit
°C/W
Note:
a. Surface Mounted on 1" x 1" FR4 board.
Document Number: 72310
S09-2110-Rev. D, 12-Oct-09
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Si3586DV
Vishay Siliconix
SPECIFICATIONS TJ = 25 °C, unless otherwise noted
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
Static
Gate Threshold Voltage
Gate-Body Leakage
Zero Gate Voltage Drain Current
On-State Drain Currenta
Drain-Source On-State Resistancea
Forward Transconductancea
Diode Forward Voltagea
VGS(th)
IGSS
IDSS
VDS = VGS, ID = 250 µA
N-Ch
0.40
1.1
VDS = VGS, ID = - 250 µA
P-Ch
- 0.40
- 1.1
VDS = 0 V, VGS = ± 8 V
N-Ch
± 100
VDS = 0 V, VGS = ± 8 V
P-Ch
± 100
VDS = 20 V, VGS = 0 V
N-Ch
1
VDS = - 20 V, VGS = 0 V
P-Ch
-1
VDS = 20 V, VGS = 0 V, TJ = 85 °C
N-Ch
10
VDS = - 20 V, VGS = 0 V, TJ = 85 °C
P-Ch
- 10
ID(on)
RDS(on)
VDS ≥ 5 V, VGS = 4.5 V
N-Ch
5
VDS ≤ - 5 V, VGS = - 4.5 V
P-Ch
-5
VGS = 4.5 V, ID = 3.4 A
N-Ch
0.047
VGS = - 4.5 V, ID = - 2.5 A
P-Ch
0.086
0.110
VGS = 2.5 V, ID = 3.2 A
N-Ch
0.054
0.070
VGS = - 2.5 V, ID = - 2.0 A
P-Ch
0.116
0.145
VGS = - 1.8 V, ID = - 2.5 A
N-Ch
0.075
0.100
VGS = - 1.8 V, ID = - 1.0 A
P-Ch
0.170
0.220
µA
0.060
VDS = 5 V, ID = 3.4 A
N-Ch
13
P-Ch
6
IS = 1.05 A, VGS = 0 V
N-Ch
0.8
1.1
IS = - 1.05 A, VGS = 0 V
P-Ch
- 0.8
- 1.1
N-Ch
4.1
6.0
P-Ch
5
7.5
N-Ch
0.65
P-Ch
P-Channel
VDS = - 10 V, VGS = - 4.5 V, ID = - 2.5 A N-Ch
P-Ch
0.68
N-Ch
2.6
P-Ch
9.8
N-Ch
30
P-Ch
28
45
N-Ch
52
85
VSD
nA
A
VDS = - 5 V, ID = - 2.5 A
gfs
V
Ω
S
V
Dynamicb
Total Gate Charge
Qg
Gate-Source Charge
Qgs
Gate-Drain Charge
Qgd
Gate Resistance
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Source-Drain Reverse Recovery Time
N-Channel
VDS = 10 V, VGS = 4.5 V, ID = 3.4 A
Rg
td(on)
tr
td(off)
tf
N-Channel
VDD = 10 V, RL = 10 Ω
ID ≅ 1 A, VGEN = 4.5 V, RG = 6 Ω
0.8
1.3
Ω
45
P-Ch
55
85
N-Ch
25
40
P-Ch
55
85
N-Ch
20
30
P-Ch
32
50
IF = 1.05 A, dI/dt = 100 A/µs
N-Ch
25
40
IF = - 1.05 A, dI/dt = 100 A/µs
P-Ch
25
40
P-Channel
VDD = - 10 V, RL = 10 Ω
ID ≅ - 1 A, VGEN = - 4.5 V, RG = 6 Ω
trr
nC
ns
Notes:
a. Pulse test; pulse width ≤ 300 µs, duty cycle ≤ 2 %.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
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Document Number: 72310
S09-2110-Rev. D, 12-Oct-09
Si3586DV
Vishay Siliconix
N-CHANNEL TYPICAL CHARACTERISTICS
25 °C, unless otherwise noted
8
8
7
7
6
6
I D - Drain Current (A)
I D - Drain Current (A)
VGS = 5 V thru 2 V
5
1.5 V
4
3
5
4
3
TC = 125 °C
2
2
1
1
0
0
0.00
25 °C
- 55 °C
0
1
2
3
4
5
0.25
0.50
VDS - Drain-to-Source Voltage (V)
1.00
1.25
1.50
1.75
2.00
VGS - Gate-to-Source Voltage (V)
Output Characteristics
Transfer Characteristics
600
0.10
500
0.08
VGS = 4.5 V
0.06
VGS = 2.5 V
0.04
Ciss
C - Capacitance (pF)
RDS(on) - On-Resistance (Ω)
0.75
400
300
200
Coss
0.02
100
Crss
0.00
0
0
1
2
3
4
5
6
7
8
0
8
12
16
VDS - Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current
Capacitance
20
1.6
6
VDS = 10 V
ID = 3.4 A
1.4
4
3
2
(Normalized)
5
R DS(on) - On-Resistance
VGS - Gate-to-Source Voltage (V)
4
ID - Drain Current (A)
VGS = 4.5 V
ID = 3.4 A
1.2
1.0
0.8
1
0
0
1
2
3
4
Qg - Total Gate Charge (nC)
Gate Charge
Document Number: 72310
S09-2110-Rev. D, 12-Oct-09
5
6
0.6
- 50
- 25
0
25
50
75
100
125
150
TJ - Junction Temperature (°C)
On-Resistance vs. Junction Temperature
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Si3586DV
Vishay Siliconix
N-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
10
0.25
TJ = 150 °C
R DS(on) - On-Resistance (Ω)
I S - Source Current (A)
ID = 3.4 A
TJ = 25 °C
1
0.20
0.15
0.10
0.05
0.00
0.1
0
0.2
0.4
0.6
0.8
1.0
1.2
0
1
2
3
4
5
VSD - Source-to-Drain Voltage (V)
VGS - Gate-to-Source Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
0.2
8
0.1
6
0.0
Power (W)
VGS(th) Variance (V)
ID = 250 µA
- 0.1
4
- 0.2
2
- 0.3
- 0.4
- 50
0
- 25
0
25
50
75
100
125
150
0.1
0.01
TJ - Temperature (°C)
1
10
30
Time (s)
Single Pulse Power (Junction-to-Ambient)
Threshold Voltage
10
I D - Drain Current (A)
Limited by
RDS(on)*
1 ms
1
10 ms
100 ms
0.1
1 s, 10 s
DC
TC = 25 °C
Single Pulse
0.01
0.1
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Case
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Document Number: 72310
S09-2110-Rev. D, 12-Oct-09
Si3586DV
Vishay Siliconix
N-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
2
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
Notes:
0.2
PDM
0.1
0.1
t1
0.05
t2
1. Duty Cycle, D =
t1
t2
2. Per Unit Base = R thJA = 130 °C/W
0.02
3. T JM - TA = PDMZthJA(t)
4. Surface Mounted
Single Pulse
0.01
10-4
10-3
10-2
10-1
1
10
100
600
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10-4
10-3
10-2
10-1
1
10
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Foot
Document Number: 72310
S09-2110-Rev. D, 12-Oct-09
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Si3586DV
Vishay Siliconix
P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
8
8
7
25 °C
6
I D - Drain Current (A)
6
I D - Drain Current (A)
TC = - 55 °C
7
VGS = 5 V thru 2.5 V
2V
5
4
3
1.5 V
2
125 °C
5
4
3
2
1
1
0
0.0
0
0
1
2
3
4
5
0.5
Output Characteristics
2.0
2.5
Transfer Characteristics
0.75
650
0.60
520
C - Capacitance (pF)
R DS(on) - On-Resistance (Ω)
1.5
VGS - Gate-to-Source Voltage (V)
VDS - Drain-to-Source Voltage (V)
0.45
0.30
VGS = 1.8 V
Ciss
390
260
Coss
VGS = 2.5 V
130
0.15
Crss
VGS = 4.5 V
0
0.00
0
1
2
3
4
5
6
7
0
8
4
8
12
16
ID - Drain Current (A)
VDS - Drain-to-Source Voltage (V)
On-Resistance vs. Drain Current
Capacitance
20
1.6
6.5
VGS = 4.5 V
ID = 2.5 A
VDS = 10 V
ID = 2.5 A
1.4
3.9
2.6
(Normalized)
5.2
R DS(on) - On-Resistance
VGS - Gate-to-Source Voltage (V)
1.0
1.2
1.0
0.8
1.3
0.0
0
1
2
3
4
Qg - Total Gate Charge (nC)
Gate Charge
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6
5
6
0.6
- 50
- 25
0
25
50
75
100
125
150
TJ - Junction Temperature (°C)
On-Resistance vs. Junction Temperature
Document Number: 72310
S09-2110-Rev. D, 12-Oct-09
Si3586DV
Vishay Siliconix
P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
0.5
R DS(on) - On-Resistance (Ω)
I S - Source Current (A)
10
TJ = 25 °C
TJ = 150 °C
1
0.4
0.3
ID = 2.5 A
0.2
0.1
0.0
0.1
0
0.3
0.6
0.9
1.2
1.5
0
1
2
3
4
5
VSD - Source-to-Drain Voltage (V)
VGS - Gate-to-Source Voltage (V)
Source-Drain Diode Forward Voltage
On-Resistance vs. Gate-to-Source Voltage
0.4
8
0.3
Power (W)
V GS(th) Variance (V)
6
0.2
ID = 250 µA
0.1
4
0.0
2
- 0.1
- 0.2
- 50
- 25
0
25
50
75
100
125
150
0
0.01
0.1
1
10
30
Time (s)
TJ - Temperature (°C)
Single Pulse Power (Junction-to-Ambient)
Threshold Voltage
10
I D - Drain Current (A)
Limited by
RDS(on)*
1 ms
1
10 ms
100 ms
0.1
TC = 25 °C
Single Pulse
0.01
0.1
1 s, 10 s
DC
1
10
100
VDS - Drain-to-Source Voltage (V)
* VGS > minimum VGS at which RDS(on) is specified
Safe Operating Area, Junction-to-Case
Document Number: 72310
S09-2110-Rev. D, 12-Oct-09
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Si3586DV
Vishay Siliconix
P-CHANNEL TYPICAL CHARACTERISTICS 25 °C, unless otherwise noted
2
1
Normalized Effective Transient
Thermal Impedance
Duty Cycle = 0.5
0.2
Notes:
PDM
0.1
0.1
t1
0.05
t2
1. Duty Cycle, D =
0.02
t1
t2
2. Per Unit Base = R thJA = 130 °C/W
3. T JM - TA = PDMZthJA(t)
4. Surface Mounted
Single Pulse
0.01
10-4
10-3
10-2
10-1
1
10
100
600
Square Wave Pulse Duration (s)
Normalized Thermal Transient Impedance, Junction-to-Ambient
2
Normalized Effective Transient
Thermal Impedance
1
Duty Cycle = 0.5
0.2
0.1
0.1
0.05
0.02
Single Pulse
0.01
10-4
10-3
10-2
10-1
Square Wave Pulse Duration (s)
1
10
Normalized Thermal Transient Impedance, Junction-to-Foot
Vishay Siliconix maintains worldwide manufacturing capability. Products may be manufactured at one of several qualified locations. Reliability data for Silicon
Technology and Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and
reliability data, see www.vishay.com/ppg?72310.
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Document Number: 72310
S09-2110-Rev. D, 12-Oct-09
Package Information
Vishay Siliconix
TSOP: 5/6−LEAD
JEDEC Part Number: MO-193C
e1
e1
5
4
6
E1
1
2
5
4
E
E1
1
3
2
3
-B-
e
b
E
-B-
e
0.15 M C B A
5-LEAD TSOP
b
0.15 M C B A
6-LEAD TSOP
4x 1
-A-
D
0.17 Ref
c
R
R
A2 A
L2
Gauge Plane
Seating Plane
Seating Plane
0.08
C
L
A1
-C-
(L1)
4x 1
MILLIMETERS
Dim
A
A1
A2
b
c
D
E
E1
e
e1
L
L1
L2
R
Min
Nom
Max
Min
Nom
Max
0.91
-
1.10
0.036
-
0.043
0.01
-
0.10
0.0004
-
0.004
0.90
-
1.00
0.035
0.038
0.039
0.30
0.32
0.45
0.012
0.013
0.018
0.10
0.15
0.20
0.004
0.006
0.008
2.95
3.05
3.10
0.116
0.120
0.122
2.70
2.85
2.98
0.106
0.112
0.117
1.55
1.65
1.70
0.061
0.065
0.067
0.95 BSC
0.0374 BSC
1.80
1.90
2.00
0.071
0.075
0.079
0.32
-
0.50
0.012
-
0.020
0.60 Ref
0.024 Ref
0.25 BSC
0.010 BSC
0.10
-
-
0.004
-
-
0
4
8
0
4
8
7 Nom
1
ECN: C-06593-Rev. I, 18-Dec-06
DWG: 5540
Document Number: 71200
18-Dec-06
INCHES
7 Nom
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1
AN823
Vishay Siliconix
Mounting LITTLE FOOTR TSOP-6 Power MOSFETs
Surface mounted power MOSFET packaging has been based on
integrated circuit and small signal packages. Those packages
have been modified to provide the improvements in heat transfer
required by power MOSFETs. Leadframe materials and design,
molding compounds, and die attach materials have been
changed. What has remained the same is the footprint of the
packages.
The basis of the pad design for surface mounted power MOSFET
is the basic footprint for the package. For the TSOP-6 package
outline drawing see http://www.vishay.com/doc?71200 and see
http://www.vishay.com/doc?72610 for the minimum pad footprint.
In converting the footprint to the pad set for a power MOSFET, you
must remember that not only do you want to make electrical
connection to the package, but you must made thermal connection
and provide a means to draw heat from the package, and move it
away from the package.
In the case of the TSOP-6 package, the electrical connections are
very simple. Pins 1, 2, 5, and 6 are the drain of the MOSFET and
are connected together. For a small signal device or integrated
circuit, typical connections would be made with traces that are
0.020 inches wide. Since the drain pins serve the additional
function of providing the thermal connection to the package, this
level of connection is inadequate. The total cross section of the
copper may be adequate to carry the current required for the
application, but it presents a large thermal impedance. Also, heat
spreads in a circular fashion from the heat source. In this case the
drain pins are the heat sources when looking at heat spread on the
PC board.
Since surface mounted packages are small, and reflow soldering
is the most common form of soldering for surface mount
components, “thermal” connections from the planar copper to the
pads have not been used. Even if additional planar copper area is
used, there should be no problems in the soldering process. The
actual solder connections are defined by the solder mask
openings. By combining the basic footprint with the copper plane
on the drain pins, the solder mask generation occurs automatically.
A final item to keep in mind is the width of the power traces. The
absolute minimum power trace width must be determined by the
amount of current it has to carry. For thermal reasons, this
minimum width should be at least 0.020 inches. The use of wide
traces connected to the drain plane provides a low impedance
path for heat to move away from the device.
REFLOW SOLDERING
Vishay Siliconix surface-mount packages meet solder reflow
reliability requirements. Devices are subjected to solder reflow as a
test preconditioning and are then reliability-tested using
temperature cycle, bias humidity, HAST, or pressure pot. The
solder reflow temperature profile used, and the temperatures and
time duration, are shown in Figures 2 and 3.
Figure 1 shows the copper spreading recommended footprint for
the TSOP-6 package. This pattern shows the starting point for
utilizing the board area available for the heat spreading copper. To
create this pattern, a plane of copper overlays the basic pattern on
pins 1,2,5, and 6. The copper plane connects the drain pins
electrically, but more importantly provides planar copper to draw
heat from the drain leads and start the process of spreading the
heat so it can be dissipated into the ambient air. Notice that the
planar copper is shaped like a “T” to move heat away from the
drain leads in all directions. This pattern uses all the available area
underneath the body for this purpose.
0.167
4.25
0.074
1.875
0.014
0.35
0.122
3.1
0.026
0.65
0.049
1.25
0.049
1.25
0.010
0.25
FIGURE 1. Recommended Copper Spreading Footprint
Document Number: 71743
27-Feb-04
Ramp-Up Rate
+6_C/Second Maximum
Temperature @ 155 " 15_C
120 Seconds Maximum
Temperature Above 180_C
70 − 180 Seconds
Maximum Temperature
240 +5/−0_C
Time at Maximum Temperature
20 − 40 Seconds
Ramp-Down Rate
+6_C/Second Maximum
FIGURE 2. Solder Reflow Temperature Profile
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AN823
Vishay Siliconix
10 s (max)
255 − 260_C
1X4_C/s (max)
3-6_C/s (max)
217_C
140 − 170_C
60 s (max)
60-120 s (min)
Pre-Heating Zone
3_C/s (max)
Reflow Zone
Maximum peak temperature at 240_C is allowed.
FIGURE 3. Solder Reflow Temperature and Time Durations
THERMAL PERFORMANCE
TABLE 1.
Equivalent Steady State Performance—TSOP-6
Thermal Resistance Rqjf
30_C/W
On-Resistance vs. Junction Temperature
1.6
VGS = 4.5 V
ID = 6.1 A
1.4
rDS(on) − On-Resiistance
(Normalized)
A basic measure of a device’s thermal performance is the
junction-to-case thermal resistance, Rqjc, or the
junction-to-foot thermal resistance, Rqjf. This parameter is
measured for the device mounted to an infinite heat sink and
is therefore a characterization of the device only, in other
words, independent of the properties of the object to which the
device is mounted. Table 1 shows the thermal performance
of the TSOP-6.
1.2
1.0
0.8
0.6
−50
SYSTEM AND ELECTRICAL IMPACT OF
TSOP-6
−25
0
25
50
75
100
125
150
TJ − Junction Temperature (_C)
FIGURE 4. Si3434DV
In any design, one must take into account the change in
MOSFET rDS(on) with temperature (Figure 4).
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Document Number: 71743
27-Feb-04
Application Note 826
Vishay Siliconix
RECOMMENDED MINIMUM PADS FOR TSOP-6
0.099
0.039
0.020
0.019
(1.001)
(0.508)
(0.493)
0.064
(1.626)
0.028
(0.699)
(3.023)
0.119
(2.510)
Recommended Minimum Pads
Dimensions in Inches/(mm)
Return to Index
APPLICATION NOTE
Return to Index
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Document Number: 72610
Revision: 21-Jan-08
Legal Disclaimer Notice
Vishay
Disclaimer
ALL PRODUCT, PRODUCT SPECIFICATIONS AND DATA ARE SUBJECT TO CHANGE WITHOUT NOTICE TO IMPROVE
RELIABILITY, FUNCTION OR DESIGN OR OTHERWISE.
Vishay Intertechnology, Inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectively,
“Vishay”), disclaim any and all liability for any errors, inaccuracies or incompleteness contained in any datasheet or in any other
disclosure relating to any product.
Vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or
the continuing production of any product. To the maximum extent permitted by applicable law, Vishay disclaims (i) any and all
liability arising out of the application or use of any product, (ii) any and all liability, including without limitation special,
consequential or incidental damages, and (iii) any and all implied warranties, including warranties of fitness for particular
purpose, non-infringement and merchantability.
Statements regarding the suitability of products for certain types of applications are based on Vishay’s knowledge of typical
requirements that are often placed on Vishay products in generic applications. Such statements are not binding statements
about the suitability of products for a particular application. It is the customer’s responsibility to validate that a particular
product with the properties described in the product specification is suitable for use in a particular application. Parameters
provided in datasheets and/or specifications may vary in different applications and performance may vary over time. All
operating parameters, including typical parameters, must be validated for each customer application by the customer’s
technical experts. Product specifications do not expand or otherwise modify Vishay’s terms and conditions of purchase,
including but not limited to the warranty expressed therein.
Except as expressly indicated in writing, Vishay products are not designed for use in medical, life-saving, or life-sustaining
applications or for any other application in which the failure of the Vishay product could result in personal injury or death.
Customers using or selling Vishay products not expressly indicated for use in such applications do so at their own risk and agree
to fully indemnify and hold Vishay and its distributors harmless from and against any and all claims, liabilities, expenses and
damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that Vishay
or its distributor was negligent regarding the design or manufacture of the part. Please contact authorized Vishay personnel to
obtain written terms and conditions regarding products designed for such applications.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted by this document or by
any conduct of Vishay. Product names and markings noted herein may be trademarks of their respective owners.
Document Number: 91000
Revision: 11-Mar-11
www.vishay.com
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