RENESAS M62363FP

M62363FP
8-bit 8ch D/A Converter
REJ03D0874-0301
Rev.3.01
Apr 15, 2008
Description
The M62363FP is an integrated circuit semiconductor of CMOS structured with 8 channels of built-in 8-bit
multiplication type D/A converters.
The input data is a easy-to-use 3-wire serial method and it is able to cascading serial use with DO terminal.
The device is suited for use in automatic adjustment combination of microcomputer.
Features
• Digital data transfer method: 3-wire serial data transfer method
• D/A converter system
Employment of the additional higher-order segment R-2R method doubled precision compared to the conventional
R-2R method.
• Short setting time
• 4 quadrant multiplication
Application
Conversion from digital control data to analog control data for home-use and industrial equipment.
Automatic adjustment by combination with EEPROM and microcomputer. (Replacement of conventional half-fixed
resistor.)
Signal gain control of display-monitor or CTV
Block Diagram
VDD
5
DI 8
CLK 7
12-bit shift register
D0
D1
D2
D3
D4
D5
D6
D7
17 Do
D8
D9 D10 D11
6 LD
Address decoder
RESET 19
8-bit latch
............................
8-bit latch
D/A converter
............................
D/A converter
18 VDAref
1
VIN1
2
VO1
REJ03D0874-0301 Rev.3.01 Apr 15, 2008
Page 1 of 9
............................
24
VIN8
23
VO8
20
GND
M62363FP
Pin Arrangement
M62363FP
VIN1
1
24 VIN8
VO1
2
23 VO8
VO2
3
22 VO7
VIN2
4
21 VIN7
VDD
5
20 GND
LD
6
19 RESET
CLK
7
18 VDAref
DI
8
17 Do
VIN3
9
16 VIN6
VO3 10
15 VO6
VO4 11
14 VO5
VIN4 12
13 VIN5
(Top view)
Outline: PRSP0024GA-A (24P2Q-A)
Pin Description
Pin No.
8
17
7
6
19
2
3
10
11
14
15
22
23
5
20
1
4
9
12
13
16
21
24
18
Pin Name
DI
DO
CLK
LD
RESET
VO1
VO2
VO3
VO4
VO5
VO6
VO7
VO8
VDD
GND
VIN1
VIN2
VIN3
VIN4
VIN5
VIN6
VIN7
VIN8
VDAref
Function
Serial data input terminal
Serial data output terminal
Serial clock input terminal
LD terminal input high level then latch circuit data load
Reset terminal
8-bit resolution D/A output
Power supply terminal
GND terminal
D/A converter input terminal
D/A converter reference voltage input terminal
VO = (VIN – VDAref) × n / 256 + VDAref
REJ03D0874-0301 Rev.3.01 Apr 15, 2008
Page 2 of 9
M62363FP
Absolute Maximum Ratings
Item
Supply voltage
Input voltage
Input voltage
Output voltage
D/A reference voltage
Operating temperature
Storage temperature
Symbol
VDD
VIND
VIN
VO
VDAref
Topr
Tstg
Ratings
–0.3 to +7.0
–0.3 to +7.0
–0.3 to VDD + 0.3
–0.3 to VDD + 0.3
–0.3 to VDD + 0.3
–20 to +75
–40 to +125
Unit
V
V
V
V
V
°C
°C
Electrical Characteristics
<Digital Part>
(VDD, VIN = +5 V ± 10%, VDD ≥ VIN, GND = VDAref = 0 V, Ta = –20 to +75°C, unless otherwise noted.)
Item
Symbol
Min
Limits
Typ
Max
Unit
Supply voltage
VDD
4.5
5.0
5.5
V
Input leak current
Input low voltage
IILK
VIL
–10
—
—
—
10
0.2 VDD
μA
V
Input high voltage
Output low voltage
Output high voltage
VIH
VOL
VOH
0.8 VDD
—
VDD – 0.4
—
—
—
—
0.4
—
V
V
V
Conditions
VIN = 0 to VDD
IOL = 2.5 mA
IOH = –400 μA
<Analog Part>
(VDD, VIN = +5 V ± 10%, VDD ≥ VIN, GND = VDAref = 0 V, Ta = –20 to +75°C, unless otherwise noted.)
Item
Symbol
Min
Limits
Typ
Max
Unit
Conditions
—
—
0.30
mA
VIN = 5 V, VDAref = 0 V
Proportional to Max. input current
condition (VIN – VDAref) and digital
data of each cannels
VIN1 to VIN8 = 5 V, VDAref = 0 V
Proportional to Max. input current
condition (VIN – VDAref) and digital
data of each channels
Constant for all D/A output mode
Input current
IIN
D/A reference input current
IDAref
–2.40
—
—
mA
Output impedance
Resolution
Differential nonlinearity
RO
RES
DNL
—
—
–1
—
8
—
50
—
1
kΩ
bit
LSB
Nonlinearity
NL
–1
—
1
LSB
REJ03D0874-0301 Rev.3.01 Apr 15, 2008
Page 3 of 9
M62363FP
AC Characteristics
(VDD, VIN = +5 V ± 10%, VDD ≥ VIN, GND = VDAref = 0 V, Ta = –20 to +75°C, unless otherwise noted.)
Item
Symbol
Clock "L" pulse width
Clock "H" pulse width
Clock rise time
Clock fall time
Data setup time
Data hold time
LD setup time
LD hold time
LD "H" pulse width
Data output delay time
D/A output setting time
Input/output replay time
tCKL
tCKH
tCR
tCF
tDCH
tCHD
tCHL
tLDC
tLDH
tDO
tLDD
—
Min
Limits
Typ
Max
Unit
200
200
—
—
60
100
200
100
100
70
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
200
200
—
—
—
—
—
350
5
5
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
μs
Timing Chart
tCR
CLK
tCKH
tCF
tCKL
DI
tDCH
tCHD
tLDH
tLDC
tCHL
LD
tLDD
D/A output
tDO
DO output
REJ03D0874-0301 Rev.3.01 Apr 15, 2008
Page 4 of 9
Conditions
Less than CL = 100 pF
Without load
f = 10 kHz
M62363FP
Digital Data Format
12-bit serial data
1
DATA
2
3
D11 D10 D9
4
5
6
7
8
9
10
11
(LSB)
12
D8
D7
D6
D5
D4
D3
D2
D1
D0
CLK
Data assignment
D0
(LSB)
D1
D2
D3
D4
D5
D6
D8
D9
D10
D7
(MSB)
D11
: DAC data
: DAC select data
DAC Data
(LSB)
D0
D1
D2
D3
D4
D5
0
1
0
1
:
1
0
0
1
1
:
1
0
0
0
0
:
1
0
0
0
0
:
1
0
0
0
0
:
1
0
0
0
0
:
1
(MSB)
D6
D7
0
0
0
0
:
1
0
0
0
0
:
1
D/A Output
VDAref
(VIN – VDAref) / 256 × 1 + VDAref
(VIN – VDAref) / 256 × 2 + VDAref
(VIN – VDAref) / 256 × 3 + VDAref
:
(VIN – VDAref) / 256 × 255 + VDAref
DAC Select Data
D8
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
D9
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
D10
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
D11
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
REJ03D0874-0301 Rev.3.01 Apr 15, 2008
Page 5 of 9
DAC Selection
Don't care
VO1 selection
VO2 selection
VO3 selection
VO4 selection
VO5 selection
VO6 selection
VO7 selection
VO8 selection
Don't care
Don't care
Don't care
Don't care
Don't care
Don't care
Don't care
M62363FP
Timing Chart (Model)
RESET
MSB
DI
D11
LSB
D10
CLK
D9
............
D0
............
LD
Vo
Note:
Input data is carried out LD signal low besides CLK signal positive edge. CLK, LD, is keep generally
high level.
REJ03D0874-0301 Rev.3.01 Apr 15, 2008
Page 6 of 9
M62363FP
Operating Description
VDD
GND
DI
12-bit
shift register
CLK
8
Do
4
RESET
Decoder
LD
VIN1
ch1 latch
R+2R ladder
VO1
VIN2
ch2 latch
R+2R ladder
VO2
VIN3
ch3 latch
R+2R ladder
VO3
VIN4
ch4 latch
R+2R ladder
VO4
VIN5
ch5 latch
R+2R ladder
VO5
VIN6
ch6 latch
R+2R ladder
VO6
VIN7
ch7 latch
R+2R ladder
VO7
VIN8
ch8 latch
R+2R ladder
VDAref
VO8
+
−
OP1
OP2
× 2.4
2.5 V
R
Note:
+
−
R
ch1 to ch7 becomes multiplication type D/A converter action of 0 to 5 V range by each output adds
OP1.
ch8 become 4 quadrant multiplication of 0 to 12 V range at 6 V center by add OP1 and OP2 to this
channel.
REJ03D0874-0301 Rev.3.01 Apr 15, 2008
Page 7 of 9
M62363FP
1. The value of VO depend on output direct buffer.
n
VO = (VIN – VDAref) • 256 + VDAref… (n = 0 to 255) …(1)
<VIN = 5 V>
<VIN = 0 V>
n
0
128
255
VO
0
3.75
4.99
n
0
128
255
VO
2.5
1.25
0.01
2. The value of VO depend on application of ch8.
n
VOP1 = (VIN – VDAref) • (128 – 1) + VDAref… (n = 0 to 255) …(2)
VOP2 = VOP1 × 2.4 ……………………………………………. (3)
<VIN = 5 V>
<VIN = 0 V>
n
0
128
255
VOP1
0
2.50
4.98
n
0
128
255
VOP1
5.00
2.50
0.02
n
0
128
255
VOP1
0
6.00
11.95
n
0
128
255
VOP1
12.00
6.00
0.05
Application Example of Cascade Connection
DI
Micro
computer
CLK
LD
LD CLK DI
DO
LD CLK
DI
VIN1
VO1
ch1
VIN1
VO1
ch9
VIN8
VO8
ch8
VIN8
VO8
+
VDAref
−
VDAref
2.5 V
Note:
In this example, M62363 × 2 are connected in cascade.
A 24-bit input data can be used to automatically control up to 16 channels.
REJ03D0874-0301 Rev.3.01 Apr 15, 2008
Page 8 of 9
+
−
ch16
M62363FP
Package Dimensions
JEITA Package Code
P-SSOP24-5.3x10.1-0.80
RENESAS Code
PRSP0024GA-A
Previous Code
24P2Q-A
MASS[Typ.]
0.2g
E
13
*1
HE
24
NOTE)
1. DIMENSIONS "*1" AND "*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION "*3" DOES NOT
INCLUDE TRIM OFFSET.
F
1
12
Index mark
c
A2
A1
D
L
A
*2
*3
e
y
bp
Detail F
REJ03D0874-0301 Rev.3.01 Apr 15, 2008
Page 9 of 9
Reference Dimension in Millimeters
Symbol
D
E
A2
A
A1
bp
c
HE
e
y
L
Min Nom Max
10.0 10.1 10.2
5.2 5.3 5.4
1.8
2.1
0.1 0.2
0
0.3 0.35 0.45
0.18 0.2 0.25
0°
8°
7.5 7.8 8.1
0.65 0.8 0.95
0.10
0.4 0.6 0.8
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Colophon .7.2