HEF4794B-Q100 8-stage shift-and-store register LED driver Rev. 1 — 7 August 2012 Product data sheet 1. General description The HEF4794B-Q100 is an 8-stage serial shift register. It has a storage latch associated with each stage for strobing data from the serial input (D) to the parallel LED driver outputs (QP0 to QP7). Data is shifted on the positive-going clock (CP) transitions. The data in each shift register stage is transferred to the storage register when the strobe input (STR) is HIGH. Data in the storage register appears at the outputs whenever the output enable input (OE) signal is HIGH. Two serial outputs (QS1 and QS2) are available for cascading a number of HEF4794B-Q100 devices. Serial data is available at QS1 on positive-going clock edges to allow high-speed operation in cascaded systems with a fast clock rise time. The same serial data is available at QS2 on the next negative going clock edge. This is used for cascading HEF4794B-Q100 devices when the clock has a slow rise time. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Connect unused inputs to VDD, VSS, or another input. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2. Features and benefits Automotive product qualification in accordance with AEC-Q100 (Grade 1) Specified from 40 C to +85 C and from 40 C to +125 C Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics ESD protection: MIL-STD-833, method 3015 exceeds 2000 V HBM JESD22-A114F exceeds 2000 V MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 ) Complies with JEDEC standard JESD 13-B 3. Ordering information Table 1. Ordering information All types operate from 40 C to +125 C. Type number HEF4794BT-Q100 Package Name Description Version SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 HEF4794B-Q100 NXP Semiconductors 8-stage shift-and-store register LED driver 4. Functional diagram 3 1 CP STR QS1 9 QS2 10 QP0 4 QP1 5 QP2 6 QP3 7 QP4 14 QP5 13 QP6 12 QP7 11 2 D CP 9 STR 2 10 8-STAGE SHIFT REGISTER 3 1 8-BIT STORAGE REGISTER 15 OPEN-DRAIN OUTPUTS QS1 D OE 4 5 QP0 6 7 QP2 QP1 14 13 QP4 QP3 12 11 QP6 QP5 QP7 OE 15 Fig 1. QS2 001aaf111 Logic symbol Fig 2. STAGE 0 D 001aag798 STAGES 1 TO 6 Q D Functional diagram D STAGE 7 Q CP D QS1 Q CP FF 0 D FF 7 CP CP Q QS2 LE LATCH D Q D Q LE LE LATCH 0 LATCH 7 STR OE QP2 QP0 QP1 Fig 3. QP4 QP3 001aag799 QP6 QP5 QP7 Logic diagram HEF4794B_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 7 August 2012 © NXP B.V. 2012. All rights reserved. 2 of 17 HEF4794B-Q100 NXP Semiconductors 8-stage shift-and-store register LED driver 5. Pinning information 5.1 Pinning +()%4 675 9'' ' 2( &3 43 43 43 43 43 43 43 43 46 966 46 DDD Fig 4. Pin configuration 5.2 Pin description Table 2. Pin description Symbol Pin Description D 2 serial input QP0 to QP7 4, 5, 6, 7, 14, 13, 12, 11 parallel output QS1 9 serial output QS2 10 serial output CP 3 clock input STR 1 strobe input OE 15 output enable input VDD 16 supply voltage VSS 8 ground (0 V) HEF4794B_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 7 August 2012 © NXP B.V. 2012. All rights reserved. 3 of 17 HEF4794B-Q100 NXP Semiconductors 8-stage shift-and-store register LED driver 6. Functional description Table 3. Function table[1] Input Parallel output Serial output CP OE STR D QP0 QPn QS1[2] QS2[3] L X X Z Z Q6S no change L X X Z Z n.c. Q7S H L X no change no change Q6S no change H H L Z QPn 1 Q6S no change H H H L QPn 1 Q6S no change H H H no change no change no change Q7S [1] H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state; = LOW-to-HIGH clock transition; = HIGH-to-LOW clock transition. [2] Q6S = the data in register stage 6 before the LOW to HIGH clock transition. [3] Q7S = the data in register stage 7 before the HIGH to LOW clock transition. clock input data input strobe input output enable input internal Q0S (FF0) Z-state QP0 output internal Q6S (FF6) Z-state QP6 output serial QS1 output serial QS2 output 001aag801 Fig 5. Timing diagram HEF4794B_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 7 August 2012 © NXP B.V. 2012. All rights reserved. 4 of 17 HEF4794B-Q100 NXP Semiconductors 8-stage shift-and-store register LED driver 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDD supply voltage IIK input clamping current VI input voltage IOK output clamping current II input leakage current IO output current Conditions VI < 0.5 V or VI > VDD + 0.5 V QSn outputs; VO < 0.5 V or VO > VDD + 0.5 V QPn outputs; VO < 0.5 V Min Max Unit 0.5 +18 V - 10 mA 0.5 VDD + 0.5 V - 10 mA - 40 mA - 10 mA QSn outputs - 10 mA QPn outputs - 40 mA Tstg storage temperature 65 +150 C Tamb ambient temperature 40 +125 C - 500 mW - 100 mW Ptot total power dissipation Tamb = 40 C to +125 C P power dissipation per output [1] [1] For SO16 package: Ptot derates linearly with 8 mW/K above 70 C. 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Min Max Unit VDD VI supply voltage 3 15 V input voltage 0 VDD V Tamb ambient temperature in free air 40 +125 C t/V input transition rise and fall rate VDD = 5 V - 3.75 s/V HEF4794B_Q100 Product data sheet Conditions VDD = 10 V - 0.5 s/V VDD = 15 V - 0.08 s/V All information provided in this document is subject to legal disclaimers. Rev. 1 — 7 August 2012 © NXP B.V. 2012. All rights reserved. 5 of 17 HEF4794B-Q100 NXP Semiconductors 8-stage shift-and-store register LED driver 9. Static characteristics Table 6. Static characteristics VSS = 0 V; VI = VSS or VDD; unless otherwise specified. Symbol Parameter VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage Conditions IO < 1 A HIGH-level output voltage QSn outputs; IO < 1 A LOW-level output voltage QSn outputs; IO < 1 A IOL HIGH-level output current LOW-level output current Min Max Max Min Max 5V 3.5 - 3.5 - 3.5 - 3.5 - V 7.0 - 7.0 - 7.0 - 7.0 - V 15 V 11.0 - 11.0 - 11.0 - 11.0 - V 5V - 1.5 - 1.5 - 1.5 - 1.5 V 10 V - 3.0 - 3.0 - 3.0 - 3.0 V 15 V - 4.0 - 4.0 - 4.0 - 4.0 V 5V 4.95 - 4.95 - 4.95 - 4.95 - V 10 V 9.95 - 9.95 - 9.95 - 9.95 - V 15 V 14.95 - 14.95 - 14.95 - 14.95 - V 5V - 0.05 - 0.05 - 0.05 - 0.05 V 10 V - 0.05 - 0.05 - 0.05 - 0.05 V 15 V - 0.05 - 0.05 - 0.05 - 0.05 V 5V - 0.75 - 0.75 - 1.5 - 1.5 V 10 V - 0.75 - 0.75 - 1.5 - 1.5 V 15 V - 0.75 - 0.75 - 1.5 - 1.5 V mA 5V - 1.7 - 1.4 - 1.1 - 1.1 - 0.64 - 0.5 - 0.36 - 0.36 mA VO = 9.5 V 10 V - 1.6 - 1.3 - 0.9 - 0.9 mA VO = 13.5 V 15 V - 4.2 - 3.4 - 2.4 - 2.4 mA VO = 0.4 V 5V 0.64 - 0.5 - 0.36 - 0.36 - mA VO = 0.5 V 10 V 1.6 - 1.3 - 0.9 - 0.9 - mA VO = 1.5 V 15 V 4.2 - 3.4 - 2.4 - 2.4 - mA 15 V - 0.1 - 0.1 - 1.0 - 1.0 A 5V - 2 - 2 - 15 - 15 A 10 V - 2 - 2 - 15 - 15 A 15 V - 2 - 2 - 15 - 15 A 5V - 5 - 5 - 150 - 150 A 10 V - 10 - 10 - 300 - 300 A 15 V - 20 - 20 - 600 - 600 A - - - - - 7.5 - - - pF QSn outputs QPn output is HIGH; VO = 15 V supply current IO = 0 A Product data sheet Max 5V OFF-state output current HEF4794B_Q100 Min Min VO = 4.6 V IOZ input capacitance Tamb = 85 C Tamb = 125 C Unit VO = 2.5 V input leakage current CI Tamb = 25 C QSn outputs II IDD Tamb = 40 C 10 V IO < 1 A QPn outputs; IO < 20 mA IOH VDD All information provided in this document is subject to legal disclaimers. Rev. 1 — 7 August 2012 © NXP B.V. 2012. All rights reserved. 6 of 17 HEF4794B-Q100 NXP Semiconductors 8-stage shift-and-store register LED driver 10. Dynamic characteristics Table 7. Dynamic characteristics VSS = 0 V; Tamb = 25 C unless otherwise specified. For test circuit, see Figure 10. Symbol tPHL Parameter HIGH to LOW propagation delay Conditions CP to QS1; see Figure 6 CP to QS2; see Figure 6 VDD Extrapolation formula Min Typ Max Unit 132 ns + (0.55 ns/pF)CL - 160 320 ns 10 V 53 ns + (0.23 ns/pF)CL - 65 130 ns 15 V 37 ns + (0.16 ns/pF)CL - 45 90 ns 5V 92 ns + (0.55 ns/pF)CL - 120 240 ns 10 V 39 ns + (0.23 ns/pF)CL - 50 100 ns 5V [1] 32 ns + (0.16 ns/pF)CL - 40 80 ns 102 ns + (0.55 ns/pF)CL - 130 260 ns 10 V 44 ns + (0.23 ns/pF)CL - 55 110 ns 15 V 32 ns + (0.16 ns/pF)CL - 40 80 ns 15 V tPLH LOW to HIGH propagation delay CP to QS1; see Figure 6 CP to QS2; see Figure 6 tPZL OFF-state to LOW propagation delay CP to QPn; see Figure 6 STR to QPn; see Figure 7 tPLZ LOW to OFF-state propagation delay CP to QPn; see Figure 6 STR to QPn; see Figure 7 5V [1] 5V 102 ns + (0.55 ns/pF)CL - 130 260 ns 10 V 49 ns + (0.23 ns/pF)CL - 60 120 ns 15 V 37 ns + (0.16 ns/pF)CL - 45 90 ns 5V - 240 480 ns 10 V - 80 160 ns 15 V - 55 110 ns 5V - 140 280 ns 10 V - 70 140 ns 15 V - 55 110 ns 5V - 170 340 ns 10 V - 75 150 ns 15 V - 60 120 ns 5V - 100 200 ns 10 V - 40 100 ns - 35 70 ns - 100 200 ns 10 V - 55 110 ns 15 V - 50 100 ns - 80 160 ns - 40 80 ns 15 V ten tdis enable time disable time OE to QPn; see Figure 8 OE to QPn; see Figure 8 5V 5V [2] [2] 10 V 15 V tt transition time QS1, QS2; see Figure 6 5V 10 V 15 V HEF4794B_Q100 Product data sheet [1] [3] - 30 60 ns 35 ns + (1.00 ns/pF)CL - 85 170 ns 19 ns + (0.42 ns/pF)CL - 40 80 ns 16 ns + (0.28 ns/pF)CL - 30 60 ns All information provided in this document is subject to legal disclaimers. Rev. 1 — 7 August 2012 © NXP B.V. 2012. All rights reserved. 7 of 17 HEF4794B-Q100 NXP Semiconductors 8-stage shift-and-store register LED driver Table 7. Dynamic characteristics …continued VSS = 0 V; Tamb = 25 C unless otherwise specified. For test circuit, see Figure 10. Symbol Parameter Conditions VDD tW pulse width CP; LOW and HIGH; see Figure 6 STR; HIGH; see Figure 7 set-up time tsu hold time th fclk(max) maximum clock frequency D to CP; see Figure 9 D to CP; see Figure 9 CP; see Figure 6 Extrapolation formula Min Typ Max Unit 5V 60 30 - ns 10 V 30 15 - ns 15 V 24 12 - ns 5V 80 40 - ns 10 V 60 30 - ns 15 V 24 12 - ns 5V 60 30 - ns 10 V 20 10 - ns 15 V 15 5 - ns 5V +5 15 - ns 10 V 20 5 - ns 15 V 20 5 - ns 5V 5 10 - MHz 10 V 11 22 - MHz 15 V 14 28 - MHz [1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF). [2] ten is the same as tPZL and tdis is the same as tPLZ [3] tt is the same as tTLH and tTHL Table 8. Dynamic power dissipation PD can be calculated from the formulas shown. VSS = 0 V; tr = tf 20 ns; Tamb = 25 C. Symbol Parameter PD VDD Typical formula Where PD = 1200 fi + (fo CL) VDD2 10 V PD = 5550 fi + (fo CL) VDD2 15 V PD = 15000 fi + (fo CL) VDD W dynamic power dissipation 5 V W fi = input frequency in MHz; W fo = output frequency in MHz; 2 CL = output load capacitance in pF; (fo CL) = sum of the outputs; VDD = supply voltage in V. HEF4794B_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 7 August 2012 © NXP B.V. 2012. All rights reserved. 8 of 17 HEF4794B-Q100 NXP Semiconductors 8-stage shift-and-store register LED driver 11. Waveforms 1/fclk(max) VI VM CP input VSS tW tW tPLZ tPZL VDD VY QPn output VX VOL tPLH VOH tPHL 90 % VM QS1 output VOL 10 % tTHL tTLH tPLH VOH tPHL 90 % VM QS2 output 10 % VOL tTLH tTHL 001aag222 Parallel output measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig 6. Propagation delay clock (CP) to output (QPn, QS1, QS2), clock pulse width and maximum clock frequency Table 9. Measurement points Supply Input Output VDD VM VM VX VY 5 V to 15 V 0.5VDD 0.5VDD 0.1VO 0.9VO VI VM CP input VSS VI STR input VM VSS VDD tW tPLZ tPZL VY QPn output VOL VX 001aag802 Measurement points are given in Table 9. VOL is the typical output voltage level that occurs with the output load. Fig 7. Strobe (STR) to output (QPn) propagation delays and the strobe pulse width HEF4794B_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 7 August 2012 © NXP B.V. 2012. All rights reserved. 9 of 17 HEF4794B-Q100 NXP Semiconductors 8-stage shift-and-store register LED driver VI OE input VM VSS tPLZ tPZL VDD output LOW to OFF-state OFF-state to LOW VOL VY VX outputs enabled outputs disabled outputs enabled 001aag803 Measurement points are given in Table 9. VOL is the typical output voltage level that occurs with the output load. Fig 8. Enable and disable times for input OE VI CP input VM VSS tsu tsu th th VI VM D input VSS VDD QPn output VOL 001aag805 Measurement points are given in Table 9. The shaded areas indicate when the input is permitted to change for predictable output performance. VOL is the typical output voltage level that occurs with the output load. Fig 9. Set-up and hold times for the data input (D) HEF4794B_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 7 August 2012 © NXP B.V. 2012. All rights reserved. 10 of 17 HEF4794B-Q100 NXP Semiconductors 8-stage shift-and-store register LED driver VI 90 % input pulse VSS 10 % tf tr VEXT VDD G VI VO RL DUT CL RT 001aag804 Test data is given in Table 10. Definitions for test circuit: DUT - Device Under Test. RL = Load resistance. CL = load capacitance. RT = Termination resistance should be equal to output impedance of Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig 10. Test circuit for measuring switching times Table 10. Test data Supply Input VDD VI tr, tf tPLZ, tPZL tPLH, tPHL CL RL 5 V to 15 V VDD 20 ns VDD open 50 pF 1 k HEF4794B_Q100 Product data sheet VEXT Load All information provided in this document is subject to legal disclaimers. Rev. 1 — 7 August 2012 © NXP B.V. 2012. All rights reserved. 11 of 17 HEF4794B-Q100 NXP Semiconductors 8-stage shift-and-store register LED driver 12. Application information Application example: serial-to-parallel data converting LED drivers. 9'' 9'' 43 +()%4 ' 2( 3:0 GLPPHULQSXW 675 &3 43 6 43 +()%4 ' 2( 675 43 6 &3 &21752/ $1' 6<1& &,5&8,75< DDD GDWD FORFN IURPUHPRWH FRQWUROSDQHO Fig 11. Serial-to-parallel converting LED drivers HEF4794B_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 7 August 2012 © NXP B.V. 2012. All rights reserved. 12 of 17 HEF4794B-Q100 NXP Semiconductors 8-stage shift-and-store register LED driver 13. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e 0 detail X w M bp 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.039 0.016 0.028 0.020 inches 0.010 0.057 0.069 0.004 0.049 0.16 0.15 0.05 0.244 0.041 0.228 0.01 0.01 0.028 0.004 0.012 θ 8o o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig 12. Package outline SOT109-1 (SO16) HEF4794B_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 7 August 2012 © NXP B.V. 2012. All rights reserved. 13 of 17 HEF4794B-Q100 NXP Semiconductors 8-stage shift-and-store register LED driver 14. Abbreviations Table 11. Abbreviations Acronym Description HBM Human Body Model ESD ElectroStatic Discharge MM Machine Model MIL Military 15. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes HEF4794B_Q100 v.1 20120807 Product data sheet - - HEF4794B_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 7 August 2012 © NXP B.V. 2012. All rights reserved. 14 of 17 HEF4794B-Q100 NXP Semiconductors 8-stage shift-and-store register LED driver 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 16.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. HEF4794B_Q100 Product data sheet Suitability for use in automotive applications — This NXP Semiconductors product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. All information provided in this document is subject to legal disclaimers. Rev. 1 — 7 August 2012 © NXP B.V. 2012. All rights reserved. 15 of 17 HEF4794B-Q100 NXP Semiconductors 8-stage shift-and-store register LED driver No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] HEF4794B_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 1 — 7 August 2012 © NXP B.V. 2012. All rights reserved. 16 of 17 HEF4794B-Q100 NXP Semiconductors 8-stage shift-and-store register LED driver 18. Contents 1 2 3 4 5 5.1 5.2 6 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 5 Recommended operating conditions. . . . . . . . 5 Static characteristics. . . . . . . . . . . . . . . . . . . . . 6 Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Application information. . . . . . . . . . . . . . . . . . 12 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information. . . . . . . . . . . . . . . . . . . . . 16 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2012. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 7 August 2012 Document identifier: HEF4794B_Q100