ONSEMI NTD4302T4G

NTD4302
Power MOSFET
68 A, 30 V, N−Channel DPAK
Features
•
•
•
•
•
•
•
•
Ultra Low RDS(on)
Higher Efficiency Extending Battery Life
Logic Level Gate Drive
Diode Exhibits High Speed, Soft Recovery
Avalanche Energy Specified
IDSS Specified at Elevated Temperature
DPAK Mounting Information Provided
These Devices are Pb−Free and are RoHS Compliant
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V(BR)DSS
RDS(on) TYP
ID MAX
30 V
7.8 mW @ 10 V
68 A
N−Channel
D
Applications
• DC−DC Converters
• Low Voltage Motor Control
• Power Management in Portable and Battery Powered Products:
G
i.e., Computers, Printers, Cellular and Cordless Telephones,
and PCMCIA Cards
S
MAXIMUM RATINGS (TC = 25°C unless otherwise noted)
Unit
30
Vdc
Gate−to−Source Voltage − Continuous
VGS
±20
Vdc
Thermal Resistance − Junction−to−Case
Total Power Dissipation @ TC = 25°C
Continuous Drain Current @ TC = 25°C (Note 4)
Continuous Drain Current @ TC = 100°C
RqJC
PD
ID
ID
1.65
75
68
43
°C/W
W
A
A
Thermal Resistance − Junction−to−Ambient
(Note 2)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 100°C
Pulsed Drain Current (Note 3)
RqJA
PD
ID
ID
IDM
67
1.87
11.3
7.1
36
°C/W
W
A
A
A
Thermal Resistance − Junction−to−Ambient
(Note 1)
Total Power Dissipation @ TA = 25°C
Continuous Drain Current @ TA = 25°C
Continuous Drain Current @ TA = 100°C
Pulsed Drain Current (Note 3)
RqJA
PD
ID
ID
IDM
120
1.04
8.4
5.3
28
°C/W
W
A
A
A
Operating and Storage Temperature Range
TJ, Tstg
−55 to
150
°C
Single Pulse Drain−to−Source Avalanche
Energy − Starting TJ = 25°C
(VDD = 30 Vdc, VGS = 10 Vdc,
Peak IL = 17 Apk, L = 5.0 mH, RG = 25 W)
EAS
722
mJ
Maximum Lead Temperature for Soldering
Purposes, 1/8 in from case for 10 seconds
TL
260
MARKING DIAGRAMS
& PIN ASSIGNMENTS
4
Drain
4
1 2
3
DPAK
CASE 369C
(Surface Mount)
STYLE 2
2
1
3
Drain
Gate
Source
4
Drain
4
1
DPAK
CASE 369D
(Straight Lead)
STYLE 2
2
3
1 2 3
Gate Drain Source
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. When surface mounted to an FR4 board using the minimum recommended
pad size.
2. When surface mounted to an FR4 board using 0.5 sq. in. drain pad size.
3. Pulse Test: Pulse Width = 300 ms, Duty Cycle = 2%.
4. Current Limited by Internal Lead Wires.
YWW
T
4302G
Value
VDSS
Rating
YWW
T
4302G
Symbol
Drain−to−Source Voltage
Y
WW
T4302
G
= Year
= Work Week
= Device Code
= Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the
package dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2010
October, 2010 − Rev. 8
1
Publication Order Number:
NTD4302/D
NTD4302
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted)
Symbol
Characteristic
Min
Typ
Max
Unit
30
−
−
25
−
−
−
−
−
−
1.0
10
−
−
±100
1.0
−
1.9
−3.8
3.0
−
−
−
−
0.0078
0.0078
0.010
0.010
0.010
0.013
gFS
−
20
−
Mhos
Ciss
−
2050
2400
pF
Coss
−
640
800
Crss
−
225
310
td(on)
−
11
20
tr
−
15
25
td(off)
−
85
130
tf
−
55
90
td(on)
−
11
20
OFF CHARACTERISTICS
Drain−Source Breakdown Voltage
(VGS = 0 Vdc, ID = 250 mA)
Positive Temperature Coefficient
V(BR)DSS
Zero Gate Voltage Drain Current
(VGS = 0 Vdc, VDS = 30 Vdc, TJ = 25°C)
(VGS = 0 Vdc, VDS = 30 Vdc, TJ = 125°C)
IDSS
Gate−Body Leakage Current (VGS = ±20 Vdc, VDS = 0 Vdc)
IGSS
Vdc
mV/°C
mAdc
nAdc
ON CHARACTERISTICS
Gate Threshold Voltage
(VDS = VGS, ID = 250 mAdc)
Negative Temperature Coefficient
VGS(th)
Static Drain−Source On−State Resistance
(VGS = 10 Vdc, ID = 20 Adc)
(VGS = 10 Vdc, ID = 10 Adc)
(VGS = 4.5 Vdc, ID = 5.0 Adc)
RDS(on)
Forward Transconductance (VDS = 15 Vdc, ID = 10 Adc)
Vdc
W
DYNAMIC CHARACTERISTICS
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
(VDS = 24 Vdc, VGS = 0 Vdc,
f = 1.0 MHz)
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
(VDD = 25 Vdc, ID = 1.0 Adc,
VGS = 10 Vdc,
RG = 6.0 W)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
(VDD = 25 Vdc, ID = 1.0 Adc,
VGS = 10 Vdc,
RG = 2.5 W)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
Gate Charge
(VDD = 24 Vdc, ID = 20 Adc,
VGS = 10 Vdc,
RG = 2.5 W)
(VDS = 24 Vdc, ID = 2.0 Adc,
VGS = 10 Vdc)
tr
−
13
20
td(off)
−
55
90
tf
−
40
75
td(on)
−
15
−
tr
−
25
−
td(off)
−
40
−
tf
−
58
−
QT
−
55
80
Qgs (Q1)
−
5.5
−
Qgd (Q2)
−
15
−
−
−
−
0.75
0.90
0.65
1.0
−
−
trr
−
39
65
ta
−
20
−
tb
−
19
−
Qrr
−
0.043
−
ns
ns
ns
nC
BODY−DRAIN DIODE RATINGS (Note 5)
Diode Forward On−Voltage
(IS = 2.3 Adc, VGS = 0 Vdc)
(IS = 20 Adc, VGS = 0 Vdc)
(IS = 2.3 Adc, VGS = 0 Vdc, TJ = 125°C)
Reverse Recovery Time
VSD
(IS = 2.3 Adc, VGS = 0 Vdc,
dIS/dt = 100 A/ms)
Reverse Recovery Stored Charge
5. Indicates Pulse Test: Pulse Width = 300 msec max, Duty Cycle ≤ 2%.
6. Switching characteristics are independent of operating junction temperature.
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2
Vdc
ns
mC
NTD4302
TYPICAL CHARACTERISTICS
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
VGS = 3.8 V
VGS = 4.4 V
VGS = 4.6 V
30
VGS = 5 V
20
VGS = 7 V
VGS = 3.4 V
VGS = 10 V
VGS = 3.2 V
10
0
VDS > = 10 V
ID, DRAIN CURRENT (AMPS)
40
60
TJ = 25°C
VGS = 4 V
VGS = 3.0 V
VGS = 2.8 V
0
1
0.5
1.5
2
2.5
50
40
30
TJ = 25°C
20
TJ = 100°C
TJ = −55°C
10
0
3
2
3
Figure 1. On−Region Characteristics
Figure 2. Transfer Characteristics
ID = 10 A
TJ = 25°C
0.075
0.05
0.015
TJ = 25°C
VGS = 4.5 V
0.01
VGS = 10 V
0.005
0.025
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
0
1.6
2
4
6
8
10
0
0.00E+00
1.00E+01
2.00E+01
3.00E+01
4.00E+01
5.00E+01
6.00E+01
VGS, GATE−TO−SOURCE VOLTAGE (V)
ID, DRAIN CURRENT (AMPS)
Figure 3. On−Resistance vs.
Gate−To−Source Voltage
Figure 4. On−Resistance vs. Drain Current
and Gate Voltage
10000
ID = 18.5 A
VGS = 10 V
VGS = 0 V
TJ = 150°C
1.4
IDSS, LEAKAGE (nA)
1000
1.2
1
0.8
0.6
−50
6
5
VGS, GATE−TO−SOURCE VOLTAGE (V)
0.1
0
4
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
ID, DRAIN CURRENT (AMPS)
50
−25
0
25
50
75
100
125
100
10
1
150
TJ = 100°C
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−To−Source Leakage
Current vs. Voltage
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3
30
NTD4302
6000
VGS = 0 V
TJ = 25°C
5000
C, CAPACITANCE (pF)
Ciss
4000
3000
Crss
Ciss
2000
1000
Coss
Crss
0
10
VGS 0 VDS
10
VGS, GATE−TO−SOURCE− VOLTAGE (V)
12.5
VDS = 0 V
30
QT
10
20
VGS
5
15
Q2
Q1
2.5
0
10
ID = 2 A
TJ = 25°C
0
10
20
30
40
50
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
Qg, TOTAL GATE CHARGE (nC)
Figure 7. Capacitance Variation
Figure 8. Gate−to−Source and
Drain−to−Source Voltage vs. Total Charge
1000
25
IS, SOURCE CURRENT (AMPS)
VDD = 24 V
ID = 18.5 A
VGS = 10 V
t, TIME (ns)
25
VD
7.5
30
20
100
tf
td(off)
tr
10
td(on)
1
10
0
60
VGS = 0 V
TJ = 25°C
20
15
10
5
0
0.5
100
0.6
0.7
0.8
0.9
RG, GATE RESISTANCE (W)
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time Variation
vs. Gate Resistance
Figure 10. Diode Forward Voltage vs. Current
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4
VDS, DRAIN−TO−SOURCE− VOLTAGE (V)
TYPICAL CHARACTERISTICS
1
NTD4302
TYPICAL CHARACTERISTICS
ID , DRAIN CURRENT (AMPS)
100
100 ms
di/dt
1 ms
VGS = 10 V
SINGLE PULSE
TC = 25°C
10
IS
trr
ta
tb
10 ms
TIME
dc
RDS(on) LIMIT
THERMAL LIMIT
PACKAGE LIMIT
0.25 IS
tp
IS
1
0.1
1
10
100
VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS)
Figure 12. Diode Reverse Recovery Waveform
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Rthja(t), EFFECTIVE TRANSIENT
THERMAL RESISTANCE
1000
MOUNTED TO MINIMUM RECOMMENDED FOOTPRINT
DUTY CYCLE
100
D = 0.5
0.2
0.1
0.05
0.02
0.01
10
1
P(pk)
t1
0.1
t2
DUTY CYCLE, D = t1/t2
SINGLE PULSE
RqJA(t) = r(t) RqJA
D CURVES APPLY FOR POWER
PULSE TRAIN SHOWN
READ TIME AT t1
TJ(pk) - TA = P(pk) RqJA(t)
0.01
1E-05
1E-04
1E-03
1E-02
1E-01
t, TIME (seconds)
1E+00
1E+01
1E+02
1E+03
Figure 13. Thermal Response − Various Duty Cycles
ORDERING INFORMATION
Package Type
Package
Shipping†
DPAK
369C
(Pb−Free)
75 Units / Rail
NTD4302−1G
DPAK−3
369D
(Pb−Free)
75 Units / Rail
NTD4302T4G
DPAK
369C
(Pb−Free)
2500 Tape & Reel
Device
NTD4302G
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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5
NTD4302
PACKAGE DIMENSIONS
DPAK (SINGLE GAUGE)
CASE 369C−01
ISSUE D
A
E
b3
c2
B
Z
D
1
L4
A
4
L3
b2
e
2
NOTES:
1. DIMENSIONING AND TOLERANCING PER ASME
Y14.5M, 1994.
2. CONTROLLING DIMENSION: INCHES.
3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD
FLASH, PROTRUSIONS, OR BURRS. MOLD
FLASH, PROTRUSIONS, OR GATE BURRS SHALL
NOT EXCEED 0.006 INCHES PER SIDE.
5. DIMENSIONS D AND E ARE DETERMINED AT THE
OUTERMOST EXTREMES OF THE PLASTIC BODY.
6. DATUMS A AND B ARE DETERMINED AT DATUM
PLANE H.
C
H
DETAIL A
3
DIM
A
A1
b
b2
b3
c
c2
D
E
e
H
L
L1
L2
L3
L4
Z
c
b
0.005 (0.13)
M
H
C
L2
GAUGE
PLANE
C
L
SEATING
PLANE
A1
L1
DETAIL A
ROTATED 905 CW
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
SOLDERING FOOTPRINT*
6.20
0.244
INCHES
MIN
MAX
0.086 0.094
0.000 0.005
0.025 0.035
0.030 0.045
0.180 0.215
0.018 0.024
0.018 0.024
0.235 0.245
0.250 0.265
0.090 BSC
0.370 0.410
0.055 0.070
0.108 REF
0.020 BSC
0.035 0.050
−−− 0.040
0.155
−−−
3.0
0.118
2.58
0.101
5.80
0.228
1.6
0.063
6.172
0.243
SCALE 3:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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6
MILLIMETERS
MIN
MAX
2.18
2.38
0.00
0.13
0.63
0.89
0.76
1.14
4.57
5.46
0.46
0.61
0.46
0.61
5.97
6.22
6.35
6.73
2.29 BSC
9.40 10.41
1.40
1.78
2.74 REF
0.51 BSC
0.89
1.27
−−−
1.01
3.93
−−−
NTD4302
PACKAGE DIMENSIONS
DPAK
CASE 369D−01
ISSUE B
C
B
V
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
E
R
4
Z
A
S
1
2
3
−T−
SEATING
PLANE
K
J
F
D
G
H
3 PL
0.13 (0.005)
M
DIM
A
B
C
D
E
F
G
H
J
K
R
S
V
Z
INCHES
MIN
MAX
0.235 0.245
0.250 0.265
0.086 0.094
0.027 0.035
0.018 0.023
0.037 0.045
0.090 BSC
0.034 0.040
0.018 0.023
0.350 0.380
0.180 0.215
0.025 0.040
0.035 0.050
0.155
−−−
MILLIMETERS
MIN
MAX
5.97
6.35
6.35
6.73
2.19
2.38
0.69
0.88
0.46
0.58
0.94
1.14
2.29 BSC
0.87
1.01
0.46
0.58
8.89
9.65
4.45
5.45
0.63
1.01
0.89
1.27
3.93
−−−
STYLE 2:
PIN 1. GATE
2. DRAIN
3. SOURCE
4. DRAIN
T
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are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
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NTD4302/D