ONSEMI NTMFS4837NHT3G

NTMFS4837NH
Power MOSFET
30 V, 75 A, Single N−Channel, SO−8FL
Features
•
•
•
•
•
Low RDS(on) to Minimize Conduction Losses
Low Capacitance to Minimize Driver Losses
Optimized Gate Charge to Minimize Switching Losses
Low RG
These are Pb−Free Devices*
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V(BR)DSS
RDS(ON) MAX
5.0 mW @ 10 V
30 V
Applications
D (5,6)
MAXIMUM RATINGS (TJ = 25°C unless otherwise stated)
Symbol
Value
Unit
Drain−to−Source Voltage
VDSS
30
V
Gate−to−Source Voltage
Continuous Drain
Current RqJA
(Note 1)
TA = 25°C
TA = 85°C
VGS
ID
±20
16
11.5
V
A
Power Dissipation
RqJA (Note 1)
TA = 25°C
TA = 85°C
PD
2.2
1.15
W
Continuous Drain
Current RqJA
v10 s
TA = 25°C
TA = 85°C
ID
26
18.8
A
Power Dissipation
RqJA v10 s
TA = 25°C
TA = 85°C
PD
5.8
3
W
TA = 25°C
TA = 85°C
ID
10.2
7.3
A
Power Dissipation
RqJA (Note 2)
TA = 25°C
TA = 85°C
PD
0.88
0.46
W
Continuous Drain
Current RqJC
(Note 1)
TC = 25°C
TC = 85°C
ID
75
54
A
Power Dissipation
RqJC (Note 1)
TC = 25°C
TC = 85°C
PD
48
25
W
TA = 25°C
IDM
225
A
TJ,
TSTG
−55 to
+150
°C
IS
40
A
Continuous Drain
Current RqJA
(Note 2)
Pulsed Drain
Current
Steady
State
tp=10 ms
Operating Junction and Storage Temperature
Source Current (Body Diode)
dV/dt
6
V/ns
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 30 V, VGS = 10 V, IL = 31 A,
L = 0.3 mH, RG = 25 W)
EAS
144
mJ
Lead Temperature for Soldering Purposes
(1/8” from case for 10 s)
TL
260
°C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
2. Surface−mounted on FR4 board using the minimum recommended pad size.
May, 2010 − Rev. 4
G (4)
S (1,2,3)
N−CHANNEL MOSFET
MARKING
DIAGRAM
D
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
A
Y
WW
G
S
S
S
G
4837NH
AYWWG
G
D
D
D
= Assembly Location
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
Drain to Source dV/dt
© Semiconductor Components Industries, LLC, 2010
75 A
8.0 mW @ 4.5 V
• Refer to Application Note AND8195/D
• CPU Power Delivery
• DC−DC Converters and Low Side Switching
Parameter
ID MAX
1
ORDERING INFORMATION
Device
Package
Shipping†
NTMFS4837NHT1G
SO−8FL
(Pb−Free)
1500 /
Tape & Reel
NTMFS4837NHT3G
SO−8FL
(Pb−Free)
5000 /
Tape & Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy and
soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference
Manual, SOLDERRM/D.
Publication Order Number:
NTMFS4837NH/D
NTMFS4837NH
THERMAL RESISTANCE MAXIMUM RATINGS
Symbol
Value
Junction−to−Case (Drain)
Parameter
RqJC
2.6
Junction−to−Ambient – Steady State (Note 3)
RqJA
56.6
Junction−to−Ambient – Steady State (Note 4)
RqJA
142
Junction−to−Ambient (tv10 s)
RqJA
21.6
Unit
°C/W
3. Surface−mounted on FR4 board using 1 sq−in pad, 1 oz Cu.
4. Surface−mounted on FR4 board using the minimum recommended pad size.
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Drain−to−Source Breakdown Voltage
V(BR)DSS
VGS = 0 V, ID = 250 mA
30
Drain−to−Source Breakdown Voltage
Temperature Coefficient
V(BR)DSS/
TJ
Typ
Max
Unit
OFF CHARACTERISTICS
Zero Gate Voltage Drain Current
Gate−to−Source Leakage Current
IDSS
V
27.5
VGS = 0 V,
VDS = 24 V
mV/°C
TJ = 25 °C
1
TJ = 125°C
10
IGSS
VDS = 0 V, VGS = ±20 V
VGS(TH)
VGS = VDS, ID = 250 mA
mA
±100
nA
2.5
V
ON CHARACTERISTICS (Note 5)
Gate Threshold Voltage
Negative Threshold Temperature Coefficient
Drain−to−Source On Resistance
Forward Transconductance
VGS(TH)/TJ
RDS(on)
1.5
2.1
5.7
VGS = 10 V to
11.5 V
ID = 30 A
3.7
ID = 15 A
3.7
VGS = 4.5 V
ID = 30 A
6.5
ID = 15 A
6.4
gFS
VDS = 1.5 V, ID = 50 A
mV/°C
5.0
8.0
67
mW
S
CHARGES AND CAPACITANCES
Input Capacitance
CISS
Output Capacitance
COSS
Reverse Transfer Capacitance
CRSS
Total Gate Charge
QG(TOT)
Threshold Gate Charge
QG(TH)
Gate−to−Source Charge
QGS
Gate−to−Drain Charge
QGD
Total Gate Charge
QG(TOT)
VGS = 0 V, f = 1 MHz, VDS = 12 V
VGS = 4.5 V, VDS = 15 V; ID = 30 A
VGS = 11.5 V, VDS = 15 V;
ID = 15 A
2234
3016
450
608
243
375
15.9
23.8
2.8
4.3
6.4
9.5
6.6
9.8
34.4
53
15.2
22.8
27.5
41.3
18.3
27.5
7.1
10.6
pF
nC
nC
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
tr
td(OFF)
VGS = 4.5 V, VDS = 15 V, ID = 15 A,
RG = 3.0 W
tf
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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2
ns
NTMFS4837NH
ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified)
Parameter
Symbol
Test Condition
Min
Typ
Max
9.0
14
19.6
29.3
28
38.7
4.7
7
TJ = 25°C
0.83
1.2
TJ = 125°C
0.71
Unit
SWITCHING CHARACTERISTICS (Note 6)
Turn−On Delay Time
Rise Time
Turn−Off Delay Time
Fall Time
td(ON)
tr
td(OFF)
VGS = 11.5 V, VDS = 15 V,
ID = 15 A, RG = 3.0 W
tf
ns
DRAIN−SOURCE DIODE CHARACTERISTICS
Forward Diode Voltage
Reverse Recovery Time
VSD
tRR
Charge Time
ta
Discharge Time
tb
Reverse Recovery Charge
VGS = 0 V,
IS = 30 A
V
23.5
VGS = 0 V, dIS/dt = 100 A/ms,
IS = 30 A
11.3
ns
12.2
QRR
8
nC
Source Inductance
LS
0.93
nH
Drain Inductance
LD
Gate Inductance
LG
Gate Resistance
RG
PACKAGE PARASITIC VALUES
TA = 25°C
0.005
1.84
0.9
5. Pulse Test: pulse width v 300 ms, duty cycle v 2%.
6. Switching characteristics are independent of operating junction temperatures.
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3
W
90
85
80
75
70
65
60
55
50
45
40
35
30
25
20
15
10
5
0
100
TJ = 25°C
4.2 V
7 V to 10 V
90
4.4 V to 5.0 V
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
NTMFS4837NH
4.0 V
3.8 V
3.6 V
3.4 V
1
2
3
4
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
70
60
50
40
TJ = 125°C
30
TJ = 25°C
20
10
VGS = 3.2 V
0
80
0
5
TJ = −55°C
1
0.012
ID = 30 A
0.011
TJ = 25°C
0.010
0.009
0.008
0.007
0.006
0.005
0.004
0.003
3.0
4.0
5.0
6.0
7.0
8.0
9.0
10
VGS, GATE−TO−SOURCE VOLTAGE (V)
11
0.01
0.0095 T = 25°C
J
0.009
0.0085
0.008
0.0075
VGS = 4.5 V
0.007
0.0065
0.006
0.0055
0.005
0.0045
VGS = 11.5 V
0.004
0.0035
0.003
0.0025
0.002
0.0015
0.001
10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85
ID, DRAIN CURRENT (A)
Figure 4. On−Resistance versus Drain Current
and Gate Voltage
1.7
1.5
10000
ID = 30 A
VGS = 10 V
VGS = 0 V
TJ = 150°C
1000
1.4
IDSS, LEAKAGE (nA)
RDS(on), DRAIN−TO−SOURCE RESISTANCE
(NORMALIZED)
Figure 3. On−Resistance versus
Gate−to−Source Voltage
1.6
7
Figure 2. Transfer Characteristics
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
RDS(on), DRAIN−TO−SOURCE RESISTANCE (W)
Figure 1. On−Region Characteristics
2
3
4
5
6
VGS, GATE−TO−SOURCE VOLTAGE (V)
1.3
1.2
1.1
1.0
0.9
0.8
TJ = 125°C
100
10
1
TJ = 25°C
0.7
0.6
−50 −30 −10
0
20
40
60
80
100 120 140 160
0.1
5
10
15
20
25
TJ, JUNCTION TEMPERATURE (°C)
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
Figure 5. On−Resistance Variation with
Temperature
Figure 6. Drain−to−Source Leakage Current
versus Voltage
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4
30
3000
2800
2600
2400
2200
2000
1800
1600
1400
1200
1000
800
600
400
200
0
15
VGS, GATE−TO−SOURCE VOLTAGE (V)
C, CAPACITANCE (pF)
NTMFS4837NH
TJ = 25°C
COSS
CRSS
5
0
VGS
5
10
15
20
25
9
7.5
6
4.5
VDD = 15 V
VGS = 11.5 V
ID = 30 A
TJ = 25°C
0
0
5
10
15
20
25
30
35
Qg, TOTAL GATE CHARGE (nC)
VDS
Figure 8. Gate−to−Source and Drain−to−Source
Voltage vs. Total Gate Charge
30
IS, SOURCE CURRENT (A)
100
td(off)
tr
10
td(on)
tf
VDS = 15 V
ID = 15 A
VGS = 11.5 V
1
10
25
15
10
5
0
0.5
100
100 ms
1 ms
RDS(on) Limit
Thermal Limit
Package Limit
1
0.1
1
10 ms
dc
10
100
EAS, SINGLE PULSE DRAIN−TO−SOURCE
AVALANCHE ENERGY (mJ)
10 ms
10
0.7
0.8
0.9
1.0
Figure 10. Diode Forward Voltage versus
Current
VGS = 20 V
Single Pulse
TC = 25°C
100
0.6
VSD, SOURCE−TO−DRAIN VOLTAGE (V)
Figure 9. Resistive Switching Time
Variation versus Gate Resistance
1000
VGS = 0 V
TJ = 25°C
20
RG, GATE RESISTANCE (W)
ID, DRAIN CURRENT (A)
QGD
1.5
Figure 7. Capacitance Variation
t, TIME (ns)
QGS
3
GATE−TO−SOURCE OR DRAIN−TO−SOURCE VOLTAGE (V)
1
QT
10.5
CISS
10
12
150
140
130
120
110
100
90
80
70
60
50
40
30
20
10
0
25
ID = 31 A
50
75
100
125
150
175
VDS, DRAIN−TO−SOURCE VOLTAGE (V)
TJ, STARTING JUNCTION TEMPERATURE (°C)
Figure 11. Maximum Rated Forward Biased
Safe Operating Area
Figure 12. Maximum Avalanche Energy versus
Starting Junction Temperature
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5
NTMFS4837NH
120
100
gFS, (S)
80
60
40
20
0
VDS = 1.5 V
0
10
20
30
40
50
60
70
80
90 100 110 120
DRAIN CURRENT (A)
Figure 13. GFS versus Drain Current
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6
NTMFS4837NH
PACKAGE DIMENSIONS
DFN5 5x6, 1.27P
(SO−8FL)
CASE 488AA−01
ISSUE D
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
0.20 C
D
2
A
B
D1
6
2X
0.20 C
5
4X
E1
1
2
3
q
E
2
c
A1
4
TOP VIEW
C
3X
e
0.10 C
SEATING
PLANE
DETAIL A
A
0.10 C
SIDE VIEW
8X
C A B
0.05
c
3X
4X
1.270
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
e/2
L
1
4
K
0.750
4X
1.000
0.965
1.330
2X
0.905
2X
E2
L1
6
G
MILLIMETERS
MIN
NOM
MAX
0.90
1.00
1.10
0.00
−−−
0.05
0.33
0.41
0.51
0.23
0.28
0.33
5.15 BSC
4.50
4.90
5.10
3.50
−−−
4.22
6.15 BSC
5.50
5.80
6.10
3.45
−−−
4.30
1.27 BSC
0.51
0.61
0.71
0.51
−−−
−−−
0.51
0.61
0.71
0.05
0.17
0.20
3.00
3.40
3.80
0_
−−−
12 _
SOLDERING FOOTPRINT*
DETAIL A
b
0.10
DIM
A
A1
b
c
D
D1
D2
E
E1
E2
e
G
K
L
L1
M
q
0.495
M
4.530
3.200
0.475
5
D2
2X
1.530
BOTTOM VIEW
4.560
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
ON Semiconductor and
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
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“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
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7
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NTMFS4837NH/D