NCS29001 LED Backlight Driver The NCS29001 is an integrated LED driver used in LCD display backlighting applications. A configurable bill of materials allows the designer to create a highly efficient solution for a variety of LCD screen sizes. The NCS29001 uses a boost type converter to deliver constant current in a string of LEDs. High accuracy PWM dimming is supported for a frequency up to 500 Hz . The integrated soft start function provides excellent control during the power up sequence to avoid current overshoot. The device protects against output overvoltage, open / short LED, and thermal overload. The NCS29001 is offered in the cost effective SOIC−14 package. MARKING DIAGRAM 14 14 1 Features • • • • • • • • • • • http://onsemi.com SOIC−14 NB CASE 751A 8.5 V to 18 V Input Voltage Range ±1% Vref Voltage Accuracy to set LED Current PWM Controlled Dimming Soft Start Limits In−Rush Current Open Feedback Protection Open LED Protection Short LED Protection LED String Cathode Short to ground Protection Max Duty Cycle Above 90% SOIC−14 Package This is a Pb−Free Device NCS29001G AWLYWW 1 NCS29001= Specific Device Code A = Assembly Location WL = Wafer Lot Y = Year WW = Work Week G = Pb−Free Package PIN CONNECTIONS Typical Application • TFT−LCD TV Panels • LCD Monitor Panels VIN 1 14 GATE Vref 2 13 CS GND 3 12 PGND NCS29001 PWMin 4 11 PWMout RT 5 10 FBN FBP 6 9 COMP STBY 7 8 OVP ORDERING INFORMATION See detailed ordering and shipping information on page 15 of this data sheet. © Semiconductor Components Industries, LLC, 2013 October, 2013 − Rev. 1 1 Publication Order Number: NCS29001/D NCS29001 Figure 1. Block Diagram http://onsemi.com 2 NCS29001 PINOUT ASSIGNMENT VIN 1 14 GATE Vref 2 13 CS GND 3 12 PGND PWMin 4 11 PMWout RT 5 10 FBN FBP 6 9 COMP STBY 7 8 OVP NCS29001 Figure 2. NSC29001 Pinout PIN DESCRIPTION Pin # Symbol Type 1 VIN Input 2 VREF Output 5 V / 10 mA reference voltage. Small 1.0 mF low ESR bypass capacitor required from VREF to GND. 3 GND Ground Analog ground. 4 PWMin Output PWM dimming control input. 5 RT Output The resistor connected between RT and GND sets the switching frequency 6 FBP Input The reference voltage for the feedback (FBN). Reference level can be adjusted from 0.5 V up to 3.0 V using an external voltage divider. 7 STBY Input The converter enters in standby mode when STBY is floating or pulled high. When STBY goes from low to high the circuit will discharge the capacitors on the COMP pin and keep PWMout high to discharge the output capacitor. STBY must remain high for 50 ms before the part enters standby mode. 8 OVP Output This pin provides the overvoltage protection for the converter. When the voltage at this pin exceeds 1.2 V, the boost converter stops immediately and the device enters standby mode. Loop compensation pin 9 COMP Power 10 FBN Input Description VIN supply input. Small 1.0 mF low ESR bypass capacitor required from VIN to GND. Feedback pin and LED cathode connection. External resistor from FBN to GND sets the LED current. 11 PWMout Output PWM dimming output driver. 12 PGND Ground Power ground. 13 CS Power This pin is used to sense the drain current of the external power MOSFET. It includes a built−in blanking time. 14 GATE Output This pin is the output GATE driver for an external N−channel power MOSFET http://onsemi.com 3 NCS29001 ATTRIBUTES Characteristics Values ESD protection (all pins) Human Body Model (HBM) (Note 1) Machine Model (MM) 2 kV 150 V Moisture sensitivity (Note 2) Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in Meets or exceeds JEDEC Spec EIA/JESD78 IC Latch−up Test 1. Human Body Model (HBM), R = 1500 W, C = 100 pF. 2. For additional information, see Application Note AND8003/D. ABSOLUTE MAXIMUM RATINGS Rating VMIN VMAX Unit VIN −0.3 30 V PWMin −0.3 5.5 V STBY −0.3 5.5 V FBP −0.3 5.5 V FBN −0.3 5.5 V OVP −0.3 5.5 V CS −0.3 5.5 V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. OPERATING CONDITIONS (TA = +25°C) Rating VIN Min Typ Max Unit 8.5 12 18 V 1 V VIL_PWMin: PWMin input low voltage VIH_PWMin: PWMin input high voltage 2 FBP V 0.5 VIL_STBY: STBY input low voltage 3.0 V 1 V VIH_STBY: STBY input high voltage 2 RT clock frequency resistor (Note 3) 20 140 kW Fdim dimming frequency (5 V amplitude) 100 300 Hz 3 95 % Ddim dimming duty−cycle V NOTE: With respect to the GND pin. 3. Choose RT to keep clock frequency between 100 kHz and 500 kHz. THERMAL RATINGS Parameter Junction to ambient thermal impedance (Note 4) Symbol Rating Unit RqJA 150 °C/W Maximum Junction Temperature (Note 5) TJ +150 °C Operating Ambient Temperature TA −40 to +85 °C Storage temperature Tstg −65 to +150 °C 4. Power dissipation must be considered to ensure maximum junction temperature (qJA) is not exceeded. 5. Thermal Pad attached to PCB, 0 lfm airflow, and 76 mm x 76 mm copper area. http://onsemi.com 4 NCS29001 ELECTRICAL SPECIFICATIONS VIN = 12 V, TAMB = –40°C to 85°C; typical values are at 25°C Symbol Parameter Condition Min Typ Max Unit VIN = 12 V; PWMin = 5 V; no load, STBY = 5 V 5 mA PWMin = GND Ambient temperature 25°C STBY = 5 V 12 uA 8.5 V VIN (VIN Pin) IVIN ISHUTDOWN UVLO Operating Supply Current Shutdown Mode Supply Current Under Voltage Lockout Threshold DUVLO UVLO Hysteresis Tstartup Startup time VIN Rising 7.5 8 475 Time from standby falling edge to steady−state Vboost operation with 30% dimming pattern − (Note 6) mV 100 ms 5 5.05 V 0.08 0.20 % VREF (VREF Pin) Vref voltage REF bypassed with a 1 mF capacitor to GND Line_Reg Line Regulation VIN = 8.5 V to 24 V at I_REF = 10 mA Load_Reg Load Regulation 0 mA < I_REF < 10 mA at VIN = 12 V 0.6 mV/mA ICC (Vref) Iref output current VREF bypassed with a 1 mF capacitor to GND 10 mA 10 15 V VREF 4.95 GATE (GATE, RT Pins) VOH_GATE GATE output high voltage ISOURCE GATE short circuit current 0.33 0.45 A ISINK GATE sinking current 0.33 0.45 A TRISE GATE output rise time Output voltage rise−time @ CL = 1 nF, 10−90% of output signal (Note 6) − 40 ns TFALL GATE output fall time Output voltage fall−time @ CL = 1 nF, 90−10% of output signal (Note 6) − 20 ns ROH Source resistance 13 W ROL Sink resistance 6.0 W 95 % DLSS_MAX FOSC VIN = 12 V Maximum Duty Cycle (Note 6) 7.5 93 Boost Switching Frequency range 100 500 kHz ±DFOSC Frequency Accuracy −10 +10 % VRT RT pin output voltage 0.85 1 1.15 V 7.5 10 15 V 0.98 1 1.02 % PWM DIMMING (PWMin, PWMout Pins) VOH_PWMout PWMout output high voltage DD_DIM PWMout/PWMin Duty cycle Tolerance VIN = 12 V TRISE PWMout output rise time Output voltage rise−time @ CL = 1 nF, 10−90% of output signal − − 2 us TFALL PWMout output fall time Output voltage fall−time @ CL = 1 nF, 90−10% of output signal − − 2 us PWMout short circuit current 15 20 mA ISINK PWMout sinking current 15 20 mA ROH Source resistance 270 W ROL Sink resistance 230 W ISOURCE 6. Guaranteed by characterization and design http://onsemi.com 5 NCS29001 ELECTRICAL SPECIFICATIONS VIN = 12 V, TAMB = –40°C to 85°C; typical values are at 25°C Symbol Parameter Condition Min Typ Max Unit Reference voltage threshold for current clamp monitoring OCP comparator 0.5 0.6 V Slope compensation ramp 130 CURRENT SENSE (CS Pin) VCS IRAMP A/s PROTECTION (OVP, FBP, FBN Pins) VOVP Output Overvoltage Protection on OVP pin VSCP Short Circuit Protection on OVP pin 60 75 mV VUVPfb Output Undervoltage Protection on FBN 60 75 mV 140 150 TSD DTSD 1.2 1.3 160 V Thermal Shutdown (Note 6) TSD hytheresis (Note 6) 15 °C (Note 6) 50 ms °C STANDBY (STBY Pin) Standby mode delay TSTANDBY 6. Guaranteed by characterization and design APPLICATION DIAGRAM VINInductor D1 L VIN VINIC COUT NCS29001 Q1 1 VIN GATE 14 2 Vref CS 13 3 GND PGND 12 4 PWMin PWMout 11 5 RT FBN 10 6 FBP COMP 9 7 STBY OVP 8 ROVP1 Rsc Rref1 RT ROVP2 RCS Q1 Q2 Rcomp Rref2 Backlight O Standby Ccomp Ccomp2 Figure 3. Application Schematic http://onsemi.com 6 NCS29001 APPLICATION CONDITIONS Symbol Min Typ Max Unit VIN pin voltage 8.5 12 18 V VINInductor Inductor input voltage 8.5 80 VOUT Output voltage range 50 240 VINIC h DςΟΥΤ Parameter Condition VOUT/VINInductor Max = 5 VINInductor = 8.5 to 24 V | VOUT = 50 to 80 V VINInductor = 24 to 50 V | VOUT = 80 to 130 V VINInductor = 50 to 80 V | VOUT = 130 to 240 V Peak efficiency VINIC = 12 V, VOUT = 130 V, IOUT = 200 mA VINIC = 12 V, VOUT = 240 V, IOUT = 200 mA Output Voltage Accuracy including voltage ripple, from −40°C to 85°C, VINIC = 8.5 V to 18 V 95 95 −2 V % 2 % POWER UP SEQUENCE Standby VIN UVLO PWMin Vcomp PWMout GATE Figure 4. Soft Start Power Up from Standby For the device to begin the soft start sequence the VIN pin voltage needs to be above the UVLO threshold and the OVP pin voltage needs to be above the VSCP threshold. From standby mode soft start will begin when STBY pin goes low and PWMin pin goes high and lasts for a fixed number of clock cycles. This ensures that smooth start up if the device is powered on from standby with a PWM input. http://onsemi.com 7 NCS29001 STANDBY ON AND OFF SEQUENCE Discharging the output capacitor Vout Standby VIN UVLO Vin IC PWMin Vfb & I(LED) PWMout GATE Figure 5. Entering Standby Mode The STBY pin contains an internal 5 MW pull−up resistor to VREF. This resistor limits current consumption when the device is in standby mode and also ensures the device will remain in standby if the STBY pin is left floating. When the STBY goes high the boost converter will stop switching and the PWMout pin will switch, or remain high for 50 ms. This allows the output capacitor to discharge and the LED current to fall to zero. The device will be in a low power standby mode and can begin soft start from the next enable sequence. http://onsemi.com 8 NCS29001 VCC > UVLO POR STBY falling edge? Control logic, V1,V2,V4,Vref Oscilator enabled Y STBY rising edge? N STBY,10 uA SCP&D1 Open? PWM Hi Soft Start, charging Rc,Cc throug Iss OVP N Y N PWMO high Y VFBN surpass VFBP? FUVP? Y, Fault1 Y N Delay 100uS Max during Soft start, and reduced delay time for normal operation OTA take control PWM Dimming 0 0 0 >=1 N 0 Fault 2 DRV goes low immediately, PWMDout goes low immediately DRV goes low immediately, PWMDout keeps high discharging the output capacitor, Cc being discharged, Delay 50 ms STBY rising edge? DRV grouded, PWMO grounded Y Figure 6. Power Up State Machine http://onsemi.com 9 ‘ NCS29001 SOFT START WITH PWM INPUT Figure 7 below shows an example of a soft start when the device is powered up from standby with a PWM input. The PWM signal here is at 100 Hz with a duty cycle of 30%. In this case the LED reaches 100% of its programmed value in 100 ms. This time can be decreased if the PWM signal runs at a higher duty cycle. Soft start with PWM dimming active 100ms with 30% dimming duty cycle, 100Hz Vfbn & LED current PWMin and PWMout LED current reaches 100% when Vfbn crosses Vfbp Vfbp Vcomp is kept during dimming off Back light LED brightness gradually rise to the set value Figure 7. Soft Start with PWM Input GATE AND PWMOUT PIN DRIVER CIRCUIT Since external transistors are required for the boost converter and PWM dimming functions, the device contains an internal 10 V regulator to drive the gate of these transistors. In the case of the PWM transistor this also functions as a level translator for the PWMin input pin. When selecting external components it is important that the transistor has enough gate drive to ensure low RDS(on) for the expected current. It should be noted that the internal 10 V regulator will start to drop when the VIN voltage is sufficiently low. When the VIN voltage is 8.5 V the gate drivers will be limited to around 7.7 V. http://onsemi.com 10 NCS29001 VREF REFERENCE VOLTAGE The device contains an accurate 5 V reference that can supply up to 10 mA and can be accessed through the VREF pin. It can be used to program the LED feedback voltage by using a resistor divider on the FBP pin. This reference is only active when STBY = low. When the device is in standby mode the VREF pin voltage will drop to 4.2 V typical with a minimum of 3.5 V. The VREF will return to 5 V immediately when STBY is driven high. MINIMUM ON & OFF TIME If the steady state duty cycle and switching frequency combine to generate short Ton times (low VOUT/VIN converter ratio), the converter will skip some cycles to regulate VOUT which will increase output voltage ripple. The timing limit is set by the intrinsic loop propagation delay and the switching frequency will be limited by the minimum ON time and OFF time. THE INDUCTOR SELECTION For a given application, it is necessary to know the input voltage at the inductor (VININDUCTOR), the output current (IOUT) set by RFBN and the voltage on the FBP pin, and the switching frequency (Fsw). The inductor can be chosen using the formula below: L max t ǒ Ǔ V IN 1 2 I OUT F sw 2 ǒVOUT * VINǓ V OUT (eq. 1) The minimal inductor value is determined with the desired peak current flowing through the inductor. Using the chosen inductor value the steady state duty cycle and peak inductor current can be calculated: D+ Ǹ2 L (eq. 2) V IN And the inductor peak current is now: I peak + ǒVOUT * VINǓ I OUT F sw V IN L D F sw + Ǹ 2 I OUT (V OUT * V IN) L F sw (eq. 3) THE CURRENT SENSE RESISTOR Set a current limit between 2 and 2.5 times the peak inductor current to account for inductor tolerance: I limit + 2.5 I peak (eq. 4) The current limit reference fixed on the over-current protection comparator is VCS = 0.5 V and the resistance can be calculated using following the equation: R CS + V CS 2.5 I peak (eq. 5) SLOPE COMPENSATION After the current sense resistor is calculated additional calculations are needed for the external slope compensation ramp. Using the RSENSE value the typical slope of the compensation ramp can be calculated: Mramp + V OUT * V IN 1 R SENSE 2 L (eq. 6) Using the typical value for , the external compensation resistor can be calculated as follows: R SC + M RAMP (eq. 7) I RAMP The slope compensation ramp has an offset current, , which is used to calculate the peak ramp current and finally the adjusted current sense resistor. I RAMP,peak + I OFF ) D R CS + V CS * R CS I RAMP R SW I RAMP,peak I limit ) I RAMP,peak http://onsemi.com 11 (eq. 8) (eq. 9) NCS29001 OUTPUT CAPACITOR and OUTPUT VOLTAGE RIPPLE Calculating the output voltage ripple will size the output capacitor value. The output voltage ripple equation below takes into account the parasitic impedance (ESR) of this output capacitor: DV COUT + DV COUT + C OUT ǒ I OUT C OUT ǒ1 * D 2Ǔ I OUT F sw F sw ) ESR I peak 1* L Ǔ F sw V OUT * V IN ) ESR Without taking into account the ESR, the output capacitor becomes: C OUT u ǒ I OUT F sw DV OUT I peak 1* (eq. 10) I OUT L I OUT Ǔ F sw V OUT * V IN (eq. 11) (eq. 12) If the ESR value of the selected output capacitor is high, the voltage ripple will increase. The error due to the ESR can be estimated follow the equation below: DV OUTESR + ESR I peak (eq. 13) SIZING THE COMP PIN CAPACITOR The transistor Q1 is turned ON (reset of the duty cycle) when the Vf of the output current amplifier reaches the control output voltage Vc. The control voltage Vc is simply a reduced voltage out of the follower servicing the voltage on the COMP pin. In steady state, at DTsw, the voltage at the current amplifier output is represented by the equation below: V C + I peak R CS Gi (eq. 14) V comp + V C ) V OS (eq. 15) Vcomp = COMP pin output voltage Vc = Voltage Control of the transconductance amplifier Vos = voltage offset of the transconductance amplifier Vf + i+C dv dt V IN D R CS L F sw å C comp + i EA Gi t rise V comp + (eq. 16) i EA t rise (eq. 17) V c ) V os iEA = 4 mA error amplifier output current capability trise = soft start time Vos = 0.9 V voltage offset due to the follower So C comp t C comp + 0.7 i EA t rise i EA V (eq. 18) V C ) V OS IN 30 ms D R L F sw CS G L ) V OS (eq. 19) During the soft start and with the dimming function activated, the COMP pin voltage is rising during 30 ms within the 100 ms soft start time so Vcomp holds for another during 70 ms afterwards. Attention needs to be brought to the DC voltage rating. As the capacitor value decreases and the DC voltage increases, the value chosen needs to be http://onsemi.com 12 NCS29001 SIZING THE Rcomp RESISTOR for the LOOP STABILITY Combining Equations 2 and 16 gives the following expression for IOUT: Vf I OUT + 2 L F sw ǒVOUT * VINǓ 2 ǒR CS G iǓ (eq. 20) 2 To obtain the small signal equation, partial derivates of the output current are calculated with respect to the control voltage Vc and the output voltage VOUT. I ∂ OUT ∂ V OUT ∂ I OUT ∂ V OUT + VC 2 L ǒVOUT * VINǓ 2 F sw ǒV OUT * VINǓ VC + L ǒR CS F sw 2 ǒR CS G iǓ 2 + (eq. 21) 2 G iǓ I OUT V OUT * V IN (eq. 22) From the AC model below the control to output transfer function can be calculated: Figure 8. Control to Output Transfer Function H(s) + V OUT(s) V C(s) + V OUT(s) I OUT(s) I (s) V C(s) H(s) + Z OUT(s) ǒESR ) Z OUT(s) + ǒESR ) 1 sC OUT 1 sC OUT Ǔ I OUT(s) (eq. 24) V C(s) R eq Ǔ)R (eq. 23) 1)s + R eq C OUT C OUTǒESR ) R eqǓ 1)s eq ESR (eq. 25) Where R eq + R1 + 1 I (s) OUT V + 2 R ac R1 R ac R1 ǒVOUT * VINǓ Vc 2 2 F sw ǒR cs G iǓ 2 L (s) + V OUT * V IN I OUT OUT The dynamic resistance rAC(LED) is evaluated using the LED specification. R AC + R sense ) r AC(LED) http://onsemi.com 13 nb LED (eq. 27) (eq. 26) NCS29001 Theory The control to output transfer function is expressed following the formula below: s 1 ) wz H(s) + H 0 (eq. 28) 1 ) ss p Where ∂ I OUT Ho + ∂V R eq + C Ho + Ǹ 2 VC L ǒV OUT * V INǓ I OUT L ǒR CS F sw G IǓ 2 (eq. 29) R1 (eq. 30) R AC ) R 1 Gi R CS R1 R AC ) R 1 R AC 1 ǒV OUT * V INǓ fp + R AC F sw 1 ǒESR ) R eqǓ 2p (eq. 31) C OUT There is also a right half plane zero: fz + 1 ESR 2p (eq. 32) C OUT As the boost converter also operates in DCM, there is also a right half plane zero regulated to high frequency: f rhpz + 2 f sw 2p D (eq. 33) Type II compensation is used to compensate the two dominant poles fp of the control to output transfer function. The compensator zero has to be placer at the fp frequency of the transfer function. fp + 2p 1 (ESR ) R eq) R comp + C OUT + fz + (ESR ) R eq) 2p 1 R comp (eq. 34) C comp C OUT (eq. 35) C comp The dominant pole is expressed following the equation: f p1 + 1 R EA 2p (eq. 36) C comp COMP − + 9 equivalent gm Rcomp Type II Compensation Cbw = Cpad+Comp2 Ccomp Cpad Ccomp2 With Cpad=10pF Figure 9. Slope Compensation Network The natural second pole is expressed following the equation: f p2 + 2p 1 R comp C bw (eq. 37) The zero is expressed following the equation: fz + 1 2p R comp C comp http://onsemi.com 14 (eq. 38) NCS29001 OSCILLATOR FREQUENCY SETTING The simplified equation to set the switching frequency using resistor RT: f sw + 13750 RT ) 5 (eq. 39) Where: RT is expressed in kW. fsw us expressed in kHz FBP OPTIONS The FBP pin is used to program the feedback voltage that sets the LED current. Typically a resistor divider is used from VREF to set the voltage between 0.5 V and 3.0 V. Additionally, to save component costs, the feedback voltage can be programmed with internal 0.8 V (±1.5%) by tying the FBP pin to ground. FAULT DETECTION: • Overvoltage Protection: A resistor divider from VOUT can be used to set the overvoltage protection on the OVP pin. • • • When the OVP pin rises above 1.2 V the converter will shut off immediately and PWMout will be held high for 50 ms to discharge the output capacitor. After this time the device will enter standby mode requires a high to low transition on the STBY pin to restart. Short Circuit Protection: A resistor divider from VOUT can be used to set the short circuit protection on the OVP pin. When the OVP pin drops below 75 mV the converter will shut off immediately and enter standby mode. A high to low transition on the STBY pin is required to restart the device. Under Voltage Lockout (UVLO): The converter will immediately shut off and enter standby when the VIN pin voltage drops below 7.5 V. When the UVLO condition is cleared, a high to low transition on the STBY pin is required to restart the device. Temperature Shutdown: When the internal die temperature reaches 150°C, the device will behave the same as in the overvoltage condition. Layout Guidance In switching converters it is important to use wide, short traces for components in the main switching path. Resistor RCS, which is in the main switching path through transistor Q1, should be connected to power ground (PGND). Compensation network components, resistor dividers, and bypass capacitors should be referenced to quiet ground (GND). Bypass capacitors should be connected as close to the IC as possible. ORDERING INFORMATION Device NCS29001DR2G Package Shipping† SOIC−14 (Pb−Free) 3000 / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 15 NCS29001 PACKAGE DIMENSIONS SOIC−14 NB CASE 751A−03 ISSUE K D A B 14 8 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF AT MAXIMUM MATERIAL CONDITION. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSIONS. 5. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. A3 E H L 1 0.25 M DETAIL A 7 B 13X M b 0.25 M C A S B S DETAIL A h A X 45 _ M A1 e DIM A A1 A3 b D E e H h L M C SEATING PLANE MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.19 0.25 0.35 0.49 8.55 8.75 3.80 4.00 1.27 BSC 5.80 6.20 0.25 0.50 0.40 1.25 0_ 7_ INCHES MIN MAX 0.054 0.068 0.004 0.010 0.008 0.010 0.014 0.019 0.337 0.344 0.150 0.157 0.050 BSC 0.228 0.244 0.010 0.019 0.016 0.049 0_ 7_ SOLDERING FOOTPRINT* 6.50 14X 1.18 1 1.27 PITCH 14X 0.58 DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 http://onsemi.com 16 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NCS29001/D