AZDISPLAYS PM102ZY3

PM102ZY3
Version :5.0
TECHNICAL SPECIFICATION
MODEL NO : PM102ZY3
The content of this information is subject to be changed without notice.
Please contact PVI or its agent for further information.
Customer’s Confirmation
Customer
Date
By
PVI’s Confirmation
FOR MORE INFORMATION:
AZ DISPLAYS, INC.
75 COLUMBIA, ALISO VIEJO, CA 92656
Http://www.AZDISPLAYS.com
Confirmed By
Prepared By
The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page:1
PM102ZY3
Revision History
Rev.
1.0
2.0
3.0
Issued Date
Oct 26, 2007
Revised Content
New
March.24.2008
Add
Page 25 14.Handling Cautions
14-1 item d)
Modify
Page 4 2. Features
June 16,2008
Delete page: 14
10.Block Diagram
10-1) TFT-module Black Diagram
If you use PM102ZY3, you can apply PVI- 2003A(Timing controller) which will
timing signal to support PM102ZY3.
4.0
Dec.31.2008
Modify
Page 11 6. Absolute Maximum Ratings
Add Storage Temperature & Operation Temperature
5.0
August.19, 2009
Modify
Page28 16.packing
The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page:2
PM102ZY3
TECHNICAL SPECIFICATION
CONTENTS
NO.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
ITEM
Cover
Revision History
Contents
Application
Features
Mechanical Specifications
Mechanical Drawing of TFT-LCD module
Input / Output Terminals
Absolute Maximum Ratings
Electrical Characteristics
Pixel Arrangement
Display Color and Gray Scale Reference
Block Diagram
Interface Timing
Power On Sequence
Optical Characteristics
Handling Cautions
Reliability Test
Packing Diagram
PAGE
1
2
3
4
4
4
5
7
10
10
12
13
14
15
21
21
25
27
28
The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page:3
PM102ZY3
1.Application
This data sheet applies to a color TFT LCD module, PM102ZY3. The module applies to OA product,
GPS, which require high quality flat panel display. If you must use in high reliability environment
can’t over reliability test condition.
2.Features
. WSVGA (1024*600 pixels) resolution
. Amorphous silicon TFT LCD panel with LED back-light unit
. Pixel in stripe configuration
. Thin and light weight
. Display Colors：262,144 colors
. Optimum Viewing Direction：6 o’clock
. Support TTL/RSDS interface.
3.Mechanical Specifications
Parameter
Screen Size
Display Format
Display Colors
Active Area
Pixel Pitch
Pixel Configuration
Outline Dimension
Weight
Surface treatment
Display mode
Gray scale inversion direction
Back-light
Specifications
10.2” (diagonal)
1024×(RGB)×600
262,144
222.72(H)×130.5(V)
0.2175(H)×0.2175(V)
Stripe
235.0(W)×145.8(H)×6.2(D) (typ.)
314+15
Anti-Glare and E/Wide View Film
Normally white
6
(ref to Note 13-1)
48-LED
Unit
inch
dot
mm
mm
mm
g
o’clock
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PM102ZY3
M001-036-01
Patrick Lin
Frank Shin
+ (RED COLOR)
- (BLACK COLOR)
+0.2
-0.1
1
CN1
30
1
CN2
30
Frank Shin
Patrick Lin
PM102ZY3(FRONT VIEW)
4. Mechanical Drawing of TFT-LCD Module
The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page:5
M001-036-01
Patrick Lin
Frank Shin
(S: 2/1)
" "
30
CN2
1
30
CN1
1
30
CN2
1
30
CN1
1
Frank Shin
Patrick Lin
PM102ZY3(BACK VIEW)
PM102ZY3
The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page:6
PM102ZY3
5. Input / Output Terminals
5-1) TFT-LCD Panel Driving
FPC Down Connect, 30 Pins, Pitch: 0.5 mm
CN 1
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Symbol
DIO1
VSS1
VDD1
CLK
CLKN
R/L
R0(D00)
R1(D01)
R2(D02)
R3(D03)
R4(D04)
R5(D05)
VSS1
G0(D10)
G1(D11)
G2(D12)
G3(D13)
G4(D14)
G5(D15)
VSS1
B0(D20)
B1(D21)
B2(D22)
B3(D23)
B4(D24)
B5(D25)
LD
REV
POL
DIO2
I/O
I/O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I/O
Function
Horizontal Start Pulse Signal Input or Output
Ground
Power Supply
Shift Clock input
RSDS Shift Clock input
Right / Left selection
Red Data (LSB)
Red Data
Red Data
Red Data
Red Data
Red Data (MSB)
Ground
Green Data (LSB)
Green Data
Green Data
Green Data
Green Data
Green Data (MSB)
Ground
Blue Data (LSB)
Blue Data
Blue Data
Blue Data
Blue Data
Blue Data (MSB)
Load output signal
Data invert control
Polarity selection
Horizontal Start Pulse Signal Input or Output
Remark
Note 5-6
Note 5-10
Note 5-11
Note 5-6
Note 5-13
Note 5-13
Note 5-13
Note 5-7
Note 5-8
Note 5-9
Note 5-6
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reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page:7
PM102ZY3
CN 2
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Symbol
VSS2
V1
V2
V3
V4
V5
V6
V7
VSS2
V8
V9
V10
V11
V12
V13
V14
VSS2
VDD2
VCOM
TTL/RSDS
OE
U/D
CKV
STVU
STVD
VGG
GND
VCC
GND
VEE
I/O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I/O
I/O
I
I
I
I
I
Function
Ground
Gamma Voltage 1
Gamma Voltage 2
Gamma Voltage 3
Gamma Voltage 4
Gamma Voltage 5
Gamma Voltage 6
Gamma Voltage 7
Ground
Gamma Voltage 8
Gamma Voltage 9
Gamma Voltage 10
Gamma Voltage 11
Gamma Voltage 12
Gamma Voltage 13
Gamma Voltage 14
Ground
Voltage for analog circuit
Common Voltage
TTL / RSDS Input mode Selection
Output Enable
Up / Down Selection
Vertical Shift Clock
Vertical Shift Pulse Signal Input or Output
Vertical Shift Pulse Signal Input or Output
Gate On Voltage
Ground
Voltage for logic circuit
Ground
Gate Off Voltage
Remark
Note 5-14
Note 5-14
Note 5-14
Note 5-12
Note 5-5
Note 5-3
Note 5-4
Note 5-3
Note 5-2
Note 5-1
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PM102ZY3
Note 5-1: Gate off voltage, VEE=-5.6V
Note 5-2: Gate on voltage, VGG=17V
Note 5-3: Select up or down shift
U/D
1
0
STVU
Hi-Z
Input
STVD
Input
Hi-Z
Shift
Down to Up
Up to Down
Note 5-4: Gate driver shift clock
Note 5-5: When OE is connected to high “1”, the driver outputs are disabled (Gate output = VEE). Under
this condition, the operation of registers will not be affected.
Note 5-6: Select left or right shift
R/L
1
0
DIO1
Input
Hi-Z
DIO2
Hi-Z
Input
Shift
Left to Right
Right to Left
Note 5-7: Latch the polarity of outputs and switch the new data to outputs. At the rising edge (LD), latch
the “POL” signal to control the polarity of the outputs.
Note 5-8: Control whether the Data R0~G5 are inverted or not. (PVI suggests connecting to GND)
When “REV=1”, these data will be inverted.
EX: “00”→”3F”, “07”→”38”, “15”→”2A”
Note 5-9: Polarity selector for dot-inversion control. Available at the rising edge of LD.
When POL=1: Even outputs range from V1~V7, and Odd outputs range from V8~V14; When
POL=0: Even outputs range from V8~V14, and Odd outputs range from V1~V7.
Note 5-10: Clock signal. When RSDS input mode, CLK is used as CLKP input pin.
Note 5-11: The RSDS clock input pairs generate the internal shift clock through the comparison between
CLKP and CLKN. When TTL mode, connect to GND.
Note 5-12: TTL/RSDS=H: RSDS data input
TTL/RSDS=L or open: TTL data input
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reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd. Page:9
PM102ZY3
Note 5-13:
Pin name
RSDS input mode
TTLRSDS = H
D0[2:0]N
D0[2:0]P
D1[2:0]N
D1[2:0]P
D2[2:0]N
D2[2:0]P
D04,D02,D00
D05,D03,D01
D14,D12,D10
D15,D13,D11
D24,D22,D20
D25,D23,D21
TTL input mode
TTLRSDS = L
D04,D02,D00
D05,D03,D01
D14,D12,D10
D15,D13,D11
D24,D22,D20
D25,D23,D21
Note 5-14:Typical Application Circuit (When VDD2 = 9.1V)
R15
2
V1
1
VDD2
0 OHM
R1
1
2
R16
2
V3
2
1
R2
1
0 OHM
OPEN
V2
2.4K OHM
R3
1
2
V4
OPEN
R4
1
V5
2
2.7K OHM
R5
1
2
V6
10K OHM
R7
1
R17
2
V7
2
1
R6
1
0 OHM
OPEN
2
V8
2.2K OHM
R20
1
2
3.9K OHM
1
1
0 OHM
2
10K OHM
R18
2
V9
R8
1
R9
2
V10
OPEN
1
V11
R10
2
2.7K OHM
1
R11
2
V12
OPEN
1
1
0 OHM
2
V13
R19
R12
2
2.4K OHM
1
R13
2
OPEN
1
R14
V14
2
0 OHM
The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.Page:10
PM102ZY3
5-2) Backlight driving
Connector type: JST BHSR-02VS-1
Pin No Symbol
1
+
2
-
Description
Input terminal (Anode)
Input terminal (Cathode)
Remark
Red
Black
VSS1=VSS2= GND=0V,Ta=25℃
6. Absolute Maximum Ratings:
Parameters
Symbol
VDD1
VCC
VDD2
VGG
VGG-VEE
VEE
MIN.
-0.5
-0.3
-0.5
-0.3
-0.3
-20
MAX.
5.0
6.0
12.0
40.0
40.0
0.3
Unit
V
V
V
V
V
V
Storage Temperature
Tst
-30
+80
℃
Operation Temperature
Top
-20
+80
℃
Supply Voltage
7.Electrical Characteristics
7-1) Recommended Operating Conditions :
Item
Supply Voltage for Source Driver
Supply Voltage for Gate Driver
VCOM Voltage
Digital Input Voltage
Symbol
VDD1
VDD2
VGG
VEE
VCC
VCOM
VIH
VIL
Remark
VSS1=VSS2= GND =0V,Ta=25℃
Min.
3.0
8.6
3.0
0.7 VCC
0
Typ.
3.3
9.1
17
-5.6
3.3
3.6
-
Max.
3.6
9.6
3.6
VCC
0.3 VCC
Unit
V
V
V
V
V
V
V
V
Remark
7-2) Recommended driving condition for LED back light
Parameter
Symbol
Min
TYP
MAX
Unit
Supply voltage of LED backlight
VLED
-
-
(11.0)
V
Supply current of LED backlight
ILED
-
20
Backlight Power Consumption
PLED
-
-
3.52
Ta = 25℃
Remark
Note 7-1
mA
Note 7-2
W
Note 7-1,Note 7-3
Note 7-1 ILED =20mA, Constant Current
Note 7-2 : The LED driving condition is defined for each LED module. (3 LED Serial) Input
current = 20mA * 16 =320mA
Note 7-3 : PLED = VLED-1 * ILED-1 + VLED-2* ILED-2 ….. + VLED-15 * ILED-15+VLED-16 * ILED-16
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reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.Page:11
PM102ZY3
VLED-1
VLED-2
Anode
Cathode
VLED-15
VLED-16
7-3)Power Consumption
Parameter
Supply Current for Gate Driver (Hi level)
Supply Current for Gate Driver (Low level)
Supply Current for Source Driver (Digital)
Supply Current for Source Driver (Analog)
Supply Current for Gate Driver (Digital)
LCD Panel Power Consumption
Symbol
IGG
IEE
IDD1
IDD2
ICC
-
Condition
VGG= 17V
VEE=-5.6V
VDD1= 3.3V
VDD2= 9.1V
VCC= 3.3V
-
Typ.
0.19
0.98
8.36
35.07
0.02
355.5
Max. Unit
0.57 mA
2.94 mA
16.72 mA
70.14 mA
0.06 mA
719.8 mW
Back Light LED Power Consumption
-
-
-
3.52
W
Total Power Consumption
-
-
-
4.24
W
Remark
Note 7-4
Note 7-5
Note 7-4: The power consumption for backlight is not included.
Note 7-5: Back light power consumption is calculated by IL×VL.
8. Pixel Arrangement
R G B R G B R G B 1 st Line
R GB
R G B R G B 2 nd Line
R GB
R G B 3 rd Line
R GB
1 st Pixel
1024 th Pixel
1 Pixel = R G B
R GB
598 th Line
R GB R GB
R GB
599 th Line
R GB R GB R GB
600 th Line
R GB
R GB
The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.Page:12
PM102ZY3
9. Display Color and Gray Scale Reference
Color
Input Color Data
Green
Red
Blue
R5 R4 R3 R2 R1 R0 G5 G4 G3 G2 G1 G0 B5 B4 B3 B2 B1 B0
Basic
Colors
Red
Green
Blue
Black
Red (63)
Green (63)
Blue (63)
Cyan
Magenta
Yellow
White
Red (00)
Red (01)
Red (02)
Darker
↓
Brighter
Red (61)
Red (62)
Red (63)
Green (00)
Green (01)
Green (02)
Darker
↓
Brighter
Green (61)
Green (62)
Green (63)
Blue (00)
Blue (01)
Blue (02)
Darker
↓
Brighter
Blue (61)
Blue (62)
Blue (63)
0
1
0
0
0
1
1
1
0
0
0
0
1
0
0
0
1
1
1
0
0
0
0
1
0
0
0
1
1
1
0
0
0
0
1
0
0
0
1
1
1
0
0
0
0
1
0
0
0
1
1
1
0
0
1
0
1
0
0
0
1
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
0
0
0
1
0
1
0
1
1
0
0
0
0
0
1
0
1
0
1
1
0
0
0
0
0
1
0
1
0
1
1
0
0
0
0
0
1
0
1
0
1
1
0
0
0
0
0
1
0
1
0
1
1
0
0
0
0
0
0
1
1
1
0
1
0
0
0
0
0
0
1
1
1
0
1
0
0
0
0
0
0
1
1
1
0
1
0
0
0
0
0
0
1
1
1
0
1
0
0
0
0
0
0
1
1
1
0
1
0
0
0
0
0
0
1
1
1
0
1
0
0
0
↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
0
1
1
0
0
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
1
1
1
0
0
0
0
1
1
0
0
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓ ↓
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
0
1
1
1
0
1
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reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.Page:13
PM102ZY3
10. Block Diagram
10-1) TFT-module Block Diagram
SYSTEM
Video
User
signal
input
Timing Controller
Control
VDD1
VDD2
DC-DC
Converter
Gamma
Generator
Gamma
Vcom
Generator
Vcom
VGG / VEE
FPC
Source
Driver
IC
10.2" WSVGA
TFT-LCD Panel
Gate Driver IC
The information contained herein is the exclusive property of Prime View International Co., Ltd. and shall not be distributed,
reproduced, or disclosed in whole or in part without prior written permission of Prime View International Co., Ltd.Page:14
PM102ZY3
11. Interface Timing
11-1) Timing Parameters
AC Electrical Characteristics (VDD1=VCC=3.3V, VDD2=9.1V, GND=VSS1=VSS2=0V ) Ta=25℃
Parameter
CLK Frequency
CLK Pulse Width
Data Set-up Time
Data Hold Time
Propagation Delay of DIO2/1
Time That The Last Data to LD
Pulse width of LD
Time That LD to DIO1/2
POL Set-up Time
POL Hold Time
OE Pulse Width
CKV Pulse Width
STV Set-up Time
STV Hold Time
Horizontal Display Period
Horizontal Period Timing Range
Horizontal Lines Per Field
Vertical Display Timing Range
Symbol
Fclk
Tcw
Tsu
Thd
Tphl
Tld
Twld
Tlds
Tpsu
Tphd
TOEV
TCKV
TSUV
THDV
THDP
THP
TV
TDV
Min.
18
4
2
6
1
2
5
6
6
1
500
400
400
1024
1200
600
Typ.
50
10
1024
1344
625
600
Max.
55
15
1024
1466
600
Unit
MHz
ns
ns
ns
ns
Tcw
Tcw
Tcw
ns
ns
µs
ns
ns
ns
Tcw
Tcw
THP
THP
RSDS Low level Input Voltage
Vilrsds
-
-200
-100
mV
RSDS High level Input Voltage
Vihrsds
100
200
-
Vcomrsds
VSS1+0.1
1.2
VDD1-1.2
RSDS reference Voltage
Conditions
D2[2:0]P,D2[2:0]N,
CLKP,CLKN
D2[2:0]P,D2[2:0]N,
mV
CLKP,CLKN
D2[2:0]P,D2[2:0]N,
V
CLKP,CLKN
11-2) Timing Diagram
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%
30
Tphl
data
70
Tphl
%
Last
%
Second data
First data
Thd
%
(Output)
DIO1/2
REV
Data
(Input)
DIO1/2
CLK
Tsu
Thd
70
%
%
Tsu
70
70
%
%
1
70
70
Fig. 11-2 Horizontal timing-TTL(1)
%
Tcw
2
70
1023
70
1024
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Negative
High-z
High-z
70%
Tphd
Tpsu
70%
70%
70%
High-z
Even
outputs
Odd
outputs
Tpsu Tphd
70%
POL
LD
DIO 1/2
(Input)
LD
CLK
70%
70%
Last
Tld
30%
70%
Tlds
Twld
Fig. 11-3 Horizontal timing
70%
30%
70%
Tpsu Tphd
30%
Positive
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Fig. 11-4 Vertical shift clock timing
OE
TSUV
CKV
STVU/STVD
50%
TOEV
THDV
TCKV
50%
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Fig. 11-5 Vertical timing
POL(Even
Field)
POL(Odd
Field)
STVU/STVD
(VSY)
(HSY)
THP
THDP
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PM102ZY3
12. Power On Sequence
V GG
V DD2
V D D 1 ,V C C
V SS(0 V )
V EE
O FF
OFF
ON
T1
T3
L o g ic s ig n a l
V C O M ,V G L
R G B - V id e o s ig n a l
T2
O FF
T4
OFF
B a c k lig h t
ON
>10m s
>10m s
1. 10ms≦T1＜T2
2. 0ms＜T3≦T4≦10ms
13. Optical Characteristics
13-1) Specification:
Ta = 25℃
Parameter
Symbol
θ
Horizontal
Viewing
θ(to 12 ’clock)
Angle
Vertical
θ(to 6 o’clock)
Contrast Ratio
CR
Brightness
Response
Rise
time
Fall
Cross Talk Ratio
Luminance Uniformity
White Chromaticity
LED Life Time
L
Tr
Tf
CTK
U
x
y
Condition
CR≥10
At optimized
Viewing angle
θ=0°/φ=0
θ=0°/φ=0°
θ=0°/φ=0°
25℃
MIN.
55
35
50
TYP.
60
40
55
MAX.
-
Unit
deg
deg
deg
Remarks
200
600
-
-
Note 13-2
300
75
0.265
0.300
20000
350
15
25
80
0.305
0.340
30000
30
50
3.5
0.345
0.380
-
cd/㎡
ms
ms
%
%
hrs
Note 13-4
Note 13-1
Note 13-3
Note 13-5
Note 13-6
Note 13-4
Note 13-7
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PM102ZY3
The optical characteristics shall be measured in dark room (ambient illumination on panel surface
less than 1 Lux). The measuring configuration shows as following figure.
Photometer (TOPCON
BM-5A or BM-7 fast)
500 mm +/- 50 mm
Field = 1°
TFT-LCD module
DC/AC Inverter
Note 13-1: The definition of viewing angles are as follow
12 o’clock
θ
3 o’clock
9 o’clock
φ
Note 13-2 : The definition of contrast ratio CR =
6 o’clock
Luminance at gray level 63
Luminance at gray level 0
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Note 13-3: Definition of Response Time Tr and Tf:
White
Black
White
100%
90%
Brightness
10%
0%
Tr
Tf
Note 13-4 : 1.Topcon BM-7(fast) luminance meter 1°field of view is used in the testing
Note 13-5 : The uniformity of LCD is defined as
U = The Minimum Brightness of the 9 testing Points
The Maximum Brightness of the 9 testing Points
Luminance meter : BM-5A or BM-7 fast (TOPCON)
Measurement distance : 500 mm +/- 50 mm
Ambient illumination : < 1 Lux
Measuring direction : Perpendicular to the surface of module
The test pattern is white (Gray Level 63).
1/6
2/6
2/6
1/6
1/6
2/6
2/6
1/6
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PM102ZY3
Note 13-5: Cross Talk (CTK) =
YA-YB
YA
×100%
YA: Brightness of Pattern A
YB: Brightness of Pattern B
Luminance meter : BM 5A (TOPCON)
Measurement distance : 500 mm +/- 50 mm
Ambient illumination : < 1 Lux
Measuring direction : Perpendicular to the surface of module
Pattern A
Pattern B
(Gray Level 31)
(Gray Level 31, central
black box exclusive)
YA
YB
1/3
1/3
1/3
1/3
1/3
1/3
Black
: Measuring Point (A and B are at the same point.)
(Gray Level 0)
Note 13-7: The “LED Life time “ is defined as the module brightness decrease to 50% original
Brightness that the ambient temperature is 25℃ and ILED =320mA.
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14. Handling Cautions
14-1) Mounting of module
a) Please power off the module when you connect the input/output connector.
b) Polarizer which is made of soft material and susceptible to flaw must be handled carefully.
c) Protective film (Laminator) is applied on surface to protect it against scratches and dir.
d) Please following the tear off direction as figure14-1 to remove the protective film as slowly as
possible, so that electrostatic charge can be minimized.
14-2) Precautions in mounting
a) When metal part of the TFT-LCD module (shielding lid and rear case) is soiled, wipe it with soft
dry cloth.
b) Wipe off water drops or finger grease immediately. Long contact with water may cause
discoloration or spots.
c) TFT-LCD module uses glass which breaks or cracks easily if dropped or bumped on hard surface.
Please handle with care.
d) Since CMOS LSI is used in the module. So take care of static electricity and earth yourself when
handling.
14-3) Adjusting module
a) Adjusting volumes on the rear face of the module have been set optimally before shipment.
b) Therefore, do not change any adjusted values. If adjusted values are changed, the
Specifications described may not be satisfied.
14-4) Others
a) Do not expose the module to direct sunlight or intensive ultraviolet rays for many hours.
b) Store the module at a room temperature place.
c) The voltage of beginning electric discharge may over the normal voltage because of leakage
current from approach conductor by to draw lump read lead line around.
d) If LCD panel breaks, it is possibly that the liquid crystal escapes from the panel.
Avoid putting it into eyes or mouth. When liquid crystal sticks on hands, clothes or feet. Wash it
out immediately with soap.
e) Observe all other precautionary requirements in handling general electronic components.
f) Please adjust the voltage of common electrode as material of attachment by 1 module.
14-5) Polarizer mark
The polarizer mark is to describe the direction of wide view angle film how to mach up with the
rubbing direction.
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PM102ZY3
Figure 14-1 the way to peel off protective film
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PM102ZY3
15. Reliability Test
No
1
2
3
4
5
Test Item
High Temperature Storage Test
Low Temperature Storage Test
High Temperature Operation Test
Low Temperature Operation Test
High Temperature & High Humidity
Operation Test
6
Thermal Cycling Test (non-operating)
7
Vibration Test
(non-operating)
8
Shock Test
(non-operating)
9
Electrostatic Discharge Test (non-operating)
Test Condition
Ta = +80℃, 240 hrs
Ta = -30℃, 240 hrs
Ta = +80℃, 240 hrs
Ta = -20℃, 240 hrs
Ta = +50℃, 80%RH, 240 hrs
0℃Æ+60℃, 50 Cycles
1hr 1hr
Frequency：10 ~ 57 HZ ,
Amplitude：0.5 mm 58~500Hz, 1G
Sweep time: 11 min
Test Period: 3 hrs (1 hr for each direction of X, Y, Z)
80G, 6ms, X,Y, Z
1 times for each direction
200pF , 0Ω ±200V
1 time / each terminal
Ta: ambient temperature
Note: The protective film must be removed before temperature test
[Criteria]
In the standard conditions, there is not display function NG issue occurred. (Including: line defect , no
image). All the cosmetic specification is judged before the reliability stress.
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PM102ZY3
16.Packing
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