SSM3J14T TOSHIBA Field Effect Transistor Silicon P Channel MOS Type (U-MOSII) SSM3J14T Power Management Switch DC-DC Converters Unit: mm • • Suitable for high-density mounting due to compact package Low on Resistance : Ron = 145 mΩ (max) (@VGS = −4.5 V) : Ron = 85 mΩ (max) (@VGS = −10 V) • High-speed switching Absolute Maximum Ratings (Ta = 25°C) Characteristics Symbol Rating Unit Drain-Source voltage VDS −30 V Gate-Source voltage VGSS ±20 V ID −2.7 DC Drain current IDP Pulse (Note 2) t = 10 s 1.25 (Note 1) 0.7 Channel temperature Tch Storage temperature range Tstg Drain power dissipation Note: PD A −5.4 W JEDEC ― 150 °C JEITA ― −55 to 150 °C TOSHIBA 2-3S1A Using continuously under heavy loads (e.g. the application of Weight: 10 mg (typ.) high temperature/current/voltage and the significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: Mounted on FR4 board (25.4 mm × 25.4 mm × 1.6 t, Cu pad: 645 mm2) Note 2: The pulse width limited by maximum channel temperature. Marking Equivalent Circuit 3 3 KDL 1 2 1 2 Handling Precaution When handling individual devices (which are not yet mounted on a circuit board), be sure that the environment is protected against electrostatic electricity. Operators should wear anti-static clothing, and containers and other objects that come into direct contact with devices should be made of anti-static materials. The Channel-to-Ambient thermal resistance Rth (ch-a) and the drain power dissipation PD vary according to the board material, board area, board thickness and pad area, and are also affected by the environment in which the product is used. When using this device, please take heat dissipation fully into account 1 2007-11-01 SSM3J14T Electrical Characteristics (Ta = 25°C) Characteristics Symbol Gate leakage current IGSS Drain-source breakdown voltage Drain cut-off current Test Condition VGS = ±16 V, VDS = 0 Typ. Max Unit ⎯ ⎯ ±1 μA V (BR) DSS ID = −1 mA, VGS = 0 −30 ⎯ ⎯ V V (BR) DSX ID = −1 mA, VGS = 20 V −15 ⎯ ⎯ V IDSS VDS = −30 V, VGS = 0 ⎯ ⎯ −1 μA −0.8 ⎯ −2.0 V (Note 3) 2.0 ⎯ ⎯ S (Note 3) ⎯ 63 85 ID = −1.35 A, VGS = −4.5 V (Note 3) ⎯ 106 145 ID = −1.35 A, VGS = −4.0 V (Note 3) ⎯ 120 170 Gate threshold voltage Vth VDS = −5 V, ID = −0.1 mA Forward transfer admittance |Yfs| VDS = −5 V, ID = −1.35 A ID = −1.35 A, VGS = −10 V Drain-source on resistance Min RDS (ON) mΩ Input capacitance Ciss VDS = −15 V, VGS = 0, f = 1 MHz ⎯ 413 ⎯ pF Reverse transfer capacitance Crss VDS = −15 V, VGS = 0, f = 1 MHz ⎯ 77 ⎯ pF Output capacitance Coss VDS = −15 V, VGS = 0, f = 1 MHz ⎯ 113 ⎯ pF Switching time Turn-on time ton VDD = −15 V, ID = −1 A ⎯ 29 ⎯ Turn-off time toff VGS = 0~−4 V, RG = 10 Ω ⎯ 29 ⎯ ns Note 3: Pulse test Switching Time Test Circuit (a) Test circuit 0 OUT 10 μs RG IN −4 V (b) VIN VDD = −10 V RG = 4.7 Ω D.U. < = 1% VIN: tr, tf < 5 ns Common source Ta = 25°C 0V 10% 90% −4 V VDS (ON) 90% (c) VOUT VDD VDD tr ton 10% tf toff Precaution Vth can be expressed as voltage between gate and source when low operating current value is ID = −100 μA for this product. For normal switching operation, VGS (on) requires higher voltage than Vth and VGS (off) requires lower voltage than Vth. (relationship can be established as follows: VGS (off) < Vth < VGS (on)) Please take this into consideration for using the device. 2 2007-11-01 SSM3J14T ID – VDS ID – VGS −6 −10000 −10 V −5 V −4 V Common source −3.5 V (mA) Common source Ta = 25°C −4 −3 V Drain current ID Drain current ID (A) −1000 −2 VGS = −2.5V VDS = −5 V Ta = 25°C −100 −10 100°C −25°C −1 −0.1 0 0 −0.5 −1 −1.5 Drain-source voltage −0.01 0 −2 VDS (V) −1 −2 Gate-source voltage RDS (ON) –ID −3 VGS (V) RDS (ON) – VGS 300 1000 Common source Common source Ta = 25°C ID = −1.35 A Drain-Source on resistance RDS (ON) (mΩ) 250 Drain-Source on resistance RDS (ON) (mΩ) −4 200 VGS = −4 V 150 −4.5 V 100 50 25°C 100 Ta = 100°C −25°C −10 V 0 0 −1 −2 −3 −4 −5 −6 10 0 −7 Drain current ID (A) −5 −10 Gate-source voltage −15 −20 VGS (V) |Yfs| – ID RDS (ON) – Ta 300 Common source 10 ID = −1.35 A Forward transfer admittance |Yfs| (S) Drain-Source on resistance RDS (ON) (mΩ) 250 200 VGS = −4 V 150 −4.5 V 100 −10 V 50 3 1 0.3 Common source 0.1 VDS = −5 V Ta = 25°C 0 −25 0 25 50 75 100 125 0.03 −0.01 150 Ambient temperature Ta (°C) −0.1 −1 −10 Drain current ID (A) 3 2007-11-01 SSM3J14T Vth – Ta C – VDS −1.8 Common source VDS = −5 V ID = −0.1 mA (pF) −1.4 Common source VGS = 0 f = 1 MHz Ta = 25°C 600 −1.2 Capacitance C Vth (V) −1.6 Gate threshold voltage 700 −1.0 −0.8 −0.6 500 400 Ciss 300 200 −0.4 Coss Crss 100 −0.2 0 −25 0 25 50 75 100 125 0 0 150 −5 −10 Ambient temperature Ta (°C) −15 t – ID (V) VDS (V) Common source Drain reverse current IDR (A) Common source VDD = −15 V VGS = 0∼−4 V Ta = 25°C RG = 10 Ω 100 toff tf 30 ton 10 3 −0.01 −0.1 −1 −10 VGS = 0 D Ta = 25°C G −2 S −1 0 0 Drain current ID (A) 0.2 0.4 0.6 Drain-source voltage Dynamic input characteristic 0.8 1 PD – Ta −10 1.5 Common source ID = −2.7 A −8 Ta = 25°C Drain power dissipation PD (W) VGS (V) VDS −35 IDR – VDS tr Gate-source voltage −30 −3 300 −12 V VDD = −24 V −6 −4 −2 0 0 −25 Drain-source voltage 1000 Switching time t (ns) −20 2 4 6 8 10 Total gate charge Qg (nC) (25.4 mm × 25.4 mm × 1.6 t, Cu Pad: 645 mm2) 1 DC 0.5 0 0 12 Mounted on FR4 board t = 10 s 50 100 150 200 Ambient temperature Ta (°C) 4 2007-11-01 SSM3J14T rth – tw Single pulse (°C /W) 100 Mounted on FR4 board (25.4 mm × 25.4 mm × 1.6 t, 2 Cu Pad: 645 mm ) 30 10 rth Transient thermal impedance 300 3 1 0.001 0.01 0.1 1 Pulse width 10 tw 100 1000 (s) Safe operating area −10 ID max (pulse) 1 ms* Drain current ID (A) I max (continuous) −3 D −1 10 ms* 10 s* DC operation Ta = 25°C −0.3 Mounted on FR4 board −0.1 (25.4 mm × 25.4 mm × 1.6 t, 2 Cu Pad: 645 mm ) −0.03 *: Single pulse Ta = 25°C Curves must be derated linearly with increase in temperature. −0.01 −0.1 −0.3 −1 VDSS max −3 Drain-source voltage −10 −30 −100 VDS (V) 5 2007-11-01 SSM3J14T RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively “Product”) without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. 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