SSM3J327R TOSHIBA Field-Effect Transistor Silicon P-Channel MOS Type (U-MOSⅥ) SSM3J327R ○ Power Management Switch Applications +0.08 1.5-V drive Low ON-resistance: RDS(ON) = 240 mΩ (max) (@VGS = -1.5 V) RDS(ON) = 168 mΩ (max) (@VGS = -1.8 V) RDS(ON) = 123 mΩ (max) (@VGS = -2.5 V) RDS(ON) = 93 mΩ (max) (@VGS = -4.5 V) 0.05 M A 0.42 -0.05 +0.08 0.17 -0.07 2.4±0.1 3 1.8±0.1 • • Unit: mm 1 2 0.95 Absolute Maximum Ratings (Ta = 25°C) 0.95 2.9±0.2 Symbol Rating Drain-source voltage VDSS -20 V Gate-source voltage VGSS ±8 V DC ID (Note 1) -3.9 Pulse IDP (Note 1) -7.8 Drain current Drain power dissipation PD (Note 2) A 1 t = 10s A Unit 0.8+0.08 -0.05 Characteristic 1: Gate 2: Source W 2 Channel temperature Tch 150 °C Storage temperature range Tstg −55 to 150 °C SOT-23F 3: Drain JEDEC ― Note: Using continuously under heavy loads (e.g. the application of high JEITA ― temperature/current/voltage and the significant change in TOSHIBA 2-3Z1A temperature, etc.) may cause this product to decrease in the reliability significantly even if the operating conditions (i.e. Weight: 11 mg (typ.) operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc). Note 1: The channel temperature should not exceed 150°C during use. Note 2: Mounted on a FR4 board. (25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 645 mm2) Marking (Top View) Equivalent Circuit 3 3 KFG 1 2 1 2 1 2009-11-16 SSM3J327R Electrical Characteristics (Ta = 25°C) Characteristic Drain-source breakdown voltage Symbol Test Conditions Min Typ. Max Unit -20 ⎯ ⎯ V -15 ⎯ ⎯ V ⎯ ⎯ -1 μA V (BR) DSS ID = -1 mA, VGS = 0 V V (BR) DSX ID = -1 mA, VGS = 5 V (Note 4) Drain cut-off current IDSS Gate leakage current IGSS VGS = ±8 V, VDS = 0 V ⎯ ⎯ ±1 μA Vth VDS = -3 V, ID = -1 mA -0.3 ⎯ -1.0 V S Gate threshold voltage ⏐Yfs⏐ Forward transfer admittance Drain–source ON-resistance RDS (ON) Input capacitance Ciss Output capacitance Coss VDS = -3 V, ID = -1.0 A (Note 3) 2.8 5.6 ⎯ ID = -1.5 A, VGS = -4.5 V (Note 3) ⎯ 78.5 93 ID = -1.0 A, VGS = -2.5 V (Note 3) ⎯ 97.5 123 ID = -0.5 A, VGS = -1.8 V (Note 3) ⎯ 120 168 ID = -0.25 A, VGS = -1.5 V (Note 3) ⎯ 141 240 ⎯ 290 ⎯ ⎯ 44 ⎯ VDS = -10 V, VGS = 0 V f = 1 MHz ⎯ 32 ⎯ Turn-on time ton VDD = -10 V, ID = -0.5 A ⎯ 12.0 ⎯ Turn-off time toff VGS = 0 to -2.5 V, RG = 4.7 Ω ⎯ 46.2 ⎯ ⎯ 4.6 ⎯ ⎯ 3.4 ⎯ Reverse transfer capacitance Switching time VDS = -20 V, VGS = 0 V Crss Total gate charge Qg Gate-source charge Qgs Gate-drain charge Qgd Drain-source forward voltage VDSF VDD = -10 V, IDS = -3.9 A, VGS = -4.5 V ID = 3.9 A, VGS = 0 V (Note 3) ⎯ 1.2 ⎯ ⎯ 0.97 1.2 mΩ pF ns nC V Note3: Pulse test Note4: VDSX mode (the application of a plus voltage between gate and source) may cause decrease in maximun rating of drain-source voltage Switching Time Test Circuit (a) Test Circuit (b) VIN 0V 90% OUT 0 IN 10% −2.5 V RG −2.5V 10 μs RL (c) VOUT VDS (ON) 90% VDD VDD = -10 V RG = 4.7 Ω Duty.≤ 1% VIN: tr, tf < 5 ns Common Source Ta = 25°C 10% VDD tr ton tf toff Notice on Usage Let Vth be the voltage applied between gate and source that causes the drain current (ID) to be low (-1 mA for the SSM3J327R). Then, for normal switching operation, VGS(on) must be higher than Vth, and VGS(off) must be lower than Vth. This relationship can be expressed as: VGS(off) < Vth < VGS(on). Take this into consideration when using the device. Handling Precaution When handling individual devices that are not yet mounted on a circuit board, make sure that the environment is protected against electrostatic discharge. Operators should wear antistatic clothing, and containers and other objects that come into direct contact with devices should be made of antistatic materials. Thermal resistance Rth (ch-a) and drain power dissipation PD vary depending on board material, board area, board thickness and pad area. When using this device, please take heat dissipation into consideration 2 2009-11-16 SSM3J327R ID – VDS ID – VGS -8 -10 -2.5V -4.5V -1 (A) (A) -1.8 V Drain current Drain current ID ID -6 VGS = -1.5 V -4 -2 0 Common Source Ta = 25 °C 0 -0.2 -0.4 -0.6 -0.8 Drain–source voltage VDS Common Source VDS = -3 V -0.1 -25 °C Ta = 100 °C -0.01 25 °C -0.001 -0.0001 0 -1 -1.0 (V) Gate–source voltage Drain–source ON-resistance RDS (ON) (mΩ) 200 25 °C Ta = 100 °C 100 -25 °C -2 -4 -6 Gate–source voltage VGS VGS = -4.5 V 0 -2.0 -4.0 -6.0 ID -8.0 (A) Vth – Ta -1.0 A / -2.5 V -0.5 A / -1.8V -0.25 A / -1.5 V 100 ID = -1.5 A / VGS = -4.5 V Ambient temperature -2.5 V 100 -1.0 200 50 -1.8V Drain current Common Source 0 200 (V) RDS (ON) – Ta 0 −50 Common Source Ta = 25°C 100 Ta Common Source VDS = -3 V ID = -1 mA Vth (V) Drain–source ON-resistance RDS (ON) (mΩ) 300 (V) -1.5 V 0 -8 Gate threshold voltage Drain–source ON-resistance RDS (ON) (mΩ) 300 ID =-1.5A Common Source 0 VGS RDS (ON) – ID RDS (ON) – VGS 300 0 -2.0 -0.5 0 −50 150 (°C) 0 50 Ambient temperature 3 100 Ta 150 (°C) 2009-11-16 SSM3J327R 10 Common Source VDS = -3 V Ta = 25°C IDR Drain reverse current Forward transfer admittance 3 1 0.3 0.1 -0.01 -1 -0.1 Drain current ID Common Source VGS = 0 V D (A) (S) ⎪Yfs⎪ IDR – VDS |Yfs| – ID 10 1 IDR G S -25 °C 0.1 Ta =100 °C 0.001 0 -10 0.5 (A) 1.0 Drain–source voltage C – VDS 1000 25 °C 0.01 VDS (V) t – ID 10000 Common Source VDD = -10 V VGS = 0 to -2.5 V Ta = 25 °C RG = 4.7Ω toff 300 1000 (ns) Ciss tf 100 30 Switching time Capacitance t C (pF) 1.5 Coss Common Source Crss Ta = 25 °C f = 1 MHz VGS = 0 V 100 10 ton tr 10 -0.1 -1 -10 Drain-source voltage VDS 1 -0.001 -100 (V) -0.01 -0.1 Drain current -1 ID -10 (A) Dynamic Input Characteristic -8 Gate–source voltage VGS (V) Common Source ID = -3.9 A Ta = 25°C -6 -4 VDD = - 10 V VDD = - 16 V -2 0 0 2 4 Total gate charge 6 8 Qg 10 (nC) 4 2009-11-16 SSM3J327R rth – tw PD – Ta 1000 (25.4mm × 25.4mm × 1.6mm , Cu Pad : 645 mm2) b: Mounted on FR4 board (25.4mm × 25.4mm × 1.6mm , Cu Pad : 0.72 mm2 ×3) b Drain power dissipation PD (mW) Transient thermal impedance rth (°C/W ) 1600 a: Mounted on FR4 board a 100 10 Single pulse a. Mounted on FR4 board (25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 645 mm2) b. Mounted on FR4 board (25.4 mm × 25.4 mm × 1.6 mm, Cu Pad: 0.72 mm2×3) 1 0.001 0.01 0.1 1 Pulse width 10 tw 100 1200 a 800 400 0 -40 1000 b -20 0 20 40 60 80 Ambient temperature (s) 5 100 120 140 Ta (°C) 160 2009-11-16 SSM3J327R RESTRICTIONS ON PRODUCT USE • Toshiba Corporation, and its subsidiaries and affiliates (collectively “TOSHIBA”), reserve the right to make changes to the information in this document, and related hardware, software and systems (collectively “Product”) without notice. • This document and any information herein may not be reproduced without prior written permission from TOSHIBA. Even with TOSHIBA’s written permission, reproduction is permissible only if reproduction is without alteration/omission. • Though TOSHIBA works continually to improve Product’s quality and reliability, Product can malfunction or fail. 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