AM4825P Analog Power P-Channel 30-V (D-S) MOSFET These miniature surface mount MOSFETs utilize a high cell density trench process to provide low rDS(on) and to ensure minimal power loss and heat dissipation. Typical applications are DC-DC converters and power management in portable and battery-powered products such as computers, printers, PCMCIA cards, cellular and cordless telephones. • • • • PRODUCT SUMMARY VDS (V) rDS(on) m(Ω) 13 @ VGS = -10V -30 19 @ VGS = -4.5V Low rDS(on) provides higher efficiency and extends battery life Low thermal impedance copper leadframe SOIC-8 saves board space Fast switching speed High performance trench technology ID (A) -11.5 -9.3 1 8 2 7 3 6 4 5 o ABSOLUTE MAXIMUM RATINGS (TA = 25 C UNLESS OTHERWISE NOTED) Symbol Maximum Units Parameter -30 Drain-Source Voltage VDS V VGS ±25 Gate-Source Voltage o TA=25 C a Continuous Drain Current o TA=70 C b Pulsed Drain Current a Continuous Source Current (Diode Conduction) -11.5 ID IDM ±50 IS -2.1 o TA=25 C a Power Dissipation o TA=70 C THERMAL RESISTANCE RATINGS Parameter a Maximum Junction-to-Case a Maximum Junction-to-Ambient Symbol t <= 5 sec t <= 5 sec RθJC RθJA A 3.1 PD W 2.3 TJ, Tstg Operating Junction and Storage Temperature Range A -9.3 o C -55 to 150 Maximum 25 50 Units o o C/W C/W Notes a. Surface Mounted on 1” x 1” FR4 Board. b. Pulse width limited by maximum junction temperature 1 PRELIMINARY Publication Order Number: DS-AM4825_G AM4825P Analog Power SPECIFICATIONS (T A = 25oC UNLESS OTHERWISE NOTED) Parameter Symbol Test Conditions Min Limits Unit Typ Max Static Drain-Source Breakdown Voltage Gate-Threshold Voltage VGS = 0 V, ID = -250 uA -30 VGS(th) VDS = VGS, ID = -250 uA -1 IGSS Gate-Body Leakage Zero Gate Voltage Drain Current On-State Drain Current V(BR)DSS A IDSS V VDS = 0 V, VGS = ±25 V ±100 nA VDS = -24 V, VGS = 0 V -1 -5 uA o VDS = -24 V, VGS = 0 V, TJ = 55 C ID(on) VDS = -5 V, VGS = -10 V rDS(on) VGS = -10 V, ID = -11.5 A VGS = -4.5 V, ID = -9.3 A Forward Tranconductance gfs VDS = -15 V, ID = -11.5 A 29 S Diode Forward Voltage VSD IS = 2.5 A, VGS = 0 V -0.8 V A Drain-Source On-Resistance A Dynamic -50 A 13 19.0 mΩ b Total Gate Charge Qg Gate-Source Charge Qgs Gate-Drain Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Turn-On Delay Time Qgd Ciss Coss Crss td(on) Rise Time Turn-Off Delay Time Fall-Time tr td(off) 25 VDS = -15 V, VGS = -5 V, ID = -11.5 A VDS=-15V, VGS=0V, f=1MHz VDD = -15 V, RL = 6 Ω , = -1 A, VGEN = -10 V tf ID 11 nC 17 2300 600 300 15 pF 13 100 nS 54 Notes a. Pulse test: PW <= 300us duty cycle <= 2%. b. Guaranteed by design, not subject to production testing. Analog Power (APL) reserves the right to make changes without further notice to any products herein. APL makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does APL assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in APL data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. APL does not convey any license under its patent rights nor the rights of others. APL products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the APL product could create a situation where personal injury or death may occur. Should Buyer purchase or use APL products for any such unintended or unauthorized application, Buyer shall indemnify and hold APL and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that APL was negligent regarding the design or manufacture of the part. APL is an Equal Opportunity/Affirmative Action Employer. 2 PRELIMINARY Publication Order Number: DS-AM4825_G AM4825P Analog Power Typical Electrical Characteristics (P-Channel) -5 0 4 V thru 1 0 v -4 0 3 .5 V -3 0 -2 0 3V -1 0 2 .5 V 0 0 -1 -2 -3 VDS - Dra in to S o urc e Vo lta ge (V) Figure 1. On-Region Characteristics Figure 2. On-Resistance Variation with Drain Current and Gate Voltage 0.05 1.6 VGS=10V ID=11.5A 1.5 Normalized rDS(on) 1.4 0.04 1.3 RDS(ON) 1.2 1.1 1.0 0.9 0.8 0.03 ID =11.5a 0.02 0.01 0.7 0 0.6 -50 -25 0 25 50 75 100 125 0 150 2 4 6 8 10 VGS - Gate to Source Voltage (V) TJ - Junction Temperature (ºC) Figure 3. On-Resistance Variation with Temperature Figure 4. On-Resistance with Gate to Source Voltage 100 -50 10 I - Drain Current (A) IS - Source Current (A) 25C TJ = 150°C TJ = 25°C 1 -40 125C -55C -30 -20 -10 0 0 0.1 0 0.2 0.4 0.6 0.8 1 1.2 -1 -2 -3 -4 -5 VGS - Gate to Source Voltage (V) VSD - Source to Drain Current (V) Figure 6. Body Diode Forward Voltage Variation Figure 5. Transfer Characteristics with Source Current and Temperature 3 PRELIMINARY Publication Order Number: DS-AM4825_G AM4825P Analog Power Typical Electrical Characteristics (P-Channel) 4000 VGS Gate to Source Voltage (V) 10 VDS = 10V Capacit ance (pF) 8 6 4 2 2000 CRSS 10 20 30 40 0 50 0 -5 -1 0 Figure 7. Gate Charge Characteristics -2 0 Figure 8. Capacitance Characteristics 50 45 40 0.8 0.6 35 30 25 20 15 0.4 Power (W) Variance (V) -1 5 VDS (V) QGS, T otal Gate Charge (nC) 0.2 0 V COSS 1000 0 0 CISS 3000 -0.2 10 5 0 0.01 -0.4 -50 -25 0 25 50 75 100 125 150 T J - Juncation T emperature (ºC) 0.1 1 10 100 1000 Pulse T ime (S) Figure 9. Maximum Safe Operating Area Figure 10. Single Pulse Maximum Power Dissipation Normalized Thermal Transient Junction to Ambient 1 0.5 0.2 P DM 0.1 0.1 t1 t2 0.05 0.02 1. Duty Cycal D = t1/t2 2. Per Unit Base RθJ A =70C/W 3. TJ M - TA = PDM Zθjc 4. Sureface Mounted Single Pulse 0.01 0.0001 0.001 0.01 0.1 1 10 100 1000 Square Wave Pulse Duration (S) Figure 11. Transient Thermal Response Curve 4 PRELIMINARY Publication Order Number: DS-AM4825_G AM4825P Analog Power Package Information SO-8: 8LEAD H x 45° 5 PRELIMINARY Publication Order Number: DS-AM4825_G