[AK9231] AK9231 Dual 12-Bit 1MSPS SAR A/D Converter 1. General Description The AK9231 is a 12-bit, 1MSPD, SAR A/D converter. It is housed in a space saving ultra-small package (16-pin QFN). 2. Features □ Simultaneous Sampling 12-bit SAR A/D Converter □ Sampling Rate: 1MSPS □ Unipolar Input Range: 0 ~ VDD □ S/(N+D): 71.25dB(Typ.) at 100kHz Input □ INL: ±1.25 SB (Max.) □ DNL: ±1.0 LSB(Max.) □ Power Consumption: IDD=50mW (fs=1MSPS, VDD= 5V) □ Power Supply: VDD=2.35 ~ 5.25V □ Operational Temperature Range: Ta=-40 ~ 105ºC □ Package: Ultra-small 16-pin QFN (3mm x 3mm) Package VDD AIN0 S/H SAR Serial I/F & Control Logic ADC SCLK SDO0 SDO1 AIN1 S/H SAR CSN ADC TEST2 TEST3 VSS TEST0 TEST1 Figure 1. AK9231 Block Diagram 014010771-E-00 2014/12 -1- [AK9231] 3. Table of Contents 1. 2. 3. 4. General Description ............................................................................................................................ 1 Features .............................................................................................................................................. 1 Table of Contents ................................................................................................................................ 2 Pin Configurations and Functions ....................................................................................................... 3 4.1. Pin Layout .................................................................................................................................... 3 4.2. Pin Functions ............................................................................................................................... 4 4.3. Handling of Unused Pin ............................................................................................................... 4 5. Absolute Maximum Ratings ................................................................................................................ 5 6. Recommended Operating Conditions................................................................................................. 5 7. Analog Characteristics ........................................................................................................................ 6 8. DC Characteristics .............................................................................................................................. 7 9. Switching Characteristics .................................................................................................................... 7 9.1. Timing Diagram ............................................................................................................................ 7 9.2. Digital I/F ...................................................................................................................................... 8 10. Package .............................................................................................................................................. 9 10.1. Outline Dimensions .................................................................................................................. 9 10.2. Marking..................................................................................................................................... 9 11. Ordering Guide.................................................................................................................................. 10 12. Revision History ................................................................................................................................ 10 IMPORTANT NOTICE .............................................................................................................................11 014010771-E-00 2014/12 -2- [AK9231] 4. Pin Configurations and Functions TEST2 NC NC 11 10 9 SDO1 5 SDO0 014010771-E-00 PENIRQN TEST3 6 4 16 Top View VSS AIN0 CSN 2 3 15 7 VDD NC AK9231NK 2 14 SCK TEST1 NC 8 1 13 TEST0 AIN1 12 4.1. Pin Layout 2014/12 -3- [AK9231] 4.2. Pin Functions Pin No. Pin Name I/O 1 TEST0 I 2 TEST1 I 3 4 5 6 7 8 VDD VSS SDO0 SDO1 CSN SCK O O I I 9 NC - 10 NC - 11 TEST2 I 12 TEST3 I 13 AIN1 I 14 NC - 15 NC - Function TEST0 (Internal pull down: 50kΩ. Typ.) This pin must be connected to VSS. TEST1 (Internal pull down: 50kΩ. Typ.) This pin must be connected to VSS. Power Supply: 2.35 ~ 5.25V Ground Serial Data Output 0 Serial Data Output 1 Chip Select Serial Clock Input No Connection. No internal bonding. This pin must be connected to VSS No Connection. No internal bonding. This pin must be connected to VSS TEST2 (Internal pull down: 50kΩ. Typ.) This pin must be connected to VSS. TEST3 (Internal pull down: 50kΩ. Typ.) This pin must be connected to VSS. ADC1 Input No Connection. No internal bonding. This pin must be connected to VSS No Connection. No internal bonding. This pin must be connected to VSS ADC0 Input 16 AIN0 I Note: * 1. Digital input pins (CSN, SCK, TEST0, TEST1, TEST2, TEST3) must not be allowed to float. 4.3. Handling of Unused Pin Unused I/O pins must be connected appropriately. Classification Pin Name Setting Analog AIN0, AIN1 VSS 014010771-E-00 2014/12 -4- [AK9231] 5. Absolute Maximum Ratings (VSS= 0V, * 2) Parameter Symbol Power Supply VDD Analog Input Current (AIN+, AIN-) AIN Analog Input Voltage AVIN Digital Input Current DIIN Digital Input Voltage DVIN Ambient Operating Temperature Ta Storage Temperature Tstg Note: * 2. All voltages are with respect to ground (VSS). Min. -0.3 -0.3 -0.3 -40 -65 Max. 6.0 ±10 VDD+0.3 ±10 VDD+0.3 105 150 Unit V mA V mA V ºC ºC WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes. 6. Recommended Operating Conditions (VSS= 0V, * 2) Parameter Symbol Min. Typ. Power Supply VDD 2.35 Note: * 2. All voltages are with respect to ground (VSS). Max. 5.25 Unit V * AKM assumes no responsibility for the usage beyond the conditions in this datasheet. 014010771-E-00 2014/12 -5- [AK9231] 7. Analog Characteristics (Ta = -40 ~ 105ºC; VDD= 2.35 ~ 5.25V; fs= 1MHz; unless otherwise specified) Parameter Min. Typ. Resolution 12 No Missing Codes 12 Integral Nonlinearity (INL) Error -1.25 ±0.65 Differential Nonlinearity (DNL) Error -1 +0.4/-0.65 VDD= 2.35 ~ 3.6V -2.5 ±0.5 Offset Error VDD= 4.75 ~ 5.25V -2 ±0.5 Offset Error Drift ±7 Offset Error match: ADC to ADC -2 ±0.1 Gain Error -1.75 ±0.5 Gain Error Drift ±0.4 Gain Error match: ADC to ADC -1.75 ±0.5 Sampling Dynamics Throughput Rate 25 Acquisition time 325 tA match 50 Aperture Delay 5 Dynamic Characteristics (fin= 0.5dBFS) THD fI= 100kHz -84 VDD=2.35 ~ 3.6V, fI= 100kHz 69 71.25 S/H VDD=4.75 ~ 5.25V, fI= 100kHz 70 72.25 VDD=2.35 ~ 3.6V, fI= 100kHz 69 71.25 S/(N+D) VDD=4.75 ~ 5.25V, fI= 100kHz 70 72.25 SFDR sine wave 100kHz 85.5 Channel to Channel Isolation -88 Full power bandwidth At -3dB 12 Analog Input Full scale input: 0 Absolute input voltage range -0.2 Input Capacitance 27 Input leakage Current -0.3/0.5 Power Supplies Power Supply Current: Normal Operation (fs=1MSPS) VDD= 5V 10 Normal Operation (fs=1M SPS) VDD=3V 7.2 Static state VDD= 5V 4.4 Static state VDD= 3V 4.2 Power-Down State 0.1 Invalid conversions after power up or reset 014010771-E-00 Max. 1.25 1 2.5 2 2 1.75 1.75 1000 200 Unit bit bit LSB LSB LSB LSB µV/ºC LSB LSB ‘ppm/ºC LSB kSPS nsec psec nsec dB dB dB dB dB dB dB MHz VDD VDD+0.2 V V pF µA 12.3 9.0 5.8 5.5 10 1 mA mA mA mA µA 2014/12 -6- [AK9231] 8. DC Characteristics (Ta= -40 ~ 105ºC) Parameter Symbol VIH1 VIH2 VIL1 VIL2 VOH VOL CL Iin Min. 1.8 2.4 VDD-0.2 - Max. 0.8 0.4 0.4 30 ±1 Unit V V V V V V pF µA VDD= 2.35 ~ 3.6V VDD= 4.75 ~ 5.25V VDD= 5V Low-Level Input Voltage VDD= 3V High-Level Output Voltage (Iout = -200µA) Low-Level Output Voltage (Iout = 200µA) Load Capacitance Input Leakage Current (* 3) Note: * 3. Except TEST0, TEST1, TEST2 and TEST3 pins. These pins are internally pulled-down. (Typ.50kΩ) High-Level Input Voltage 9. Switching Characteristics (Ta= -40 ~ 105ºC) Parameter SCK Clock Frequency SCK High Pulse Width (* 4) SCK Low Pulse Width (* 4) Minimum time from bus 3-state to start of next conversion CSN “↓” to First SCK “↓” CSN “↓” to DOUT “0” Delay SCK “↓” to DOUT Valid Delay SCK “↓” to DOUT Valid VDD= 3V Hold time VDD= 5V Minimum CS pulse VDD= 3V 16th SCK“↓” to SDO Hi-Z State VDD= 5V Note: * 4. tSCK = 1/ fSCK Symbol fSCK tSCKH tSCKL tq tCSS tCSD tDCD tDCH1 tDCH2 tCS tCCZ1 tCCZ2 Min. Typ. 0.4 x tSCK 0.4 x tSCK 40 10 7 5.5 25 - Max. 20 25 30 30 20 Unit MHz nsec nsec nsec nsec nsec nsec nsec nsec nsec nsec nsec 9.1. Timing Diagram 1/ throughput CSN tCS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 SCK D11 SDO D0 Hi-Z 0 tq Figure 2. Data Output Timing 1 014010771-E-00 2014/12 -7- [AK9231] VIH CSN VIL tCSS tSCKL tSCKH VIH SCK VIL SDO Hi-Z tDCH tDCD tCSD 0 D1 tCCZ Hi-Z D0 50%VDD Figure 3. Data Output Timing 2 9.2. Digital I/F The AK9231 starts sampling input signals by a falling edge of the CSN pin and the AD conversion process is initiated. Converted data is output from the SDOx pin (x= 0 or 1) during the conversion. After a falling edge of the CSN pin, “0” data (4-bit) is output and then after four falling edges of SCK, AD converted data (12-bit) is output from the SDOx pin in MSB first. SDO data becomes Hi-Z on the 16th falling edge of SCK clock and the AD conversion ends. The AK9231 enters the acquisition phase on the first rising edge of SCK after the 13th falling edge (“b” period in Figure 4). The CSN pin can be set to “H” after the 16th falling edge of SCK clock. It is necessary not to start the next conversion by pulling CSN low until the end of the quiet time (tq). Do not put the CSN pin to “L” during the “tq” period after SDO data becomes Hi-Z. Normally, the CSN pin should not be set to “H” until “b” timing in Figure 4. The AD conversion stops and SDO data becomes Hi-Z if the CSN pin is put to “H” during the conversion. At the same time, the AK9231 enters the acquisition phase. The CSN pin should be set to “L” after waiting the acquisition time (minimum 325nsec) when re-starting the sampling. The high level of the digital input is not limited to device VDD. For example, a 5.25V “H” level input is accepted when the device supply voltage is 2.35V. It enables to connect other systems that have different power supply level to the digital interface of the AK9231. Also this feature relaxes restriction on power up sequencing. However, it should be noted that VOH and VOL are dependent on the device VDD. tCS tCONV b U CSN 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 1 SCK tCCZ tCSS D11 SU SDO D0 0 tq tCSD SU U 1/throughput Acquisition time Figure 4. Digital I/F 014010771-E-00 2014/12 -8- [AK9231] 10. Package 10.1. Outline Dimensions 16-pin QFN (Unit: mm) 0.75 0.05 C0.35 B 13 16 12 1 8 A 3.00 0.05 5 0.50 0.25 0.05 0.10 M C A B (0.20) 0 ~ 0.05 0.40 0.05 (0.25) 3.00 1.70 0.10 0.05 1.70 0.10 0.05 C C * The exposed pad on the bottom surface of the package must be open or connected to the ground. 10.2. Marking 9231K YYYXX Date Code: YYYXX (5 digits) Year 1digit, Week 2digits Administration Code 2digits Pin #1 indication 014010771-E-00 2014/12 -9- [AK9231] 11. Ordering Guide AK9231NK AKD9231 -40 ~ +105ºC 16pin QFN (3.0mm x 3.0mm, 0.5mm pitch) Evaluation Board for the AK9231 12. Revision History Date (Y/M/D) 14/12/09 Revision 00 Reason First edition Page Contents 014010771-E-00 2014/12 - 10 - [AK9231] IMPORTANT NOTICE 0. Asahi Kasei Microdevices Corporation (“AKM”) reserves the right to make changes to the information contained in this document without notice. When you consider any use or application of AKM product stipulated in this document (“Product”), please make inquiries the sales office of AKM or authorized distributors as to current status of the Products. 1. All information included in this document are provided only to illustrate the operation and application examples of AKM Products. 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