[AK4161] AK4161 6-channel Capacitive Touch Sensor IC GENERAL DESCRIPTION The AK4161 is a low operating voltage and low power consumption 6-channel capacitive touch sensor. Maximum 6 input channels can be configured to LED drive or GPIO. 2 channels out of 6-channel can also be configured to interrupt output. The AK4161 has a channel independent automatic correct function of environmental drifts for each sense input. It reduces false detection by continuous calibration of the internal reference value in the situation when the input capacitance of the touch switch is changed by the external factors such as hydrothermal conditions. The automatic initial setting function sets the charge current and charge time according to the size and the shape of a touch switch. Even more, a noise filter and a false protection filter are integrated. The AK4161 can be configured via serial interfaces, it is suitable for mobile phones, PCs and home electric applications. FEATURE Up to 6 capacitive sensor inputs Up to 6 general purpose inputs/outputs with PWM control for LED Selectable 2 interrupt outputs Automatic initial setting function for the charge current and time Independent automatic environmental drifts correct function for each sense terminal Independent threshold configuration for each sense terminal Selectable multi touch feature Integrated Median Averaging Filter Data Update Stop Function for Noisy Environment Reset Input pin I2C Serial Interface 10 bit SAR A/D Converter with S/H circuit Integrated Regulator Low Power Consumption: Typ. 4.1uA (Sampling rate=512ms, 6ch Sensor input, VDD=3.3V, N1S=20) Typ. 177uA (Sampling rate=1ms, 6ch Sensor input, VDD=3.3V, N1S=6) Power Down Current: Typ. 1.2uA Low Power Operation: VDD = 1.6V ~ 3.6V Operating Temperature: Ta = -40 ~ 85 C Package: 16pin QFN (3mm x 3mm, pitch 0.5mm) 2 I C-bus is a trademark of NXP B.V. MS1450-E-02-PB 2014/05 -1- [AK4161] VDD VSS Current Sources Power Control Auto Calibration CS0/GPIO0 RSTN SCL SDA Data Filter 2 I C Serial Interface Clock Switch Matrix CS1/GPIO1 CS2/GPIO2 CS3/GPIO3 Control & Register AD0 SAR ADC GPIO & PWM CS4/GPIO4 CS5/GPIO5 IRQ Output Figure 1. Block Diagram MS1450-E-02-PB 2014/05 -2- [AK4161] ■ Ordering Guide AK4161EN AKD4161 40 +85C 16pin QFN (3mm x 3mm, 0.5mm pitch) AK4161EN Evaluation Board CS4/GPIO4 CS3/GPIO3 CS2/GPIO2 CS1/GPIO1 11 10 9 6 VSS 5 NC 4 16 Top View AD0 NC NC 2 3 15 7 SDA VDD AK4161EN 2 14 CS0/GPIO0 SCL NC 8 1 13 RSTN CS5/GPIO5 12 ■ Pin Layout MS1450-E-02-PB 2014/05 -3- [AK4161] PIN/FUNCTION Pin No. Pin Name Type (Note 1) D D D D GND A/D A/D A/D A/D A/D A/D PWR - I/O (Note 2) I I I/O I I/O I/O I/O I/O I/O I/O - Function 1 RSTN Reset Pin (Active Low) 2 SCL I2C Serial Clock Input 3 SDA I2C Serial Data Input/ Output 4 AD0 I2C Slave Address Bit 0 6 VSS Ground 8 CS0 / GPIO0 Cap Sense / GPIO Pin0 9 CS1 / GPIO1 Cap Sense / GPIO Pin1 10 CS2 / GPIO2 Cap Sense / GPIO Pin2 11 CS3 / GPIO3 Cap Sense / GPIO Pin3 12 CS4 / GPIO4 Cap Sense / GPIO Pin4 with IRQN 13 CS5 / GPIO5 Cap Sense / GPIO Pin5 with IRQN 15 VDD Power Supply : 1.6V ~ 3.6V 5 NC No Connection 7 No internal bonding. This pin must be 14 connected to VSS. 16 Note 1. A (Analog terminal), D (Digital terminal), GND (Ground), PWR (Power) Note 2. I (Input terminal), O (Output terminal) Note 3. All digital input pins (SCL, SDA, AD0, RSTN) must not be allowed to float. Reset State RSTN = “L” Hi-z Hi-z Hi-z Hi-z Hi-z Hi-z Hi-z - ■ Handling of Unused Pins The unused I/O pins must be connected appropriately. Classification Pin Name Analog/Digital CS0 / GPIO0 ~ CS5/ GPIO5 Setting Pin Connection: Connect to VSS. Register Setting: FUNC (Addr: 0x1F-0x20) = “00” MS1450-E-02-PB 2014/05 -4- [AK4161] ABSOLUTE MAXIMUM RATINGS (VSS = 0V (Note 4)) Parameter Symbol min max Unit Power Supply VDD -0.3 4.3 V Input Current Any Pins except for supply IIN mA 10 GPIO Source Current per Pin Isource 12 mA GPIO Sink Current per Pin Isink 1.2 mA Input Voltage (Note 5) VIN -0.3 VDD+0.3 or 4.3 V Ambient Temperature (power applied) Ta -40 85 C Storage Temperature Tstg -65 150 C Note 4. All voltages with respect to ground. Note 5. For SDA, SCL, AD0, RSTN, CS0/GPIO0 ~ CS5/GPIO5 pins. The maximum value is smaller value between (VDD+0.3)V and 4.3V. WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation is not guaranteed at these extremes. RECOMMEND OPERATING CONDITIONS (VSS = 0V (Note 4)) Parameter Power Supply Note 4. All voltages with respect to ground. Symbol VDD min 1.6 typ 3.3 max 3.6 Unit V WARNING: AKM assumes no responsibility for the usage beyond the conditions in this datasheet. MS1450-E-02-PB 2014/05 -5- [AK4161] ANALOG CHARACTERISTICS (Ta = -40C ~ 85C, VDD = 3.3V; unless otherwise specified) Parameter Symbol min typ max Unit A/D Converter Resolution RESO 10 Bits Touch Sensor Charge Current Variation Against Nominal Value (Note 6) ICHG -30 30 % Power Supply Current Measurement Current (All function in active) IMEAS 0.765 mA Idle Current IIDLE 3.15 uA Average Supply Current (Note 7) IDD TSR= 0.25ms 687 uA TSR= 0.5ms 351 uA TSR= 1ms 177 uA TSR= 2ms 90 uA TSR= 4ms 47 uA TSR=8ms 25 uA TSR=16ms 14 uA TSR=32ms 9 uA TSR=1ms, 20 samplings at 1st order Filter 489 uA TSR=32ms, 20 samplings at 1st order Filter 18 uA TSR=512ms, 20 samplings at 1st order Filter 4.1 uA Shutdown Current (After External Reset) ISHUT 1.2 8.0 uA Note 6. Sense terminal voltage condition: The AD conversion value should be less or equal to VDD-0.2[V]. (It should be less or equal to VDD-0.3[V] when CC2Xn bit= “1”) The charge current is dependent on the operating voltage, and is configured by register settings in the range of “0.556 x VDD [uA]” to “70.056 x VDD [uA]”. Note 7. Measurement Condition: 6 active sense terminals, 2us charge period, 6 samplings at 1st order filter for noise cancelling, using sense terminal with 22pF capacitance. MS1450-E-02-PB 2014/05 -6- [AK4161] DC CHARACTERISTICS (Logic I/O) (Ta = -40C ~ 85C, VDD = 1.6V ~ 3.6V; unless otherwise specified) Parameter Symbol min typ Input Leakage Current (Note 8) IILH -5 Tri-state Leakage Current (Note 9) IOLK -5 Input High Voltage (Note 10) VIH 0.7×VDD Input Low Voltage (Note 10) VIL Output High Voltage (Note 11) (Note 12) Io=-10mA VOHF VDD-0.5 Output High Voltage (Note 11) (Note 13) Io=-1mA VOH VDD-0.3 Output Low Voltage (Note 10) (Note 13) Io=1mA VOL Output Low Voltage (Note 14) Io=3mA VOLI2C Note 8. RSTN pin Note 9. AD0, SCL, SDA, GPIO0~GPIO5 pins Note 10. GPIO0 ~ GPIO5 pins (FUNCn 1-0 bits = “01”, GPIO input setting) Note 11. GPIO0 ~ GPIO5 pins (FUNCn 1-0 bits = “10”, GPIO output setting) Note 12. Full Drive Operation (Output Driver Setting: DRVn1-0 bits = “11”) Note 13. Normal Drive Operation (Output Driver Setting: DRVn1-0 bits = “00”, “01”, “10”) Note 14. SDA pin MS1450-E-02-PB max 5 5 0.3×VDD 0.3 0.3 Unit uA uA V V V V V V 2014/05 -7- [AK4161] SWITCHING CHARACTERISTICS (Ta = -40C ~ 85C, VDD = 1.6V ~ 3.6V; unless otherwise specified) Parameter Symbol min typ max Internal Oscillator Fast Oscillator Period FPRD 75 125 175 Slow Oscillator Period SPRD 21 32 43 Reset Timing Reset Pulse Width (Note 15) tRW 10 Reset Pin Pulse Width of Spike Noise tRS 0.5 Suppressed by Input Filter (Note 16) I2C SCL clock frequency fSCL 400 Bus Free Time Between Transmissions tBUF 1.3 Start Condition Hold Time (prior to first Clock pulse) tHD:STA 0.6 Clock Low Time tLOW 1.3 Clock High Time tHIGH 0.6 Setup Time for Repeated Start Condition tSU:STA 0.6 SDA Hold Time from SCL Falling (Note 17) tHD:DAT 0 SDA Setup Time from SCL Rising tSU:DAT 0.1 Rise Time of Both SDA and SCL Lines tR 0.3 Fall Time of Both SDA and SCL Lines tF 0.3 Setup Time for Stop Condition tSU:STO 0.6 Pulse Width of Spike Noise Suppressed By Input Filter tSP 50 Capacitive load on bus Cb 400 Note 15. The AK4161 can be reset by the RSTN pin = “L”. Keep “L” period for 10us or more for a certain reset. Note 16. Pulse width of spike noise suppressed by input filter of the RSTN pin. Note 17. Data must be held for sufficient time to bridge the 300ns transition time of SCL. tRW Unit ns us us us kHz us us us us us us us us us us ns pF tRS RSTN 50%VDD Figure 2. Reset Timing Diagram VIH SDA VIL tBUF tLOW tR tHIGH tF tSP VIH SCL VIL tHD:STA Stop tHD:DAT tSU:DAT Start tSU:STA tSU:STO Start Stop 2 Figure 3. I C Interface Timing Diagram MS1450-E-02-PB 2014/05 -8- [AK4161] PACKAGE 16pin QFN (Unit: mm) Bottom View Top View 1.80±0.10 B 9 12 13 1.80±0.10 0.325±0.05 3.00±0.05 8 Exposed Pad 16 4 1 C0.25 16x 0.25±0.05 0.10 M C A B 3.00±0.05 C 0.05MAX 0.75±0.05 A 0.50 BSC 0.05 C Note: The thermal die pad must be connected to open node. ■ Package & Lead frame material Package molding compound: Epoxy Resin, Halogen (Br, Cl) Free Lead frame material: Cu Alloy Lead frame surface treatment: Solder (Pb free) Plate MS1450-E-02-PB 2014/05 -9- [AK4161] MARKING 4161 XXXYY Contents of XXXYY XXX: Date Code YY: Internal Control Code Pin #1 indication MS1450-E-02-PB 2014/05 - 10 - [AK4161] Thank you for your access to AKM product information. More detail product information is available, please contact our sales office or authorized distributors. MS1450-E-02-PB 2014/05 - 11 - [AK4161] IMPORTANT NOTICE 0. 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