Development of a CUDA Based Virtual EMI/ESD Lab D Pissoort, D. Pissoort H. H Fahmy, Fahmy C. C Wang, Wang A. A Badesha Challenges for EMI/ESD (1) • Increasing complexity and integration of electronic systems causes more complicated EMI/ESD problems • Many first prototypes fail to pass all certifications tests • Physically debugging EMI/ESD issues in reverberant or anechoic chambers is time-consuming and costly • Find the real EMI/EDS culprits very early in the design cycle if of crucial importance • Virtual EMI/ESD Lab! 2 Challenges for EMI/ESD (2) • System level (source, coupling path, unintentional antennas) • Full wave simulation is often needed. • Time and memory consuming -> GPU acceleration needed! 3 Let’s Look At Automotive… Automotive El t Electronics i is i Everywhere! E h ! Source: EMI Reduction on an Automotive Microcontroller, DAC 2009 4 EMC/EMI = System Issue Source: EMI Reduction on an Automotive Microcontroller, DAC 2009 5 When To Solve EMI/ESD Issues? Source: EMI Reduction on an Automotive Microcontroller, DAC 2009 6 EMI/ESD at End of Design Cycle Source: EMI Reduction on an Automotive Microcontroller, DAC 2009 7 EMI/ESD During Design Cycle First Time Right Thanks To Virtual EMI/ESD Lab Source: EMI Reduction on an Automotive Microcontroller, DAC 2009 8 What is GPU Computing? 9 What is GPU Computing? 10 What is CUDA? 11 CUDA Performance 12 FDTD: Advantages • FDTD has an inherent parallel nature, which makes it extremely well suited for GPU acceleration • FDTD can capture both broad-band (e.g. S-parameters) and steady-state results (e.g. far-fields) in one simulation run 13 Example 1: PCB-to-Connector PCB to Connector 14 Going Beyond Planar Problems System EMI challenges Typical culprits are cables, connectors, and transitions • Important to model connector to board transition • Need to “improve” connector design • Better performance board design to allow for bad cables/connectors • Need for full full-wave wave 3D simulator 15 Board + Connector + Mate 16 Combining CAD and Board Files Precise landing of connector fingers on board signal pad 17 Near Field Radiation Near-Field • Simulated with FDTD-solver (Agilent EMPro) • Accelerated on GPU system • Simulation time ≈ ½ day Study y if improved p g grounding g & shielding g of the connector improves EMI behavior 18 Improved Grounding (1) Extended bracket size 19 Improved Grounding (2) No copper tape Extra copper tape 20 Improved Grounding: Result Reduction of 5 dB for EMI emission in direction of chassis 21 Example 2: SSO Noise Reduction 22 SSO Noise Source Excitation 23 SSO Noise 24 Board Geometry 25 SSO Noise on Top Layer Noise sources IC 26 Decaps on Bottom Layer decaps 27 Far Field Radiation at 0 Far-Field 0.5 5 GHz 28 Far Field Radiation at 1 Far-Field 1.0 0 GHz 29 Current Density at 0 0.5 5 GHz 30 Simulation Time • With CUDA – 14 hours! • Without CUDA – more than one week (estimated) 31 Example 3: Location of ESD diodes 32 Excitation at Connector Side (1) 33 Excitation at Connector Side (2) 34 Excitation at Connector Side (3) 35 Termination at Board Side (1) 36 Termination at Board Side (2) 37 Voltages with no ESD Diode >1 1.2 2 kV!! 38 ESD Diode Close to Connector ≈ 30 V 39 ESD Diode Close to Terminations ≈ 50 V 40 Simulation Time • With CUDA – 16 hours! • Without CUDA – more than one week (estimated) 41