Overcome PI Challenges on Perforated Power/Groung

Overcome
PI Challenges on
Perforated
Power/Ground Planes
Momentum versus traditional
PI tools
Agilent EEsof EDA
Dr. Hany Fahmy
Dr. Colin Warwick
January 19, 2012
Copyright © 2012 Agilent Technologies, Inc.
1
High Speed Digital Design Flow
Chip I/O Design
IC Model
Generation
Package and PCB High Speed Digital Design
Pre-Layout
Pre-Layout
Post-Layout
Post-Layout
w/Channel Sim
Design & Analysis
w/Transient
Verify & Refine
Access Critical
Nets & PDNs
EM Models to
Verify & Refine
Methodology
Validation &
Refinement
Fab
Constraint Mgmt.
Layout
Design Rules to
Constraint Editor
Constraint-Based
Board Tool Layout
Physical Design
2
Copyright © 2012 Agilent Technologies, Inc.
High Frequency EM and Circuit Tools Solve SI/PI
Challenges
1. Keep supply voltages arriving on chip within narrow range
despite 10’s A swing in current over 10’s ps clock edge
2. Keep synchronous switching noise (SSN) within spec: SI/PI
3. Meet EMC/EMI spec: Power & ground are the biggest
‘antenna” on the PCB
IC: packaged die
On-pkg cap
Ceramic cap
Bulk cap
Die
Voltage
Regulation
Module
PCB
Copyright © 2012 Agilent Technologies, Inc.
3
PI From a Circuit Perspective
ADS consumes the CPM to build an end-to-end simulation including PDN target
impedance, PI ripple, and SI (SSN on the SIGnal line(s))
Copyright © 2012 Agilent Technologies, Inc.
4
Power Integrity for Heavily Perforated Power
Ground Planes
Traditional PI tools address
• Large-layer count boards which have the luxury of many,
(almost) perfectly solid power and grounds
• Traditional tools leverage approximation that increase speed and
capacity and are fairly accurate for solid power ground planes
New! Momentum in ADS 2011 address two new
classes of problem:
• Heavily perforated power and grounds typical of cost reduced,
low-layer count (2-6 layers), consumer PCBs
• High frequency effects in small (low inductance) PCBs and IC
packages
• The same approximations that make other tools fast also make
them fail completely in these application
Copyright © 2012 Agilent Technologies, Inc.
5
Traditional Four-layer
Signal 1
Signal 1 Copper
Signal 1
Core fiber glass
Power
Power
Pre-preg (glue)
Ground
Core fiber glass
Ground
Signal 2
Signal 2
Signal 2
Cost goes as ~square of number of layers (alignment, vias…)
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Copyright © 2012 Agilent Technologies, Inc.
Cost-Reduced Split Plane
2-layer board is ~quarter of cost/area of 4-layers
Ground
Ground Signal 1 Copper
Signal 1
Signal 1
Ground
Core fiber glass
Power
Signal 2
Signal 2
Power Signal 1 Copper
Power
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Copyright © 2012 Agilent Technologies, Inc.
Power Integrity for Heavily Perforated Power
Ground Planes
Traditional PI tools address
• Large-layer count boards which have the luxury of many,
(almost) perfectly solid power and grounds
• Traditional tools leverage approximation that increase speed and
capacity and are fairly accurate for solid power ground planes
New! Momentum in ADS 2011 address a new class of
problem:
• Heavily perforated power and grounds typical of cost reduced,
low-layer count (2-6 layers), consumer PCBs
• High frequency effects in small (low inductance) PCBs and IC
packages – RF mode (quasi-static) or microwave mode (full
wave)
• The same approximations that make other tools fast also make
them fail completely in these application
Copyright © 2012 Agilent Technologies, Inc.
8
Demo
Page 9
Copyright © 2012 Agilent Technologies, Inc.
ADS Design Flow Integration with Allegro/APD
“ADFI”
APD/Allegro Momentum
Export Setup
Select Critical Nets
or Entire Layout
Cookie-cut Power and
Ground Planes
Portion
Create Ports
Select Stackup Layers
Export to
.ads file
Report fixes to
physical designer
who adjusts
“golden” artwork in
Allegro
Ground Ref Port
Verify Layout using
Adjustments if
3-D Preview and
required
Simulate
Check vs spec (e.g crosstalk), visualize, and fine tune
Import in ADS Layout
“Sandbox”
Copyright © 2012 Agilent Technologies, Inc.
10
“Which EM Solver Should I Use?”
Geometry
Type?
Start here
Planar /
Multilayer
pkg/PCB
MoM*
*fields are solved full 3D, full wave
3D
Narrowband
High Q
FEM
Response/
Analysis
Type?
Broadband
TDR impulse
FDTD
Intermediate
FEM
High #
Ports
Device
Complexity/
Problem
Size?
High #
Mesh Cells
FDTD
Moderate
Complexity
“I like Frequency
Domain”
FEM
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Personal
Preference
?
“I like Time
Domain”
FDTD
Copyright © 2012 Agilent Technologies, Inc.
SI/PI Requires High Capacity EM: Addressing
the Need in Momentum in ADS2011.01
1. Mesh - Discretizing the problem
New Mesh generator
2. Load – Filling the matrix
column j
row i
Zij
New NlogN Matrix
loader
3. Solve – Solving the matrix
NlogN Matrix solver
(introduced in ADS2008U1)
Copyright © 2012 Agilent Technologies, Inc.
Evolution in Performance
Core simulation technology
improvements
Release
solve
time
load
time
load
time
Solve
Storage
2003A
dense (N2)
direct (N3)
dense (N2)
2005A
dense (N2)
iterative (NpN2)
dense (N2)
2008U1
dense (N2)
direct (NlogN)1.5 sparse (NlogN)
2011
solve
time
Load
sparse (NlogN) direct (NlogN)1.5 sparse(NlogN)
Example: PDN impedance
Freq sweep 0-3 GHz
Matrix size: 17.501
load
time
2003
2005
2008
2010
Page 13
Copyright © 2012 Agilent Technologies, Inc.
SI/PI Requires New EM Models: Addressing
the Need Momentum ADS2011.01
New Bond wire model
New Wire Via model
Causal substrate definition
Impulse response
1.0
h2.ImpResp
h0.ImpResp
0.8
0.6
0.4
New Frequency dependent
dielectric loss model
0.2
-0.0
-0.2
-2
-1
0
1
2
3
time, sec
4
5
Surface roughness
New Surface roughness
model
Copyright © 2012 Agilent Technologies, Inc.
Usability Improvements in ADS2011
1. New Momentum simulator
interface
2. New substrate editor
3. New port editor
4. Additional port calibrations
5. Polymorphism
6. New SI/PI wizard
NEW
Old
Copyright © 2012 Agilent Technologies, Inc.
Power Integrity With Momentum in ADS 2011
•
•
•
•
•
•
New mesher
NlogN matrix load
Efficient bond wire model
Efficient “wire” via model
Usability improvements: simplified setup
Net-driven set up: Momentum SI/PI analyzer wizard
• Hybrid fitting/convolution feature
Copyright © 2012 Agilent Technologies, Inc.
16
Why Can’t Conventional Convolution Simulator Be
Used for PDN Analysis?
Must cover both:
1.
Sharp dynamic below ~1 kHz (large decoupling caps.)
2.
GHz bandwidth
Conventional Convolution (FFT) requires equally spaced sampling:
 If we force a small step  millions of taps on impulse response  impractical
 If we use large step  doesn’t capture lower frequency structure  wrong result
Copyright © 2012 Agilent Technologies, Inc.
Page 17
ADS 2011 Includes Hybrid Convolution to Address
this PDN Simulation Requirement
•
Hybrid Convolution Simulator = Regular Convolution @ High
Frequency + Rational Fitting @ Low Frequency
•
Implemented for SnP components
•Rational fitting with pole/residual
•Equally spaced sampled
•Simulated with recursive convolution
•Simulated with conventional convolution
Copyright © 2012 Agilent Technologies, Inc.
Page 18
Case Studies
Area/Layers
Large
3.Full DDR module ( Power/ Ground planes)
Medium large
2.BGA package (DQ
lines + Power/ Ground
planes )
Simple
MOCHA project[1]
1.Simple Power/Ground planes
Frequency
Copyright © 2012 Agilent Technologies, Inc.
Case1: Power Plane Impedance
10 cm
Momentum 2009U1
MatrixSize:
17,501
Process Size: 1257 MB
Elapsed Time: 2h26m53s
4 cm
Example: PDN impedance
Freq sweep 0-3 GHz
RF mode
Extracted power plane
impedance
4.6x speed
Momentum 2011
MatrixSize:
15,042
Process Size: 1345 MB
Elapsed Time: 31m56s
Intel Core2 Quad ( 4 cores )
RAM: 4 GByte
Copyright © 2012 Agilent Technologies, Inc.
Case2: BGA Package (MOCHA project)
Momentum 2009U1
without bonding wire
2.3cm
8 layers
MatrixSize:
87768
Process Size: 5823MB
Elapsed Time: 6h49m55s
2.4x speed
Momentum 2011
1cm
Example: BGA package VSS, VDD, DQ lines
Freq sweep 0-10 GHz,200MHz step
RF mode
Using sheet conductor
with bonding wire
MatrixSize:
49952
Process Size: 4632 MB
Elapsed Time: 2h51m6s
Intel Xeon X5482 x 2 ( 8 cores )
RAM: 32 GByte
MOCHA project [1]: Modeling and CHAracterization for
SiP - Signal and Power Integrity Analysis
Copyright © 2012 Agilent Technologies, Inc.
Case3: DDR Module
14.2cm
Momentum 2009U1
MatrixSize:
N/A
Process Size: N/A
Elapsed Time: N/A
2.8
cm
*Meshing doesn’t finish after
24 hours
8 layers
Example: DDR module Power/Ground
Freq sweep 0-3 GHz,200MHz step
RF mode
Using sheet conductor
Momentum 2011
MatrixSize:
38,789
Process Size: 14406 MB
Elapsed Time: 6h38m54s
Intel Xeon X5530 x 2 ( 8 cores )
RAM: 64 GByte
Copyright © 2012 Agilent Technologies, Inc.
‘SLOW-DANCING’ PDN FOR
MEMORY CONTROLLER
PACKAGES
Copyright © 2012 Agilent Technologies, Inc.
23
Proposed PDN Optimization Strategy:
- PDN Resonances & FD optimization of decaps  MOM
+ ADS Schematic
- Co-SI/PI eye-sim  Convolution Transient engine
- EMI & P2P  FDTD Simulations with Icc(t) OR CPM
Copyright © 2012 Agilent Technologies, Inc.
24
Co-SI/PI Modeling OF Multi-Giga-bit EMI effects
Optimizing on-PKG
decaps for Minimum
coupling of Power-Noise
to Data-Signals
• Signal layer transitions: L1-2-L3 is it same like L1-2-L5?
• Open-stubs of Vias
• Stitching vias impact (# & Locality)
Copyright © 2012 Agilent Technologies, Inc.
25
DDR3 Package Modeling using MOM DC to 20GHz
DQ nets major referencing to GND
Copyright © 2012 Agilent Technologies, Inc.
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Routing of DQ signals from Bumps-Top to Layer-3
running as Symmetric-SL sandwiched between
GND on Layers 2 & 4
DQ signals on Layer-3 as Symmetric-SL
DQ signals @ Die-Bumps
Optimizing on-PKG
decaps for Minimum
Power-Noise to SignalCoupling
Copyright © 2012 Agilent Technologies, Inc.
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Moving from Layer-3 to Layer-6 through Signal-PTH
to pickup the Balls
DQ signals on Layer-6 routed
between GND on layers 5
DQ signals on Layer-3
Copyright © 2012 Agilent Technologies, Inc.
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Impact of GND-PTH stitching: Proximity & #
Original-Package: PKG1 with 15-GND-PTH
Copyright © 2012 Agilent Technologies, Inc.
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Impact of GND-PTH stitching: Proximity & #
New Proposal-Package:PKG2 with ONLY 3-GNDPTH
Copyright © 2012 Agilent Technologies, Inc.
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Impact of GND-PTH stitching: Proximity & #
Test-case Package: PKG3 with 0-GND-PTH
Copyright © 2012 Agilent Technologies, Inc.
31
FD Risk Assessment of VddQ-Noise coupling to
AC NOISE-SOURCE
Data-Signals
PACKAGE MOM S-MODEL
PORTS DIE-BUMP & DECAPS & BALLS
& 8-DATA SIGNALS + DQS/DQS# + DQM
SWEEPING
AMPLITUDE @ VDDQBUMP
ON-PKG DECAPS
MB LOADING
MODEL
Copyright © 2012 Agilent Technologies, Inc.
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NOISE-COUPLING TO TOGGELLING DATA-SIGNALS
0V noise @ VddQ-Bump Cpkg
15 GND-PTH
Copyright © 2012 Agilent Technologies, Inc.
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NOISE-COUPLING TO TOGGELLING DATA-SIGNALS
300mV noise @ VddQ-Bump
Cdie 50pF per I/O
Cpkg is 4.7uF
15 GND-PTH
100mV noise
coupling at
2.57GHz
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Copyright © 2012 Agilent Technologies, Inc.
NOISE-COUPLING TO TOGGELLING DATA-SIGNALS
300mV noise @ VddQ-Bump
Cdie 50pF per I/O
Cpkg is 0.001uF
15 GND-PTH
100mV noise
coupling at
2.57GHz &
180MHz
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Copyright © 2012 Agilent Technologies, Inc.
NOISE-COUPLING TO TOGGELLING DATA-SIGNALS
300mV noise @ VddQ-Bump
Cdie 50pF per I/O
Cpkg is 1pF
15 GND-PTH
700mV noise
coupling at
1.39GHz
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Copyright © 2012 Agilent Technologies, Inc.
ON-PKG DECAPS IMPACT THE
COUPLING-FREQ AND
AMOUNT OF COUPLING
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NOISE-COUPLING TO TOGGELLING DATA-SIGNALS
0mV noise @ VddQ-Bump
Cdie 50pF per I/O
Cpkg is 4.7uF
3 GND-PTH
Copyright © 2012 Agilent Technologies, Inc.
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NOISE-COUPLING TO TOGGELLING DATA-SIGNALS
300mV noise @ VddQ-Bump
Cdie 50pF per I/O
Cpkg is 4.7uF
3 GND-PTH
40mV MORE noise coupling at 2.57GHz
for 3-GND-PTH than 15-GND-PTH
39
Copyright © 2012 Agilent Technologies, Inc.
NOISE-COUPLING TO TOGGELLING DATA-SIGNALS
300mV noise @ VddQ-Bump
Cdie 50pF per I/O
Cpkg is 4.7uF
1 GND-PTH
20mV LESS noise coupling at 2.57GHz for 1-GND-PTH than
15-GND-PTH
BUT 200mV wide-band coupling around 4.7GHz
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Copyright © 2012 Agilent Technologies, Inc.
Conclusion
• Accurate modeling of Data-signals along with VddQ & VssQ
is important to capture VddQ-Noise Coupling to Data-Signals
•
• MOM is well suited to Model Data-Signals + VddQ + VssQ
including Return-Path-Discontinuity
• PDN Decoupling & GND-Stitching (Return-path-discontinuity)
impacts the Amount of VddQ-Noise coupling as well as the
Coupling-Frequency & Bandwidth of noise-coupling
Copyright © 2012 Agilent Technologies, Inc.
41
Evaluate Our Products Today!
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pre- and post-layout bundle
pre-layout bundle
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ADS Core
Layout
Element
SystemVue
AMI
Modeling Kit
Transient
Convolution
Element
Momentum
G2 Element
EMPro
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You’re invited!
agilent.com/find/eesof-hsd-webcast
Introduction to EMI/EMC
Challenges and Their
Solution
February 16, 2012
7am PT (16:00 CET) or 10am PT
Webcast Series
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