Si9172 Datasheet

Si9172
New Product
Vishay Siliconix
PSM Buck Converter with Dynamic Adjustable Output and
Bypass Capability
FEATURES
D
D
D
D
D
D
D
D
D
D
2.7-V to 6-V Input Voltage Range
Dynamic Adjustable 1.5-V to 3.6-V Output.
Power Conversion Efficiency of 95% at 170-mA Load
Selectable Pulse Skipping Modulation (PSM) or
Bypass Mode (BP) Operation
Bypass for up to 800-mA Load
Integrated MOSFET with Low External Part Count
Low Quiescent Current–110 mA/250 mA (BP/PSM)
Shutdown Current <1 mA
Integrated UVLO and POR
Integrated Soft-Start
D Over Temperature Protection
D MSOP-10 Package
APPLICATIONS
D
D
D
D
Cellular Phones, Cordless Phones
Computer Point of Use, Notebook
PDAs
Battery Powered Devices
DESCRIPTION
The Si9172 is a dual-mode power adjustable output converter.
When it is set to PSM mode, the Si9172 operates as a pulseskipping-modulation controlled step-down (buck) converter
with a dynamically adjustable output of 1.5 V to 3.6 V. It has an
integrated MOSFET, capable of supplying a minimum 170-mA
load current with a 1.5-mH inductor. The output voltage is
adjusted by the analog dc signal at the ADJ pin. The typical
conversion efficiency is above 90%. A logic high at the
BP/PSM pin puts the Si9172 in bypass mode. The main PMOS
buck switch is forced to turn on at 100% duty cycle, overriding
the FB signal. The voltage differential between input and
output is the resistive voltage drop on the internal PMOS and
the inductor. The Si9172 guarantees to deliver 800-mA load in
bypass mode with a typical 95% efficiency.
The Si9172 is available in MSOP-10 package. In order to
satisfy the stringent ambient temperature requirements, the
Si9172 is rated to handle the industrial temperature range of
–25_C to 85_C.
TYPICAL APPLICATION CIRCUIT
1
VIN
2
10
VIN
LX
VIN
LX
SI9172
3
ON/OFF
VOUT
4
BP/PSM
5
3.6 V
GND
ENABLE
FB
BP/PSM
REF
9
VOUT
8
7
6
ADJ
MSOP-10
1.5 V
VADJ
0.4 V
Document Number: 71379
S-02890—Rev. A, 21–Dec-00
2.5 V
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Si9172
New Product
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS (TA = 25_C)
VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6.5 V
BP/PSM, ENABLE, FB, LX . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to VIN + 0.3 V
ADJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VIN
Peak Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 A (1 ms)
Continuous Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 A
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55 to 150_C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C
Power Dissipation (Package)a
10-Pin MSOP (Q Suffix)b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 825 mW
Thermal Impedance (QJA)
10-Pin MSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150_C/W
Notes
a. Device mounted with all leads soldered or welded to PC board.
b. Derate 6.6 mW/ _C above 25_C.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING RANGE
VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.7 V to 6 V
BP/PSM, ENABLE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 V to VIN
REF Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.1 mF
Output Capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 mF
Inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 mH
PSM Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 170 mA
Bypass Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 800 mA
SPECIFICATIONS
Test Conditions Unless Specified
Parameter
Symbol
Limits
–25_C to 85_C
2.7 V v VIN v 6 V
Mina
Typb
Maxa
Unit
Output
FB Threshold
VFB
ADJ = 0.4 V
1.440
1.5
1.560
ADJ = 2.5 V, VIN w VFB
3.492
3.6
3.708
IREF = 0
1.175
1.215
1.255
IREF = 0, TA = 25_C
1.195
1.215
1.235
V
Reference
Output Voltage
Power Supply
Rejectionc
VREF
PSRR
60
V
dB
UVLO
Under Voltage Lockout (turn-on)
Hysteresis
VUVLD
2.3
UVLDHYST
2.4
2.5
V
0.1
Start-Up
Start-Up Delay Time
Soft Start Timec
tDELAY
3
ms
tss
100
ms
ENABLE, BP/PSM
Logic High
VIH
Logic Low
VIL
1.5
0.4
V
Output Capability/MOSFET
Maximum Bypass Output Current
Maximum PSM Output Current
MOSFET On-resistance
800
IOUT
L = 1.5 mH
rDS(on)
VIN w 3.3 V
mA
170
150
300
mW
Supply Current
BP Mode
PSM Moded
IIN
Shutdown Mode
VIN = 3.3 V
75
110
190
250
VIN = 3.3 V, ENABLE = 0 V
mA
1
Thermal Shutdown
Threshold
TS/D
Up-Rising
165
Hysteresis
THYST
VIN = 3.3 V
25
_
_C
Notes
a. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
b. Typical values are for DESIGN AID ONLY, not guaranteed or subject to production testing.
c. Guaranteed by design and characterization, not subject to production testing.
d. For operation involving LX frequency faster than 1-Hz the supply current may be higher.
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Document Number: 71379
S-02890—Rev. A, 21–Dec-00
Si9172
New Product
Vishay Siliconix
PIN CONFIGURATION
MSOP-10
VIN
1
10
LX
VIN
2
9
LX
ENABLE
3
8
GND
BP/PSM
4
7
FB
ADJ
5
6
REF
ORDERING INFORMATION
Part Number
Temperature Range
Package
Si9172BH-TI
–25_C
_ to 85_C
_
Tape and Reel
Eval Kit
Temperature Range
Board Type
Si9172DB
–25_C to 85_C
Surface Mount
Top View
PIN DESCRIPTION
Pin No.
Name
1, 2
VIN
Function
3
ENABLE
Logic high enables the converter. Logic low shuts down the IC and decreases current consumed to <1 mA.
4
BP/PSM
Logic high = Bypass mode, logic low = PSM mode.
5
ADJ
Analog voltage input to control output voltage
6
REF
1.215-V reference. Decouple with 0.1-mF capacitor.
7
FB
8
GND
9, 10
LX
Input voltage source for buck converter, MOSFET driver, and IC control circuits.
Direct output voltage sense feedback
IC ground
Inductor connection node
TIMING WAVEFORMS
90%
VOUT
tDELAY = Start-Up Delay Time
tSS = Soft-Start Time
VIN
t
DELAY
t
SS
FIGURE 1.
Document Number: 71379
S-02890—Rev. A, 21–Dec-00
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Si9172
New Product
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM
VIN
VIN
Reference
Generator
REF
UVLO
POR
BP/PSM
BP
PSM
ENABLE
PSM/BP
Controller
Driver
LX
VADJ
Turn-On
Control
ADJ
+
FB
–
1.1 V
Zero Current
Detect
+
–
+
Turn off Control
–
Peak Current
Comparater
0.3 A
GND
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Document Number: 71379
S-02890—Rev. A, 21–Dec-00
Si9172
New Product
Vishay Siliconix
DETAIL OPERATIONAL DESCRIPTION
Start-Up
The built-in UVLO circuit in the Si9172 prevents the internal
MOSFET from turning on if the voltage on the VIN pin is less
than 2.4 V. With typical UVLO hysteresis of 0.1 V, the
controller is continuously powered ON until the VIN voltage
drops below 2.3 V. This hysteresis prevents the converter
from oscillating during the start-up phase and unintentionally
locking up the system. Once the VIN voltage exceeds the
UVLO threshold, and with no other shutdown condition
detected, an internal power-on-reset timer is activated. The
circuitry, except the output driver, is turned on. After the POR
time-out of about 3 ms, the soft-start begins. If pin 4 is in BP
mode, the high side PMOS will turn on gradually in about
100 ms to avoid any inrush current. If pin 4 is in PSM mode, the
converter will soft-start in PSM operation, forcing the output
voltage to rise smoothly with minimum overshoot. The rise
time is approximatly 100-ms. In order to start-up properly in
PSM mode, the load current has to be 170 mA or less.
Pulse Skipping Mode
The gate charge losses produced from the Miller capacitance
of the MOSFET are the dominant power dissipation parameter
during light load. Therefore, reduced gate switching frequency
improves overall converter efficiency. This is exactly why the
Si9172 is designed to operate in pulse-skipping mode rather
than PWM mode. If the BP/PSM pin is connected to logic low
level, the converter runs in pulse skipping modulation mode.
In this mode, the internal MOSFET operates with a constant
on-time. The on-time is reduced if necessary by the peak
current detector circuitry. There is an enforced minimum
off-time acting as the feedback comparator blanking time. If
the output voltage drops below the desired level, the main
switch is first turned on and then off. If the applied on-time did
not deliver enough energy to keep the output at the desired
voltage level, the controller will force another on and off
sequence, until the desired voltage is accomplished. If the
applied on-time forces the output to exceed the desired level,
the converter stays off. The excess energy is delivered to the
output slowly, forcing the converter to skip pulses as needed
to maintain regulation. The on-time and off-time are set
internally based on the inductor value (1.5 mH Typical) and
maximum load current. With a 1.5-mH inductor, the Si9172
guarantees to deliver minimum of 170-mA load current. This
current capability decreases as the inductance increases. In
pulse-skipping mode, the switching frequency, fsw, varies with
load current. When the load increases, fsw increases as well.
The typical conversion efficiency in PSM mode is 90%.
Efficiency is higher at high output voltage and decreases with
the output voltage.
can support, the converter will be in drop out mode and the
output voltage will be the input voltage minus the resistive drop
of the MOSFET and inductor.
BYPASS Mode
The Si9172 can also operate in Bypass mode to handle heavy
load current. In this mode the IC ignores the feedback signal
at the FB pin, forcing the internal PMOS to turn on at 100% duty
cycle. The input-output voltage differential is merely the
resistive voltage drop on the MOSFET and the inductor. The
Si9172 can bypass at least 800mA at 95% typical efficiency.
Whenever the converter enters BP mode, regardless
switching from PSM or starting up, the PMOS turns on
gradually within 100 ms.
Shutdown
The Si9172 is designed to conserve as much battery life as
possible by decreasing current consumption of the IC during
normal operation as well as the shutdown mode. With logic
low level on the ENABLE pin, the current consumption of the
IC is decreased to less than 1 mA by shutting off most of the
circuits. A logic high enables the controller and starts up as
described in the “Start-Up” section above.
Reference
The reference voltage of the Si9172 is set to 1.215 V. It is
internally connected to the non-inverting inputs of the error
amplifier. A 0.1-mF decoupling capacitor is required at the VREF
pin.
Power Switches
The main MOSFET switch is integrated in the Si9172 for
optimum performance and minimum overall converter size.
The internal MOSFET is designed to minimize the gate charge
loss as well as the conduction loss. The typical on-resistance
of the PMOS is 150 mW with a minimum VIN pin voltage of
3.3 V.
An external Schottky diode is mandatory for PSM mode
operation. It freewheels the inductor current after the main
switch is turned off, which is typical in basic non-synchronous
buck converter operation. It must be rated at 800 mA or higher,
with low forward drop to minimize power loss. The diode has
to be connected at PGND with the cathode connected to the
LX pin.
Over Temperature Protection
Adjustable Output
In PSM mode, the output voltage regulation point can be
adjusted by an external analog voltage signal at the ADJ pin.
When this voltage varies from 0.4 V to 2.5 V, the output voltage
also increases linearly from 1.5 V to 3.6 V. When the
programmed output voltage is higher than the input voltage
Document Number: 71379
S-02890—Rev. A, 21–Dec-00
The Si9172 includes an over temperature protection circuit to
prevent thermal runaway in the MOSFET switch. If the
temperature reaches 165_C, an internal soft-start capacitor is
discharged, shutting down the output stage. The converter
remains in the disabled mode until the temperature in the IC
decreases below 140_C.
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Si9172
New Product
Vishay Siliconix
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
VIN Current vs. VIN Voltage
FB Threshold vs. ADJ Voltage
220
3.6
PSM Mode
180
2.9
160
FB (V)
VIN Current (mA)
200
140
120
2.2
100
BP Mode
80
60
2
3
4
5
1.5
0.4
6
1.1
1.8
VIN Voltage (V)
ADJ (V)
rDS(on) vs. VIN
PSM Mode Efficiency vs. Load
100
VADJ = 1.1 V
VOUT = 2.2 V
85_C
180
VIN = 3 V
95
Efficiency (%)
rDS(on) – On-Resistance ( Ω )
220
25_C
140
–25_C
100
VIN = 4.2 V
90
85
60
80
2
3
4
VIN (V)
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2.5
5
6
0
40
80
120
160
200
LOAD (mA)
Document Number: 71379
S-02890—Rev. A, 21–Dec-00
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Vishay
Disclaimer
All product specifications and data are subject to change without notice.
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or in any other disclosure relating to any product.
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Document Number: 91000
Revision: 18-Jul-08
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