HAT2020R Silicon N Channel Power MOS FET High Speed Power Switching REJ03G1157-1200 (Previous: ADE-208-439J) Rev.12.00 Sep 07, 2005 Features • • • • Low on-resistance Capable of 4 V gate drive Low drive current High density mounting Outline RENESAS Package code: PRSP0008DD-D (Package name: SOP-8 <FP-8DAV> ) 5 6 7 8 D D D D 65 87 1, 2, 3 4 5, 6, 7, 8 4 G 12 34 S S S 1 2 3 Rev.12.00 Sep 07, 2005 page 1 of 6 Source Gate Drain HAT2020R Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Symbol VDSS Value 30 Unit V VGSS ID ±20 8 V A 64 8 A A 2.5 150 W °C ID (pulse) IDR Note 1 Note 2 Channel dissipation Channel temperature Pch Tch °C Storage temperature Tstg –55 to +150 Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW ≤ 10 s Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Symbol V (BR) DSS Min 30 Typ — Max — Unit V Gate to source breakdown voltage Gate to source leak current V (BR) GSS IGSS ±20 — — — — ±10 V µA IG = ±100 µA, VDS = 0 VGS = ±16 V, VDS = 0 IDSS VGS (off) — 1.0 — — 10 2.0 µA V VDS = 30 V, VGS = 0 VDS = 10 V, ID = 1 mA RDS (on) RDS (on) — — 0.020 0.030 0.028 0.050 Ω Ω ID = 4 A, VGS = 10 V Note 3 ID = 4 A, VGS = 4 V Forward transfer admittance Input capacitance |yfs| Ciss 7 — 11 780 — — S pF Output capacitance Reverse transfer capacitance Coss Crss — — 560 240 — — pF pF ID = 4 A, VDS = 10 V VDS = 10 V VGS = 0 f = 1 MHz Turn-on delay time Rise time td (on) tr — — 35 240 — — ns ns VGS = 4 V, ID = 4 A, VDD ≅ 10 V Turn-off delay time Fall time td (off) tf — — 50 100 — — ns ns Body-drain diode forward voltage Body-drain diode reverse recovery time VDF trr — — 0.8 55 1.3 — V ns Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Note: 3. Pulse test Rev.12.00 Sep 07, 2005 page 2 of 6 Test Conditions ID = 10 mA, VGS = 0 Note 3 IF = 8 A, VGS = 0 IF = 8 A, VGS = 0 diF/dt = 20 A/µs Note 3 Note 3 HAT2020R Main Characteristics Maximum Safe Operation Area Power vs. Temperature Derating 100 3.0 2.0 1.0 0 0 50 100 Ambient Temperature 10 DC PW Op er 3 1m = 10 at ion 1 Operation in 0.3 this area is limited by RDS (on) 0.1 0.03 Ta = 25°C 1 shot Pulse 0.01 0.1 0.3 1 200 150 10 µs 30 ID (A) Test Condition: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm), PW ≤ 10 s Drain Current Channel Dissipation Pch (W) 4.0 (P W ms No ≤1 0 3 10 Drain to Source Voltage Ta (°C) 100 µs s te 4 s) 30 100 VDS (V) Note 4: When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) Typical Transfer Characteristics Typical Output Characteristics 20 10 V 6V 5V (A) 16 VDS = 10 V Pulse Test 3.5 V Pulse Test 16 ID 4.5 V 4V 12 12 Drain Current Drain Current ID (A) 20 3V 8 4 8 25°C Tc = 75°C 4 VGS = 2.5 V –25°C 0 0 0 2 4 6 Drain to Source Voltage 8 10 0 0.08 0.06 ID = 2 A 0.04 1A 0.02 0.5 A 0 0 2 4 6 Gate to Source Voltage Rev.12.00 Sep 07, 2005 page 3 of 6 8 10 VGS (V) 3 4 5 VGS (V) Static Drain to Source on State Resistance vs. Drain Current Drain to Source on State Resistance RDS (on) (Ω) Drain to Source Voltage VDS (on) (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Pulse Test 2 Gate to Source Voltage VDS (V) 0.10 1 0.5 Pulse Test 0.2 0.1 0.05 VGS = 4 V 0.02 10 V 0.01 0.005 0.2 0.5 1 2 Drain Current 5 10 ID (A) 20 Static Drain to Source on State Resistance vs. Temperature Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS (on) (Ω) HAT2020R 0.10 Pulse Test 0.08 0.06 ID = 0.5 A, 1 A, 2 A 0.04 VGS = 4 V 0.02 0.5 A, 1 A, 2 A 10 V 0 –40 0 40 80 Case Temperature 120 Tc 160 50 20 Tc = –25°C 10 25°C 5 75°C 2 1 VDS = 10 V Pulse Test 0.5 0.2 5 10 20 10000 Capacitance C (pF) 200 100 50 20 10 1 2 5 10 Ciss Coss 300 Crss 100 0 10 20 30 40 50 Drain to Source Voltage VDS (V) Dynamic Input Characteristics Switching Characteristics 12 VDS VGS 8 20 10 4 VDD = 25 V 10 V 5V 0 8 16 Gate Charge Rev.12.00 Sep 07, 2005 page 4 of 6 24 0 32 Qg (nc) 40 1000 Switching Time t (ns) 16 VDD = 5 V 10 V 25 V VGS (V) Reverse Drain Current IDR (A) 40 0 1000 20 ID = 8 A 30 3000 10 0.5 20 50 VGS = 0 f = 1 MHz 30 di / dt = 20 A / µs VGS = 0, Ta = 25°C Gate to Source Voltage Reverse Recovery Time trr (ns) 2 Typical Capacitance vs. Drain to Source Voltage 500 5 0.2 VDS (V) 1 Drain Current ID (A) (°C) Body-Drain Diode Reverse Recovery Time Drain to Source Voltage 0.5 500 tr 200 tf 100 td(off) 50 20 10 0.2 td(on) VGS = 4 V, VDD = 10 V PW = 3 µs, duty ≤ 1 % 0.5 1 2 Drain Current 5 ID (A) 10 20 HAT2020R Reverse Drain Current vs. Source to Drain Voltage 20 Reverse Drain Current IDR (A) Pulse Test 16 12 VGS = 0 V 8 5V 4 0 0 0.4 0.8 1.2 Source to Drain Voltage 1.6 2.0 VSD (V) Normalized Transient Thermal Impedance γ s (t) Normalized Transient Thermal Impedance vs. Pulse Width 10 1 D=1 0.5 0.2 0.1 0.1 θch – f (t) = γ s (t) • θch – f θch – f = 83.3°C/W, Ta = 25°C When using the glass epoxy board (FR4 40 × 40 × 1.6 mm) 0.05 0.01 0.02 0.01 0.001 1s 0.0001 10 µ ho tp D= PDM e uls PW T PW T 100 µ 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) Switching Time Test Circuit Switching Time Waveform 90% Vout Monitor Vin Monitor D.U.T. Vin 10% RL Vout Vin 4V 50 Ω VDD = 10 V 10% 90% td(on) Rev.12.00 Sep 07, 2005 page 5 of 6 10% tr 90% td(off) tf HAT2020R Package Dimensions JEITA Package Code RENESAS Code P-SOP8-3.95 × 4.9-1.27 PRSP0008DD-D Package Name FP-8DAV 0.085g F *1 D MASS[Typ.] bp 5 Index mark 1 c HE *2 E 8 4 Z Terminal cross section (Ni/Pd/Au plating) *3 bp x M NOTE) 1. DIMENSIONS "*1(Nom)" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. e Reference Symbol L1 Dimension in Millimeters Min Nom Max D 4.90 5.3 E 3.95 A2 A1 0.10 0.14 0.25 0.34 0.40 0.46 0.15 0.20 0.25 1.75 A A bp A1 b1 c L c1 0° y HE Detail F 5.80 e 8° 6.10 6.20 1.27 x 0.25 y 0.1 Z 0.75 L L1 0.40 0.60 1.27 1.08 Ordering Information Part Name Quantity Shipping Container HAT2020R-EL-E 2500 pcs Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.12.00 Sep 07, 2005 page 6 of 6 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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