2SJ517 Silicon P Channel MOS FET REJ03G0874-0400 (Previous: ADE-208-575B) Rev.4.00 Sep 07, 2005 Description High speed power switching Features • Low on-resistance RDS (on) = 0.18 Ω typ. (at VGS = –4 V, ID = –1 A) • Low drive current • High speed switching • 2.5 V gate drive devices. Outline RENESAS Package code: PLZZ0004CA-A (Package name: UPAK R ) D 3 2 1 1. Gate 2. Drain 3. Source 4. Drain G 4 S Note: Marking is “YY”. *UPAK is a trademark of Renesas Technology Corp. Rev.4.00 Sep 07, 2005 page 1 of 6 2SJ517 Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body to drain diode reverse drain current Symbol VDSS Value –20 Unit V VGSS ID ±10 –2 V A –4 –2 A A 1 150 W °C –55 to +150 °C ID (pulse) IDR Note 1 Note 2 Channel dissipation Channel temperature Pch Tch Storage temperature Tstg Notes: 1. PW ≤ 100 µs, duty cycle ≤ 10% 2. When using the aluminium ceramic board (12.5 × 20 × 0.7 mm) Electrical Characteristics (Ta = 25°C) Item Drain to source breakdown voltage Symbol V (BR) DSS Min –20 Typ — Max — Unit V Gate to source breakdown voltage Zero gate voltage drain current V (BR) GSS IDSS ±10 — — — — –10 V µA IG = ±100 µA, VDS = 0 VDS = –20 V, VGS = 0 IGSS VGS (off) — –0.5 — — ±10 –1.5 µA V VGS = ±8 V, VDS = 0 ID = –1 mA, VDS = –10 V RDS (on) RDS (on) — — 0.18 0.27 0.24 0.43 Ω Ω ID = –1 A, VGS = –4 V Note 3 ID = –1 A, VGS = –2.5 V Forward transfer admittance Input capacitance |yfs| Ciss 1.8 — 3.0 320 — — S pF Output capacitance Reverse transfer capacitance Coss Crss — — 190 90 — — pF pF ID = –1 A, VDS = –10 V VDS = –10 V VGS = 0 f = 1 MHz Turn-on delay time Rise time td (on) tr — — 14 75 — — ns ns Turn-off delay time Fall time td (off) tf — — 90 90 — — ns ns Body to drain diode forward voltage Body to drain diode reverse recovery time VDF trr — — –0.95 70 — — V ns Gate to source leak current Gate to source cutoff voltage Static drain to source on state resistance Note: 3. Pulse test Rev.4.00 Sep 07, 2005 page 2 of 6 Test Conditions ID = –10 mA, VGS = 0 Note 3 VGS = –4 V ID = –1 A RL = 10 Ω IF = –2 A, VGS = 0 IF = –2 A, VGS = 0 diF/dt = 50 A/µs Note 3 2SJ517 Main Characteristics Power vs. Temperature Derating ID (A) Drain Current 50 100 150 Ambient Temperature D C –0.3 200 sh ot ) –0.1 Operation in this area is limited by RDS (on) –0.03 tio n –3 –10 –30 –100 Typical Transfer Characteristics –5 Pulse Test –4 V –3 V –2.5 V VDS = –10 V Pulse Test ID (A) ID (A) O s (1 Drain to Source Voltage VDS (V) –3 –4 –25°C –2 V –2 –1 Tc = 75°C 25°C –3 Drain Current Drain Current m m ra Ta (°C) –10 V –4 1 pe Typical Output Characteristics –5 10 s Ta = 25°C –0.01 –1 –0.1 –0.3 0 0 = –1 µs 0.5 PW µs 1.0 –3 0 1.5 10 Channel Dissipation –10 Test Condition: When using the aluminum ceramic board (12.5 × 20 × 70 mm) 10 Pch (W) 2.0 Maximum Safe Operation Area –2 –1 VGS = –1.5 V 0 0 –2 –4 –6 –8 Drain to Source Voltage 0 0 –10 VDS (V) –0.8 –0.6 –0.4 ID = –2 A –0.2 –1 A –0.5 A 0 0 –2 –4 –6 Gate to Source Voltage Rev.4.00 Sep 07, 2005 page 3 of 6 –8 –10 VGS (V) –3 –4 –5 VGS (V) Static Drain to Source on State Resistance vs. Drain Current Drain to Source on State Resistance RDS (on) (Ω) Drain to Source Saturation Voltage VDS (on) (V) Pulse Test –2 Gate to Source Voltage Drain to Source Saturation Voltage vs. Gate to Source Voltage –1.0 –1 1 0.5 VGS = –2.5 V 0.2 –4 V 0.1 0.05 0.02 Pulse Test 0.01 –0.1 –0.2 –0.5 –1 Drain Current –2 –5 ID (A) –10 2SJ517 Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance RDS (on) (Ω) Static Drain to Source on State Resistance vs. Temperature 0.5 Pulse Test ID = –2 A 0.4 VGS = –2.5 V –1 A 0.3 –0.5 A 0.2 –0.5 A, –1 A, –2 A –4 V 0.1 0 –40 0 40 80 Case Temperature 120 160 10 5 Tc = –25°C 2 25°C 1 75°C 0.5 0.2 VDS = –10 V Pulse Test 0.1 –0.1 –0.2 Tc (°C) –5 –10 1000 500 200 Capacitance C (pF) Reverse Recovery Time trr (ns) –2 Typical Capacitance vs. Drain to Source Voltage 500 100 50 20 10 –0.5 –1 –2 Reverse Drain Current –5 Ciss 200 Coss 100 Crss 50 20 di / dt = 50 A / µs VGS = 0, Ta = 25°C 5 –0.1 –0.2 10 –20 IDR (A) –20 –8 VDD = –5 V –10 V –30 –12 VGS –16 –40 –50 0 4 8 Gate Charge Rev.4.00 Sep 07, 2005 page 4 of 6 12 16 Qg (nc) –4 –8 –12 –16 –20 –20 20 500 Switching Time t (ns) –4 VDS VGS (V) 0 VDD = –5 V –10 V –10 0 Switching Characteristics Gate to Source Voltage 0 VGS = 0 f = 1 MHz Drain to Source Voltage VDS (V) Dynamic Input Characteristics VDS (V) –1 Drain Current ID (A) Body-Drain Diode Reverse Recovery Time Drain to Source Voltage –0.5 200 td(off) 100 tf tr 50 20 td(on) 10 VGS = –4 V, VDD = –10 V duty ≤ 1 % 5 –0.1 –0.2 –0.5 –1 Drain Current –2 ID (A) –5 –10 2SJ517 Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current IDR (A) –5 –4 –4 V –3 –2 VGS = 0, 5 V –2.5 V –1 Pulse Test 0 0 –0.4 –0.8 –1.2 –1.6 Source to Drain Voltage VSD –2.0 (V) Switching Time Test Circuit Waveform Vin Vout Monitor Vin Monitor 10% D.U.T. 90% RL 90% 90% Vin 4V 50 Ω VDD = –10 V Vout td(on) Rev.4.00 Sep 07, 2005 page 5 of 6 10% 10% tr td(off) tf 2SJ517 Package Dimensions RENESAS Code Package Name MASS[Typ.] PLZZ0004CA-A UPAK / UPAKV 0.050g 1.5 1.5 3.0 1.5 ± 0.1 0.44 Max 2.5 ± 0.1 4.25 Max (1.5) 0.44 Max (0.2) 0.53 Max 0.48 Max 0.8 Min φ1 0.4 4.5 ± 0.1 1.8 Max Unit: mm (2.5) SC-62 (0.4) JEITA Package Code Ordering Information Part Name 2SJ517YYTL-E 2SJ517YYTR-E Quantity 1000 pcs 1000 pcs Shipping Container Taping Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.4.00 Sep 07, 2005 page 6 of 6 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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