M62001L/FP to M62008L/FP Low Power 2 Output System Reset IC Series REJ03D0781-0100 Rev.1.00 Sep 14, 2005 Description The M62001 to M62008 are semiconductor integrated circuits whose optimum use is for the detection of the rise and fall in the power supply to a microcomputer system in order to reset or release the microcomputer system. The M62001 to M62008 carry out voltage detection in two-steps and have two output pins. As Bi-CMOS process and low power dissipating circuits are employed, they output optimum signals through each output pin to a system that requires RAM backup. As output signals, interruption (INT) and compulsive reset (RESET) signals are available. The interruption signal (INT) is used to alter the microcomputer from normal mode to backup mode and vice versa. These output signals are classified into pulse type (M62001 to M62004) and hold type (M62005 to M62008). Features • Bi-CMOS process realizes a configuration of low current dissipating circuits. Circuit current ICC = 5 µA (Typ, normal mode, VCC = 5.0 V) ICC = 1 µA (Typ, backup mode, VCC = 2.5 V) • Two-step detection of supply voltage Detection voltage in normal mode (2 types) VS = 4.45 V/4.25 V (Typ) Detection voltage in backup mode VBATT = 2.15 V (Typ) • Two outputs Reset output (RESET): output of compulsive reset signal Interruption output (INT): output of interruption signal • Two types of output forms: CMOS and open drain • Two types of interruption output (INT) signals Pulse type (M62001 to M62004) Hold type (M62005 to M62008) • Two types of outline packages 5-pin plastic SIP (single in-line package) 8-pin plastic SOP (mini flat package) • Output based on RAM backup mode (see the timing chart) Application • Prevention of errors in microcomputer system in electronic equipment that requires RAM backup, such as office, industrial, and home-use equipment. Rev.1.00 Sep 14, 2005 page 1 of 9 M62001L/FP to M62008L/FP Pin Arrangement M62001L to M62008L M62001FP to M62008FP RESET 1 5 VCC 4 Cd 8 INT Cd 2 3 RESET 2 INT 1 GND 7 GND VCC 3 6 NC NC 4 5 NC (Top view) (Top view) NC: No Connection Package: 5P5T Package: PRSP0008DA-A (8P2S-A) Block Diagram VCC 3 + – + – 7 GND (Ground pin) Rev.1.00 Sep 14, 2005 page 2 of 9 Interruption signal generation block Reset signal generation block 2 Cd (Pin to delay capacitance) 8 INT 1 RESET M62001L/FP to M62008L/FP Absolute Maximum Ratings (Ta = 25°C, unless otherwise noted) Item Supply voltage Symbol VCC Ratings 8 Unit V Output sink current Power dissipation Conditions Isink Pd 5 440 mA mW Thermal derating Operating temperature Kθ Topr 4.4 –20 to +75 mW/°C °C Storage temperature Tstg –40 to +125 °C Test Conditions Ta ≥ 25°C Electrical Characteristics (Ta = 25°C, unless otherwise noted) Item Supply voltage Symbol Min Typ Max Unit VS 4.30 4.45 4.60 V 4.05 4.25 4.45 2.00 — 2.15 100 2.30 — Interruption level during VCC drop (Equivalent to VSL) M62001, M62002, M62005, M62006, M62003, M62004, M62007, M62008, Battery voltage Hysteresis voltage VBATT ∆VS Circuit current ICC — — 5.0 1.0 20 4 µA VCC = 5.0V: in normal mode VCC = 2.5V: in backup mode Sink ability Vsat1 — 0.2 0.4 V Source ability Vsat2 — 0.2 0.4 VCC = 4V, IO = 4mA (Output saturation voltage of N-ch transistor) VCC = 4V, IO = 1mA (Output saturation voltage of P-ch transistor) [CMOS output] M62001, M62003, M62005, M62007 Delay time Pulse width td tpw — — 50 7 — 10 ms µs External capacitance Cd = 0.33µF Output pulse width (M62001, M62002, M62003, M62004) Reset output response time Interruption output reset time tRESET — 30 — µs tINT — 100 — µs Time between VCC (when falling) = VBATT and output of RESET signal Time between VCC (when falling) = VS and output of INT signal mV Reset level at backup ∆VS = VSH – VSL Summary of M62001L/FP to M62008L/FP Type No. M62001L/FP Supply Voltage Detection Level VS (V) 4.45 Battery Voltage Detection Level VBATT (V) 2.15 Output Form CMOS M62002L/FP M62003L/FP 4.25 Open drain CMOS M62004L/FP M62005L/FP 4.45 Open drain CMOS 4.25 Open drain CMOS M62006L/FP M62007L/FP M62008L/FP Rev.1.00 Sep 14, 2005 page 3 of 9 Open drain Interruption Signal Output Mode Pulse output Hold output M62001L/FP to M62008L/FP Typical Characteristics Thermal Derating (Maximum Rating) Circuit Curent vs. Supply Voltage Power Dissipation Pd (mW) 1000 8 6 4 2 2 4 6 8 600 400 200 25 50 75 100 125 Supply Voltage VCC (V) Ambient Temperature Ta (°C) Reset Output Voltage vs. Supply Voltage 5 Interruption Output Voltage vs. Supply Voltage 5 3 2 1 0 0 2 VBATT 3 1 4 VSH 5 4 3 2 1 0 0 Uncertain area 4 1 2 4VSLVSH 5 3 Supply Voltage VCC (V) Supply Voltage VCC (V) Delay Capacitance vs. Delay Time Limit Operating Voltage (Open drain type) 2.0 Output Voltage VOUT (V) 10 Delay Capacitance C (µF) 800 0 0 10 Uncertain area Reset Output Voltage VRESET (V) 0 0 Interruption Output Voltage VINT (V) Circuit Curent ICC (µA) 10 1.0 0.1 0.01 1 10 100 Delay Time td (ms) Rev.1.00 Sep 14, 2005 page 4 of 9 1000 1.5 1.0 RL = 10kΩ 0.5 RL = 100kΩ RL = 1MΩ 0 0 0.5 1.0 1.5 Supply Voltage VCC (V) 2.0 M62001L/FP to M62008L/FP Detection Voltage vs. Ambient Temperature (Battery voltage) 2.20 6 5 VCC = 5V 4 3 2 VCC = 3V VCC = 2V 1 0 –40 –20 0 20 40 60 2.15 2.10 2.05 –40 –20 0 80 100 20 40 60 80 100 Ambient Temperature Ta (°C) Ambient Temperature Ta (°C) Detection Voltage vs. Ambient Temperature (Detection at 4.45V type) 4.50 Detection Voltage vs. Ambient Temperature (Detection at 4.25V type) 4.30 Detection Voltage VS (V) Detection Voltage VS (V) Detection Voltage VBATT (V) Circuit Current ICC (µA) Circuit Current vs. Ambient Temperature 7 4.45 4.40 4.35 –40 –20 0 4.25 4.20 4.15 –40 –20 0 20 40 60 80 100 20 40 60 80 100 Nch Output Saturation Voltage vs. Output Sink Current 0.5 Pch Output Saturation Voltage vs. Output Source Current 1.0 VCC = 4V 0.4 0.3 VCC RES INT GND Isink V Vsat 0.2 0.1 0 0 1 2 3 4 Output Sink Current Isink (mA) Rev.1.00 Sep 14, 2005 page 5 of 9 5 Output Saturation Voltage Vsat (V) Ambient Temperature Ta (°C) Output Saturation Voltage Vsat (V) Ambient Temperature Ta (°C) VCC = 5→4V 0.8 VCC V Vsat RES 0.6 Isource GND 0.4 0.2 0 0 1 2 3 4 5 Output Source Current Isource (mA) M62001L/FP to M62008L/FP Operating Principle Description In general, the memory backup function of a microcomputer, as shown in figure 1, uses two diodes to switch between main power supply and backup power supply. The M62001 to M62008 are ICs that, in such memory backup operation, monitor in two steps each voltage on the VDD line. VDD VCC INT Main power supply RESET M62001 Backup power supply INT RESET Microcomputer system Figure 1 The ICs have an intelligent sequence such as substantial hysteresis action of RESET toward normal state at restoration of supply voltage, as well as two-step detection in low power dissipation mode. Detailed Description 1. Two-step detection The ICs perform two-step detection of supply voltage and have two output pins (INT and RESET). Although they have two comparators for two-step detection, they differ significantly from such that are simply provided with independent detectors, because the RESET output signal is dependent at power-up and the like upon the INT output signal. INT Output Voltage [Hold Type] (V) 2. INT output (Detection of 4.45 V and 4.25 V) The INT output at the power-up of supply voltage detects VSH (4.45 V/4.25 V) to inform the microcomputer system of the fact that the supply voltage has reached its normal level. When the supply voltage drops from its normal level to VSL (4.45 V/4.25 V) an interruption signal is output to alter the microcomputer system into RAM backup mode. The microcomputer at this point enters sleep state and secures memory by a stop command issued by the interruption signal. These detection voltage, VSH the rise, and VSL the fall, of supply voltage, have a 100 mV hysteresis voltage between themselves. VSH – VSL ≈ 100 (mV) INT Output Voltage vs. Supply Voltage 5 4 3 VSL VSH 2 1 0 4.0 4.2 4.4 4.6 4.8 5.0 Supply Voltage VCC (V) Figure 2 INT Output (Detection of 4.45 V and 4.25 V) Rev.1.00 Sep 14, 2005 page 6 of 9 M62001L/FP to M62008L/FP 3. RESET output (Detection of 2.15 V) The RESET outputs a signal to prevent the microcomputer from malfunctioning due to a drop in supply voltage. When powering up, RESET is kept at low level until the supply voltage reaches VSH. If the supply voltage rises to VSH, RESET is set to high level. By inserting a capacitor between the Cd pin and GND, it is possible to produce a desired delay time (td). To set a delay time, equation below is used. 5 td ≈ 1.52 × 10 × C (s) Once the supply voltage has exceeded VSH and the RESET output is set to high level, RESET maintains the high level until the supply voltage drops to VBATT. When the supply voltage drops to VBATT, RESET goes low thereby resetting and initializing the microcomputer. The RESET output has a large hysteresis voltage of approximately 2 V between the rise in supply voltage at powerup and its fall. RESET Output Voltage (V) RESET Output Voltage vs. Supply Voltage 5 4 3 2 VBATT VSH 1 0 2 3 4 5 Supply Voltage VCC (V) Figure 3 RESET Output (Detection of 2.15 V) Rev.1.00 Sep 14, 2005 page 7 of 9 M62001L/FP to M62008L/FP Operating Description VSH VSL VSH VSL VSH VSLVBATT VSH VSLVBATT VCC GND Uncertain area INT (Hold output type) GND INT (Pulse output type) Uncertain area Pulse width 7µs GND Uncertain area RESET td td GND (1)(2) (3) (1): If VCC rises to VSH (4.55V, 4.35V), the INT output is set to high level. *1. A pulse is output if INT is of pulse output type. (2): RESET goes high td (s) after VSH. *1. td ≈ 1.52 × 105 × C (s) (3): If VCC drops to VSL (4.45V, 4.25V), INT goes low. *1. A pulse is output if INT is of pulse output type. *2. The RESET output continues to be held high. (4) (5) (6) (7)(8) (9) (10) (4): If VCC returns to VSH, the INT output is set to high level. (5): Same as (3). (6): If VCC becomes lower than VBATT (2.15V), the RESET output is set to low thereby resetting the microcomputer and initializing system. (7): Same as (1). (8): Same as (2). (9): Same as (3) and (5). (10): Same as (6). Figure 4 Operating Waveform Application Example Power supply VCC (+5V) Backup power supply VBATT (+3V) Smoothing + capacitor 100µF + – + – Delay capacitor VDD Power supply pin VCC INT *Note INT (Interruption reset signal) INT Interruption input RESET *Note RESET (Compulsive reset signal) RESET Reset input Cd 0.33µF M6200x Microcomputer system reset IC Note: A pull-up resistor is required only in the case of open-drain output. Figure 5 Application Example Rev.1.00 Sep 14, 2005 page 8 of 9 Clock input/output Microcomputer system M62001L/FP to M62008L/FP Package Dimensions 5P5T Plastic 5pin 240mil SIP EIAJ Package Code SIP5-P-240-2.54 Weight(g) 0.22 JEDEC Code – Lead Material Cu Alloy D L A1 A A2 E Symbol 1 b e 5 E1 b2 A A1 A2 b b1 b2 c D E E1 e L c b1 SEATING PLANE JEITA Package Code RENESAS Code Previous Code MASS[Typ.] P-SOP8-4.4x5-1.27 PRSP0008DA-A 8P2S-A 0.07g E 5 *1 HE 8 Dimension in Millimeters Min Nom Max – – 6.1 – – 1.4 – – 4.0 0.4 0.5 0.6 1.1 1.2 1.5 0.75 0.85 1.15 0.22 0.27 0.34 11.7 11.9 11.5 1.77 1.97 2.17 0.6 0.7 0.8 – – 2.54 – – 3.0 F 1 NOTE) 1. DIMENSIONS "*1" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. 4 Index mark c A2 *2 A1 D L A Reference Symbol *3 e Nom Max D 4.8 5.0 5.2 E 4.2 4.4 4.6 1.5 A2 A1 bp Dimension in Millimeters Min 0.05 A y 1.9 bp 0.35 0.4 c 0.13 0.15 Detail F 0° 0.2 10° HE 5.9 6.2 6.5 e 1.12 1.27 1.42 0.2 0.4 y L Rev.1.00 Sep 14, 2005 page 9 of 9 0.5 0.1 0.6 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. 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