MICROCHIP TC1043CEQR

TC1043
Linear Building Block – Low Power Voltage Reference with
Dual Op Amp, Dual Comparator, and Shutdown Mode
Features
General Description
• Combines Two Op Amps, Two Comparators and
a Voltage Reference in a Single Package
• Optimized for Single-Supply Operation
• Small Package: 16-Pin QSOP
• Ultra Low Input Bias Current: Less than 100pA
• Low Quiescent Current: Operating 16µA (Typ.)
Shutdown 6µA (Typ.)
• Rail-to-Rail Inputs and Outputs
• Operates Down to VDD = 1.8V
• Reference and One Comparator Remain Active in
Shutdown to Provide Supervisory Functions
The TC1043 is a mixed-function device combining two
general purpose op amps, two general purpose comparators, and a voltage reference in a single 16-Pin
package.
Applications
•
•
•
•
Power Management Circuits
Battery Operated Equipment
Consumer Products
Replacements for Discrete Components
This increased integration allows the user to replace
two or three packages, saving space, lowering supply
current, and increasing system performance. A shutdown input, SHDN, disables the op amps and one of
the comparators, placing their outputs in a high-impedance state. The reference and one comparator stay
active in shutdown mode. Standby power consumption
is typically 6µA. Both the op amps and comparators
have rail-to-rail inputs and outputs which allows operation from low supply voltages with large input and output signal swings.
Packaged in a 16-Pin QSOP, the TC1043 is ideal for
applications requiring high integration, small size and
low power.
Device Selection Table
Part Number
Package
Temperature
Range
TC1043CEQR
16-Pin QSOP
-40°C to +85°C
Package Type
16-Pin QSOP
16 VDD
A1IN– 2
15 A1OUT
A2IN+ 3
A2IN– 4
C1OUT 5
C2OUT 6
TC1043_EQR
A1IN+ 1
14 A2OUT
13 C1IN+
12 C1IN–
11 C2IN+
SHDN 7
10 C2IN–
VSS
9 VREF
8
 2002 Microchip Technology Inc.
DS21347B-page 1
TC1043
1.0
ELECTRICAL
CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS*
Supply Voltage ......................................................6.0V
Voltage on Any Pin ........... (VSS – 0.3V) to (VDD +0.3V)
Junction Temperature....................................... +150°C
Operating Temperature Range............. -40°C to +85°C
Storage Temperature Range .............. -55°C to +150°C
*Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
These are stress ratings only and functional operation of the
device at these or any other conditions above those indicated in the operation sections of the specifications is not
implied. Exposure to Absolute Maximum Rating conditions
for extended periods my affect device reliability.
TC1043 ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Typical values apply at 25°C and VDD = 3V. Minimum and maximum values apply for TA = -40° to
+ 85°C, and VDD = 1.8V to 5.5V, unless otherwise specified.
Min.
Typ
Max
Units
VDD
Symbol
Supply Voltage
Parameter
1.8
—
5.5
V
Test Conditions
IQ
Supply Current Operating
—
16
30
µA
All outputs unloaded,
SHDN = VDD
ISHDN
Supply Current, Shutdown
—
6
10
µA
CMPTR2 and VREF Outputs
unloaded, SHDN = VSS
80% VDD
—
—
V
Shutdown Input
VIH
Input High Threshold
VIL
Input Low Threshold
—
—
20% VDD
V
ISI
Shutdown Input Current
—
—
±100
nA
TSEL
Select Time
—
15
—
µsec
(VOUT from SHDN = VIH)
RL = 10kΩ to VSS
TDESEL
Deselect Time
—
100
—
nsec
(VOUT from SHDN = VIL)
RL = 10kΩ to VSS
ROUT(SD)
Output Resistance in Shutdown
20
—
—
MΩ
SHDN = VSS
COUT(SD)
Output Capacitance in Shutdown
—
—
6
pF
SHDN = VSS
—
100
—
V/mV
VSS - 0.2
—
VDD + 0.2
V
±100
±0.3
±500
±1.5
µV
mV
VDD = 3V, VCM = 1.5V, TA =
25°C, TA = -40°C to 85°C
-100
50
100
pA
TA = 25°C, VCM = VDD to VSS
—
±4
—
µV/°C
Op Amps
AVOL
Large Signal Voltage Gain
VICMR
Common Mode Input Voltage Range
VOS
Input Offset Voltage
IB
Input Bias Current
VOS(DRIFT)
Input Offset Voltage Drift
RL = 10kΩ, VDD = 5V
VDD = 3V, VCM = 1.5V
GBWP
Gain-Bandwidth Product
—
90
—
kHz
VDD = 1.8V to 5.5V
VO = VDD to VSS
SR
Slew Rate
—
35
—
mV/
µsec
CL = 100pF
RL = 1MΩ to GND
Gain = 1
VIN = VSS to VDD
VOUT
Output Signal Swing
VSS + 0.05
—
VSS - 0.05
V
RL = 10kΩ
CMRR
Common Mode Rejection Ratio
70
—
—
dB
TA = 25°C, VDD = 5V
VCM = VDD to VSS
PSRR
Power Supply Rejection Ratio
80
—
—
dB
TA = 25°C, VCM = VSS
VDD = VDD to VSS
ISRC
Output Source Current
3
—
—
mA
IN+ = VDD, IN- = VSS
Output Shorted to VSS
VDD = 1.8V, Gain = 1
ISINK
Output Sink Current
4
—
—
mA
IN+ = VSS, IN- = VDD
Output Shorted to VDD
VDD = 1.8V, Gain = 1
En
Input Noise Voltage
—
10
—
en
Input Noise Voltage Density
—
125
—
DS21347B-page 2
µVPP
0.1Hz to 10Hz
nV/√Hz 1kHz
 2002 Microchip Technology Inc.
TC1043
TC1043 ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Typical values apply at 25°C and VDD = 3V. Minimum and maximum values apply for TA = - 40° to + 85°C, and
VDD = 1.8V to 5.5V, unless otherwise specified.
Symbol
Parameter
Min.
Typ
Max
Units
Test Conditions
Comparators
ROUT(SD)
Output Resistance in Shutdown
20
—
—
MΩ
SHDN = VSS
COUT(SD)
Output Capacitance in Shutdown
—
—
5
pF
SHDN = VSS
TSEL
Select Time (For Valid Output)
—
20
—
µsec
VOUT from SHDN = VIH
RL =10kΩ to VSS
TDESEL
Deselect Time
—
500
—
nsec
VOUT from SHDN = VIL
RL =10kΩ to VSS
VICMR
Common Mode Input Voltage Range
VSS – 0.2
—
VDD + 0.2
V
VOS
Input Offset Voltage
–5
–5
—
+5
+5
mV
VDD = 3V, VCM = 1.5V
TA = 25°C
TA = -40°C to 85°C
IB
Input Bias Current
—
—
±100
pA
TA = 25°C,
IN+, IN- = VDD to VSS
VOH
Output High Voltage
VDD – 0.3
—
—
V
RL = 10kΩ to VSS
VOL
Output Low Voltage
—
—
0.3
V
RL = 10kΩ to VDD
CMRR
Common Mode Rejection Ratio
66
—
—
dB
TA = 25°C, VDD = 5V
VCM = VDD to VSS
PSRR
Power Supply Rejection Ratio
60
—
—
dB
TA = 25°C, VCM = 1.2V
VDD = 1.8V to 5V
ISRC
Output Source Current
1
—
—
mA
IN+ = VDD, IN- = VSS
Output Shorted to VSS
VDD = 1.8V
ISINK
Output Sink Current
2
—
—
mA
IN+ = VSS, IN- = VDD,
Output Shorted to VDD
VDD = 1.8V
tPD1
Response Time
—
4
—
µsec
100mV Overdrive, CL = 100pF
tPD2
Response Time
—
6
—
µsec
10mV Overdrive, CL = 100pF
Voltage Reference
VREF
Reference Voltage
1.176
1.200
1.224
V
IREF(SOURCE)
Source Current
50
—
—
µA
IREF(SINK)
Sink Current
50
—
—
µA
CL(REF)
Load Capacitance
—
—
100
NVREF
Voltage Noise
—
20
—
µVRMS 100Hz to 100kHz
Noise Density
—
1.0
—
µV/√Hz 1kHz
 2002 Microchip Technology Inc.
pF
DS21347B-page 3
TC1043
2.0
PIN DESCRIPTION
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Pin Number
Symbol
Description
1
A1IN+
Op Amp Non-Inverting Input
2
A1IN-
Op Amp Inverting Input
3
A2IN+
Op Amp Non-Inverting Input
4
A2IN-
Op Amp Inverting Input
5
C1OUT
Comparator Output
6
C2OUT
Comparator Output
7
SHDN
Shutdown Input
8
VSS
Negative Power Supply
9
VREF
Voltage Reference Output
10
C2IN-
Comparator Inverting Input
11
C2IN+
Comparator Non-Inverting Input
12
C1IN-
Comparator Inverting Input
13
C1IN+
Comparator Non-Inverting Input
14
A2OUT
Op Amp Output
15
A1OUT
Op Amp Output
16
VDD
DS21347B-page 4
Positive Power Supply
 2002 Microchip Technology Inc.
TC1043
3.0
DETAILED DESCRIPTION
The TC1043 is one of a series of very low power, linear
building block products targeted at low voltage, single
supply applications. The TC1043 minimum operating
voltage is 1.8V and typical supply current is only 20µA
(fully enabled). It combines two comparators, two op
amps and a voltage reference in a single package. A
shutdown mode is incorporated for easy adaptation to
system power management schemes. During shutdown, all but one comparator and the voltage reference
are disabled (i.e. powered down with their respective
outputs at high impedance). The “still awake” comparator and voltage reference can be used as a wake-up
timer, power supply monitor, LDO controller or other
continuous duty circuit function.
3.1
3.4
Shutdown Input
SHDN at VIL disables both op amps and one comparator. The SHDN input cannot be allowed to float. When
not used, connect it to VDD. The disabled comparator’s
output and the two disabled op amp outputs are in a
high impedance state when shutdown is active. The
disabled comparator’s inputs and the two disabled op
amp inputs can be driven from rail-to-rail by an external
voltage when the TC1043 is in shutdown. No latch-up
will occur when the device is driven to its enabled state
when SHDN is set to VIH.
Comparators
The TC1043 contains two comparators. The comparators input range extends beyond both supply voltages
by 200mV and the outputs will swing to within several
millivolts of the supplies, depending on the load current
being driven.
The comparators exhibit a propagation delay and supply current which are largely independent of supply
voltage. The low input bias current and offset voltage
make them suitable for high impedance precision applications.
Comparator CMPTR1 is disabled during shutdown and
has a high impedance output. Comparator CMPTR2
remains active.
3.2
Operational Amplifiers
The TC1043 contains two rail-to-rail op amps. The
amplifiers’ input range extends beyond both supplies
by 200mV and the outputs will swing to within several
millivolts of the supplies depending on the load current
being driven.
The amplifier design is such that large signal gain, slew
rate and bandwidth are largely independent of supply
voltage. The low input bias current and offset voltage of
the TC1043 make it suitable for precision applications.
Both op amps are disabled during shutdown and have
high output impedance.
3.3
Voltage Reference
A 2.0% tolerance, internally biased, 1.20V bandgap
voltage reference is included in the TC1043. It has a
push-pull output capable of sourcing and sinking at
least 50µA. The voltage reference remains fully
enabled during shutdown.
 2002 Microchip Technology Inc.
DS21347B-page 5
TC1043
4.0
TYPICAL APPLICATIONS
The TC1043 lends itself to a wide variety of applications, particularly in battery powered systems. It typically finds application in power management,
processor supervisory, and interface circuitry.
4.1
Wake-Up Timer
Many microcontrollers have a low power “sleep” mode
that significantly reduces their supply current. Typically,
the microcontroller is placed in this mode via a software
instruction, and returns to a fully enabled state upon
reception of an external signal (“wake-up”). The wakeup signal is usually supplied by a hardware timer. Most
system applications demand that this timer have a long
duration (typically seconds or minutes), and consume
as little supply current as possible.
The circuit shown in Figure 4-1 is a wake-up timer
made from comparator CMPTR2. (CMPTR2 is used
because the wake-up timer must operate when SHDN
is active.) Capacitor C1 charges through R1 until a voltage equal to VR is reached, at which point the WAKEUP is driven active. Upon wake-up, the microcontroller
resets the timer by forcing a logic low on a dedicated,
open drain I/O port pin. This discharges C1 through R4
(the value of R4 is chosen to limit the maximum current
sunk by the I/O port pin). With a 3V supply, the circuit
as shown consumes typically 6µA and furnishes a
nominal timer duration of 25 seconds.
4.2
4.3
Figure 4-3 shows a portion of a TC1043 configured as
a dual low dropout regulator with shutdown. AMP1 and
AMP2 are independent error amplifiers that use VR as
a reference. Resistors RA1, RB1, RA2 and RB2 set the
feedback around the amplifiers and therefore determine the output voltage settings (please see equation
in the figure). RA1, RB1, RA2 and RB2 can have large
ohmic values (i.e. 100’s of kΩ) to minimize supply current.
Using the 2N2222 output transistors as shown, these
regulators exhibit low dropout operation. For example,
with VOUT = 3.0V, the typical dropout voltage is only
50mV at an output current of 50mA. The unused comparators can be used in conjunction with this circuit as
power-on reset or low voltage detectors for a complete
LDO solution at a very low installed cost.
4.4
The circuit of Figure 4-2 uses a single TC1043 (one op
amp is unused) and only six external resistors. AMP 1
is a simple buffer, while CMPTR1 and CMPTR2 provide
precision voltage detection using VR as a reference.
Resistors R2 and R4 set the detection threshold for
BATTLOW, while resistors R1 and R3 set the detection
threshold for BATTFAIL. The component values shown
assert BATTLOW at 2.2V (typical) and BATTFAIL at
2.0V (typical). Total current consumed by this circuit is
typically 22µA at 3V. Resistors R5 and R6 provide hysteresis for comparators CMPTR1 and CMPTR2
respectively.
1.
Choose the feedback resistor RC. Since the
input bias current of the comparator is at most
100pA, the current through RC can be set to
100nA (i.e. 1000 times the input bias current)
and retain excellent accuracy. The current
through RC at the comparator’s trip point is VR /
RC where VR is a stable reference voltage.
FIGURE 4-1:
WAKE-UP TIMER
Microcontroller
R4
I/O*
VDD
VDD
R1
5M
–
C1
10µF
+
CMPTR2
WAKE-UP
VR
TC1043
*Open Drain Port Pin
2.
3.
DS21347B-page 6
External Hysteresis
Hysteresis can be set externally with two resistors
using positive feedback techniques (see Figure 4-3).
The design procedure for setting external comparator
hysteresis is as follows:
Precision Battery Monitor
Figure 4-2 is a precision battery low/battery dead monitoring circuit. Typically, the battery low output warns
the user that a battery dead condition is imminent. Battery dead typically initiates a forced shutdown to prevent operation at low internal supply voltages (which
can cause unstable system operation).
Dual LDO with Shutdown
Determine the hysteresis voltage (VHY) between
the upper and lower thresholds.
Calculate RA as follows:
 2002 Microchip Technology Inc.
TC1043
EQUATION 4-1:
V HY
R A = R C  -----------
V

DD
4.
5.
Choose the rising threshold voltage for VSRC
(VTHR).
Calculate RB as follows:
EQUATION 4-2:
1
R B = ----------------------------------------------------------V THR
 ---------------------  – 1 – 1
------- ------V × R  R
R
A
A RC
6.
Verify the threshold voltages with these formulas:
VSRC rising:
EQUATION 4-3:
1
1
1
V TH R = ( V R ) ( R A )  ------- +  ------- +  -------
R 
R 
R 
A
B
C
VSRC falling:
EQUATION 4-4:
( RA × VD D)
V THF = V THR – -----------------------------RC
4.5
32.768kHz ‘Time Of Day Clock’
Crystal Controlled Oscillator
A very stable oscillator driver can be designed by using
a crystal resonator as the feedback element. Figure 45 shows a typical application circuit using this technique to develop a clock driver for a Time-Of-Day
(TOD) clock chip. The value of R A and RB determines
the DC voltage level at which the comparator trips; in
this case one-half of VDD. The RC time constant of RC
and CA should be set several times greater than the
crystal oscillator’s period, which will ensure a 50% duty
cycle by maintaining a DC voltage at the inverting comparator input equal to the absolute average of the output signal.
4.6
Non-Retriggerable One Shot Multivibrator
Using two comparators, a non-retriggerable, one shot
multi-vibrator can be designed using the circuit configuration of Figure 4-6. A key feature of this design is that
the pulse width is independent of the magnitude of the
supply voltage because the charging voltage and the
intercept voltage are a fixed percentage of V DD. In addition, this one shot is capable of pulse width with as
much as a 99% duty cycle and exhibits input lockout to
ensure that the circuit will not re-trigger before the output pulse has completely timed out. The trigger level is
 2002 Microchip Technology Inc.
the voltage required at the input to raise the voltage at
node A higher than the voltage at node B, and is set by
the resistive divider R4 and R10 and the impedance
network composed of R1, R2 and R3. When the one
shot has been triggered, the output of CMPTR2 is high,
causing the reference voltage at the non-inverting input
of CMPTR1 to go to VDD. This prevents any additional
input pulses from disturbing the circuit until the output
pulse has timed out.
The value of the timing capacitor C1 must be small
enough to allow CMPTR1 to discharge C1 to a diode
voltage before the feedback signal from CMPTR2
(through R10) switches CMPTR1 to its high state and
allows C1 to start an exponential charge through R5.
Proper circuit action depends upon rapidly discharging
C1 through the voltage set by R6, R9 and D2 to a final
voltage of a small diode drop. Two propagation delays
after the voltage on C1 drops below the level on the
non-inverting input of CMPTR2, the output of CMPTR1
switches to the positive rail and begins to charge C1
through R5. The time delay which sets the output pulse
width results from C1 charging to the reference voltage
set by R6, R9 and D2, plus four comparator propagation delays. When the voltage across C1 charges
beyond the reference, the output pulse returns to
ground and the input is again ready to accept a trigger
signal.
4.7
Oscillators and Pulse Width
Modulators
Microchip’s linear building block comparators adapt
well to oscillator applications for low frequencies (less
than 100kHz). Figure 4-7 shows a symmetrical square
wave generator using a minimum number of components. The output is set by the RC time constant of R4
and C1, and the total hysteresis of the loop is set by R1,
R2 and R3. The maximum frequency of the oscillator is
limited only by the large signal propagation delay of the
comparator in addition to any capacitive loading at the
output which degrades the slew rate.
To analyze this circuit, assume that the output is initially
high. For this to occur, the voltage at the inverting input
must be less than the voltage at the non-inverting input.
Therefore, capacitor C1 is discharged. The voltage at
the non-inverting input (VH) is:
EQUATION 4-5:
R2 ( V DD )
V H = -------------------------------------------[ R2 + ( R1 || R3 ) ]
where, if R1 = R2 = R3, then:
EQUATION 4-6:
2 ( V DD )
V H = ------------------3
DS21347B-page 7
TC1043
Capacitor C1 will charge up through R4. When the voltage at the comparator’s inverting input is equal to VH,
the comparator output will switch. With the output at
ground potential, the value at the non-inverting input
terminal (V L) is reduced by the hysteresis network to a
value given by:
EQUATION 4-7:
V DD
V L = ---------3
Using the same resistors as before, capacitor C1 must
now discharge through R4 toward ground. The output
will return to a high state when the voltage across the
capacitor has discharged to a value equal to VL. The
period of oscillation will be twice the time it takes for the
RC circuit to charge up to one-half its final value. The
period can be calculated from:
4.9
Supervisory Audio Tone (SAT)
Filter for Cellular
Supervisory Audio Tones (SAT) provide a reliable
transmission path between cellular subscriber units
and base stations. The SAT tone functions much like
the current/voltage used in land line telephone systems
to indicate that a phone is off the hook. The SAT tone
may be one of three frequencies: 5970, 6000 or
6030Hz. A loss of SAT implies that channel conditions
are impaired and if SAT is interrupted for more than 5
seconds a cellular call is terminated.
Figure 4-10 shows a high Q (30) second order SAT
detection bandpass filter using Microchip’s CMOS op
amp architecture. This circuit nulls all frequencies
except the three SAT tones of interest.
EQUATION 4-8:
1
----------------- = 2 ( 0.694 ) ( R4 ) ( C1 )
FREQ
The frequency stability of this circuit should only be a
function of the external component tolerances.
Figure 4-8 shows the circuit for a pulse width modulator
circuit. It is essentially the same as in Figure 4-7 with
the addition of an input control voltage. When the input
control voltage is equal to one-half V DD, operation is
basically the same as described for the free-running
oscillator. If the input control voltage is moved above or
below one-half VDD, the duty cycle of the output square
wave will be altered. This is because the addition of the
control voltage at the input has now altered the trip
points. The equations for these trip points are shown in
Figure 4-8 (see VH and V L).
Pulse width sensitivity to the input voltage variations
can be increased by reducing the value of R6 from
10kΩ and conversely, sensitivity will be reduced by
increasing the value of R6. The values of R1 and C1
can be varied to produce the desired center frequency.
4.8
Voice Band Receive Filter
The majority of spectral energy for human voices is
found to be in a 2.7kHz frequency band from 300Hz to
3kHz. To properly recover a voice signal in applications
such as radios, cellular phones, and voice pagers, a
low power bandpass filter that is matched to the human
voice spectrum can be implemented using MIcrochip’s
CMOS op amps. Figure 4-9 shows a unity gain multipole Butterworth filter with ripple less than 0.15dB in
the human voice band. The lower 3dB cut-off frequency
is 70Hz (single order response), while the upper cut-off
frequency is 3.5kHz (fourth order response).
DS21347B-page 8
 2002 Microchip Technology Inc.
TC1043
FIGURE 4-2:
PRECISION BATTERY MONITOR
To System DC/DC
Converter
R4, 470k, 1%
R5, 7.5M
VDD
VDD
+
R2, 330k, 1%
+
AMP1
–
CMPTR1
BATTLOW
–
3V
ALKALINE
TC1043
VDD
R1, 270k, 1%
VR
–
CMPTR2
BATTFAIL
+
R6, 7.5M
R3, 470k, 1%
FIGURE 4-3:
DUAL LOW DROPOUT REGULATOR
VIN
TC1043
VDD
VDD
SHDN
+
+
2N2222
AMP2
–
2N2222
AMP1
–
VOUT2
VOUT1
RA1
VR
RB1
C1, 1µF
RA2
C2, 1µF
RB2
VOUT = VR x (RA + RB)/RB
 2002 Microchip Technology Inc.
DS21347B-page 9
TC1043
FIGURE 4-4:
COMPARATOR
EXTERNAL HYSTERESIS
CONFIGURATION
FIGURE 4-5:
32.768 kHz
VDD
RC
VDD
VSRC
32.768 KHZ “TIME-OFDAY” CLOCK
OSCILLATOR
+
Comparator
–
RB
150k
RB
RC
VR
FIGURE 4-6:
Comparator
VOUT
+
VOUT
–
TC1043
VDD
RA
150k
TC1043
RA
CA
100 pF
1M
TPER = 30.52 µsec
NON-RETRIGGERABLE MULTI-VIBRATOR
VDD
R3
1M
R1
R4
1M
A
R5
10M
–
In
R2
100k
TC1025
C
+
B
D1
R10
61.9k
t0
CMPTR2
Out
GND
C
VDD
+
R8
R9
243k
VDD
Out
–
C1
100 pF
GND
GND
10M
D2
TC1043
FIGURE 4-7:
R7
1M
CMPTR1
100k
In
R6
562k
SQUARE WAVE GENERATOR
VDD
R1
100k
TC1043
R4
VDD
–
Comparator
C1
+
VH =
VL =
R2
100k
DS21347B-page 10
R3
100k
FREQ =
R2 (VDD)
R2 + (R1||R3)
(VDD) (R2||R3)
R1 + (R2||R3)
1
2(0.694)(R4)(C1)
 2002 Microchip Technology Inc.
TC1043
FIGURE 4-8:
PULSE WIDTH MODULATOR
VDD
VC
TC1043
R1
100k
R6
10k
R4
VH =
VDD (R1R2R6 + R2R3R6) + VC (R1R2R3)
R1R2R6 + R1R3R6 + R2R3R6 + R1R2R3
VDD
–
VL =
+
C1
VDD (R2R3R6) + VC (R1R2R3)
R1R2R6 + R1R3R6 + R2R3R6 + R1R2R3
FREQ =
R2
100k
R3
100k
1
2 (0.694) (R4) (C1)
For Square Wave Generation,
Select R1 = R2 = R3
Comparator
V
VC = DD
2
FIGURE 4-9:
MULTI-POLE BUTTERWORTH VOICE BAND RECEIVE FILTER
VDD /2
TC1043
Gain = 0 dB
Fch = 3.5kHz
-24 dB/Octave
0.1 µF
VDD
VOUT
+
22.6k
–
22.6k
Fcl = 70Hz
+6 dB/Octave
Passband Ripple
< 0.15 dB
750 pF
6800 pF
VIN
VDD
21.0k
21.0k
21.0k
+
2400 pF
470 pF
–
Two (2) TC1043 Op Amps
 2002 Microchip Technology Inc.
DS21347B-page 11
TC1043
FIGURE 4-10:
SECOND ORDER SAT BANDPASS FILTER
Gain = 0 dB
Q = 30
TC1043
.036 µF
Q = FC
BW
48.7k
(3 dB)
FC = 6kHz
VDD
VIN
24.3k
VOUT
.036 µF
–
+
11.2
VDD/2
VDD/2
TC1043 Op Amp
DS21347B-page 12
 2002 Microchip Technology Inc.
TC1043
5.0
TYPICAL CHARACTERISTICS
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Comparator Propagation Delay
vs. Supply Voltage
7
TA = 25°C
CL = 100pF
DELAY TO FALLING EDGE (µsec)
6
Overdrive = 10mV
5
4
Overdrive = 50mV
3
2
2
5
Overdrive = 100mV
Overdrive = 50mV
4
3
6
2.5
3
3.5
4
4.5
5
VDD = 4V
VDD = 2V
4
VDD = 3V
3
1.5
5.5
VDD = 5V
5
2
2.5
3.5
3
4
4.5
5
-40
5.5
25
85
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
Comparator Propagation Delay
vs. Temperature
Comparator Output Swing
vs. Output Source Current
Comparator Output Swing
vs. Output Sink Current
2.5
7
2.5
TA = 25°C
Overdrive = 100mV
VDD = 5V
VDD = 4V
5
VDD = 3V
VDD = 2V
4
TA = 25°C
2.0
VOUT - VSS (V)
2.0
6
VDD - VOUT (V)
DELAY TO FALLING EDGE (µsec)
Overdrive = 10mV
Overdrive = 100mV
2
1.5
VDD = 3V
1.5
VDD = 1.8V
1.0
VDD = 5.5V
.5
1.5
VDD = 3V
1.0
VDD = 1.8V
.5
VDD = 5.5V
3
0
-40
25
0
0
85
3
2
4
ISOURCE (mA)
1
TEMPERATURE (°C)
Comparator Output Short-Circuit
Current vs. Supply Voltage
5
TA = -40°C
50
TA = 25°C
40
TA = 85°C
C
0°
30
TA
20
Sinking
10
Sourcing
0
0
=
-4
TA = 25°C
TA = 85°C
3
1
2
4
5
SUPPLY VOLTAGE (V)
 2002 Microchip Technology Inc.
VDD = 1.8V
VDD = 3V
1.220
VDD = 5.5V
Sinking
1.200
Sourcing
1.180
VDD = 5.5V
1.160
VDD = 1.8V
VDD = 3V
1.140
6
0
2
4
6
1
2
3
4
5
6
ISINK (mA)
1.240
60
0
6
Reference Voltage vs.
Load Current
REFERENCE VOLTAGE (V)
OUTPUT SHORT-CIRCUIT CURRENT (mA)
7
TA = 25°C
CL = 100pF
6
Comparator Propagation Delay
vs. Temperature
8
LOAD CURRENT (mA)
10
SUPPLY AND REFERENCE VOLTAGES (V)
DELAY TO RISING EDGE (µsec)
7
Comparator Propagation Delay
vs. Supply Voltage
DELAY TO RISING EDGE (µsec)
Note:
Line Transient
Response of VREF
4
VDD
3
2
VREF
1
0
0
100
200
300
400
TIME (µsec)
DS21347B-page 13
TC1043
TYPICAL CHARACTERISTICS (CONTINUED)
Op-Amp DC Open-Loop Gain
vs. Supply Voltage
Op-Amp DC Open-Loop Gain
vs. Temperature
Op-Amp Short-Circuit Current
vs. Supply Voltage
50
3000
140
OUTPUT CURRENT (mA)
2500
100
2000
80
1500
60
1000
40
500
0
0.0
1.0
2.0
3.0
4.0
5.0
0
-40°C
6.0
25°C
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
Op-Amp Short-Circuit Current
vs. Supply Voltage
10% Overshoot
-10
RLOAD (kΩ)
OUTPUT CURRENT (mA)
1000
-5
-15
-20
ISRC
V
V
= 1.5V
Region of Marginal Stability
100
Region of Stable Operation
10
-25
-30
1
1.0
2.0
3.0
4.0
5.0
SUPPLY VOLTAGE (V)
6.0
0
ISINK
25
20
15
10
0
0.0
250 500 750 1000 12501500 1750 2000
1.0
2.0
3.0
4.0
5.0
SUPPLY VOLTAGE (V)
6.0
Op-Amp Small-Signal
Transient Response
100
50
0
100
50
0
10 20 30 40 50 60 70 80 90
TIME (µsec)
Op-Amp Power Supply Rejection
Ratio (PSRR) vs. Frequency
Large-Signal
Transient Response
6
0
4
-10
2
VDD = 3V
VCM = 1.5V
VIN = 100mVPP
-20
0
PSRR (dB)
OUTPUT VOLTAGE (mV)
INPUT VOLTAGE (mV)
-35
0.0
30
85°C
Op-Amp Load Resistance
vs. Load Capacitance
0
40
35
5
INPUT VOLTAGE (mV)
20
OUTPUT VOLTAGE (mV)
DC OPEN-LOOP GAIN (dB)
45
120
6
4
-30
-40
-50
2
-60
0
-70
10 20 30 40 50 60 70 80 90
TIME (µsec)
DS21347B-page 14
100
1K
10K
100K
FREQUENCY (Hz)
 2002 Microchip Technology Inc.
TC1043
TYPICAL CHARACTERISTICS (CONTINUED)
Reference Voltage
vs. Supply Voltage
Supply Current vs. Supply Voltage
20
SUPPLY CURRENT (µA)
REFERENCE VOLTAGE (V)
1.25
1.20
1.15
1.10
TA = 85°C
18
16
TA = 25°C
TA = -40°C
14
12
10
1.05
8
1
4
2
3
SUPPLY VOLTAGE (V)
 2002 Microchip Technology Inc.
5
0
1
2
3
4
5
SUPPLY VOLTAGE (V)
6
DS21347B-page 15
TC1043
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
Package marking information not available at this time.
6.2
Taping Information
Component Taping Orientation for 16-Pin QSOP (Narrow) Devices
User Direction of Feed
PIN 1
W
P
Standard Reel Component Orientation
for TR Suffix Device
Carrier Tape, Reel Size, Number of Components Per Reel and Reel Size
Package
16-Pin QSOP (N)
6.3
Carrier Width (W)
Pitch (P)
Part Per Full Reel
Reel Size
12 mm
8 mm
2500
13 in
Package Dimensions
16-Pin QSOP (Narrow)
PIN 1
.157 (3.99)
.150 (3.81) .244 (6.20)
.227 (5.79)
.196 (4.98)
.189 (4.80)
.010 (0.25)
.004 (0.10)
.069 (1.75)
.053 (1.35)
(0.635) .011 (0.30)
BSC .007 (0.20)
8°
MAX.
.010 (0.25)
.007 (0.19)
.050 (1.27)
.015 (0.40)
Dimensions: inches (mm)
DS21347B-page 16
 2002 Microchip Technology Inc.
TC1043
SALES AND SUPPORT
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences
and recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of
the following:
1.
2.
3.
Your local Microchip sales office
The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
 2002 Microchip Technology Inc.
DS21347B-page 17
TC1043
NOTES:
DS21347B-page 18
 2002 Microchip Technology Inc.
TC1043
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical components in life support systems is not authorized except with
express written approval by Microchip. No licenses are conveyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, FilterLab,
KEELOQ, microID, MPLAB, PIC, PICmicro, PICMASTER, PICSTART, PRO MATE, SEEVAL and The Embedded Control Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
dsPIC, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
MXDEV, PICC, PICDEM, PICDEM.net, rfPIC, Select Mode
and Total Endurance are trademarks of Microchip Technology
Incorporated in the U.S.A.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2002, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
PICmicro ® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systems is ISO 9001 certified.
 2002 Microchip Technology Inc.
DS21347B - page 19
WORLDWIDE SALES AND SERVICE
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ASIA/PACIFIC
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Corporate Office
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Tel: 61-2-9868-6733 Fax: 61-2-9868-6755
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Unit 915
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Tel: 86-10-85282100 Fax: 86-10-85282104
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03/01/02
DS21347B-page 30
 2002 Microchip Technology Inc.