RENESAS M62021FP

M62021L/P/FP
System Reset IC with Switch for Memory Backup
REJ03D0784-0200
Rev.2.00
Jun 15, 2007
Description
The M62021 is a system IC that controls the memory backup function of microcomputer (internal RAM).
The IC outputs reset signals (RES/RES) to a microcomputer at power-down and power failure. It also shifts the power
supply to RAM from main to backup, outputs a signal (CS) that invokes standby mode, and alters RAM to backup
circuit mode.
The M62021 contains, in a single chip, power supply monitor and RAM backup functions needed for a microcomputer
system, so that the IC makes it possible to construct a system easily and with fewer components compared with a
conventional case that uses individual ICs and discrete components.
Features
•
•
•
•
•
•
•
•
Built-in switch for selection between main power supply and backup power supply to RAM.
Small difference between input and output voltage (IOUT = 80 mA, VIN = 5 V) 0.2 V Typ
Detection voltage (power supply monitor voltage) 4.40 V ± 0.2 V
Chip select signal output (CS)
Two channels of reset outputs (RES/RES)
Power on reset circuit built-in
Delay time variable by an external capacitance connected to Ct pin
Facilitates to form backup function with a few number of components
Application
• Power supply control systems for memory backup of microcomputer system and SRAM boards with built-in backup
function that require switching between external power supply and battery.
Block Diagram
SW
1 VOUT
VIN 3
R1
–
R2
+
D1
Com
Reset
circuit
2 VBAT
1.24V
8 CS
RES 7
Delay
circuit
RES 5
6
GND
REJ03D0784-0200 Rev.2.00 Jun 15, 2007
Page 1 of 13
4 Ct
M62021L/P/FP
Pin Arrangement
M62021P
M62021FP
M62021L
8 CS
VOUT 1
8 CS
7 RES
VBAT 2
7 RES
6 GND
VIN 3
6 GND
5 RES
Ct (Delay capcitance) 4
5 RES
4 Ct (Delay capcitance)
3 VIN
2 VBAT
1 VOUT
(Top view)
Outline: PRSS0008AA-A (8P5) [L]
REJ03D0784-0200 Rev.2.00 Jun 15, 2007
Page 2 of 13
(Top view)
Outline: PRDP0008AA-A (8P4) [P]
PRSP0008DE-C [FP] (recommend)
PRSP0008DA-A (8P2S-A) [FP] (not recommend for new design)
M62021L/P/FP
Absolute Maximum Ratings
(Ta = 25°C, unless otherwise noted)
Item
Input voltage
Output current
Power dissipation
Symbol
VIN
Ratings
7
Unit
V
IOUT
Pd
100
800
mA
mW
625
440
Thermal derating
Kθ
Conditions
8-pin SIP
8-pin DIP
8-pin SOP
8
6.25
mW/°C
Operating temperature
Topr
4.4
–20 to +75
Storage temperature
Tstg
–40 to +125
Ta ≥ 25°C
8-pin SIP
8-pin DIP
8-pin SOP
°C
°C
Electrical Characteristics
(Ta = 25°C, unless otherwise noted)
Symbol
Min
Typ
Max
Unit
Detection voltage
Hysteresis voltage
Item
VS
∆VS
4.2
50
4.4
100
4.6
200
V
mV
Temperature coefficient of
detection voltage
Circuit current
VS/∆T
—
0.005
—
%/°C
ICC
—
2.0
4.0
mA
Difference between input and
output voltage
VDROP
—
—
7.5
0.125
12.0
0.25
Ct output voltage (high level)
VOH(Ct)
—
4.5
0.2
5.0
Ct output voltage (low level)
RES output voltage (high level)
VOL(Ct)
VOH(RES)
—
3.5
RES output voltage (low level)
VOL(RES)
RES output voltage (high level)
RES output voltage (low level)
CS output voltage (high level)
CS output voltage (low level)
Test Conditions
VIN (at the change from H→L)
∆VS = VSH – VSL
IOUT = 0mA
VIN = 4V
V
VIN = 5V
VIN = 5V
IOUT = 50mA
0.4
—
V
VIN = 5V *
0.02
4.0
0.1
—
V
V
VIN = 4V *
1
VIN = 4V *
—
—
0.02
0.05
—
0.2
V
VIN = 5V
VOH(RES)
VOL(RES)
4.5
—
5.0
0.02
—
—
V
V
VIN = 5V *
VIN = 4V
VOH(CS)
—
3.50
0.05
3.57
0.2
—
V
VIN = 4V *
VOL(CS)
2.40
—
2.47
0.08
—
—
V
VIN = 0V, VBAT = 3V *
1
VIN = 5V
*
0.1
—
0.3
±0.5
µA
VBAT = 3V
IF = 10µA
IOUT = 80mA
1
1
1
*
Isink = 1mA
1
1
*
Isink = 1mA
2
2
Backup diode leakage current
IR
—
—
Backup diode forward direction
voltage
VF
—
—
—
0.54
±0.5
0.6
V
Delay time
Response time
tpd
td
10
—
27
5.0
55
25.0
ms
µs
RES limit voltage of operation
VOPL(RES)
—
0.65
—
V
Isink = 1mA
VIN = 5V
VIN = 0V
VIN = 0V→5V, Ct = 4.7µF
VIN = 5V→4V
3
*
Notes: 1. Regarding conditions to measure VOH and VOL, voltage values are to be generated by internal resistance only
and no external resistor is used.
2. These values are produced inserting an external resistor, RCS = 1 MΩ, between the CS pin and GND.
3. With no external resistor (10 kΩ internal resistance only)
REJ03D0784-0200 Rev.2.00 Jun 15, 2007
Page 3 of 13
M62021L/P/FP
Test Circuit
V
Vm2
M62021
1 SW6
SW2
VIN
A
Im1
Vm1
V
1
V1
3
1
2
–
Reset
circuit
+
R2
D1
Com
4
2
VBAT
CS Im2 A
V2
RES
Delay
circuit
7
4
5
SW4
3
2
1
1.24V
8
RES
SW7
1
3
SW5
R1
SW1
2
VOUT
6
CRT
2
Vm4
V
IF1
V Vm3
IF2
Ct
5
6
GND
SW3
+
4.7µF
Figure 1 Test Circuit
Switch Matrix
Item
Circuit current
VOUT
CS
Detection voltage
Ct
(VIN negative-going)
RES
RES
Difference between input and output
voltage
Symbol
V1
V2
IF1
IF2
1
2
3
SW
4
5
ICC
4V
5V
—
—
—
1
ON
OFF
1
VS
(VSL)
Decrease
VDROP
5V
Ct output voltage (high level)
Ct output voltage (low level)
RES output voltage (high level)
VOH(Ct)
VOL(Ct)
VOH(RES)
5V
4V
4V
RES output voltage (low level)
VOL(RES)
5V
from 5V
1
1
Im1
1
*
Vm4
CRT
Vm1
—
1
ON
OFF
1
OFF
—
–50mA
–80mA
—
1
ON
OFF
1
OFF
2
2
Vm2
—
—
—
1
ON
OFF
1
OFF
4
1
Vm4
—
1
ON
OFF
1
OFF
5
—
—
1mA
VOH(RES)
5V
4V
CS output voltage (high level) *1
VOH(CS)
4V
0V
—
3V
CS output voltage (low level)
VOL(CS)
5V
—
Backup diode leakage current
IR
5V
0V
3V
Backup diode forward direction
voltage
VF
0V
—
—
OFF
—
VOL(RES)
tpd
td
Measuring
Instrument
—
RES output voltage (low level)
VOUT
CS
RES
RES
7
2
3
4
5
6
RES output voltage (high level)
Delay time
Response time
6
—
—
—
1
Vm4
2
—
1
ON
OFF
1
OFF
6
1mA
—
2
1
Vm4
2
1
—
1
ON
OFF
1
OFF
3
—
—
1
ON
OFF
2
OFF
1
1
Im2
—
10µA
1
ON
OFF
3
ON
1
1
Vm3
—
2
*3
ON
ON
*4
OFF
2
3
5
6
1
CRT
1mA
—
Vm4
2
1
Notes: 1. To measure VOH(CS), insert a 1 MΩ resistor between the CS pin and GND.
2. While monitoring each output by Vm4 or CRT, measure the input voltage Vm1 when the output goes from H
to L and L to H. Regarding VSH, raise VIN from 4 V and measure the input voltage Vm1 when the output goes
from H to L and L to H. ∆VS is VSH – VSL.
3. To measure delay time, change VIN from 0 V to 5 V and compare, with respect to each pin, the positive-going
edge observed on a monitor with that of VIN. To measure response time, change VIN from 5 V to 4 V and
compare, with respect to each pin, the negative-going edge observed on a monitor with that of VIN.
4. Set the switch to OFF when measuring response time.
REJ03D0784-0200 Rev.2.00 Jun 15, 2007
Page 4 of 13
M62021L/P/FP
Pin Description
Pin No.
Pin Name
1
Power supply output
VOUT
Symbol
Function
2
Backup power supply
input
VBAT
3
4
Power supply input
Delay capacitor
connection pin
VIN
Ct
+5 V input pin. Connect to a logic power supply.
A delay capacitor is connected to this pin. By connecting a capacitor, it is
possible to delay each output.
5
Positive reset output
RES
6
Ground
GND
Connect to the positive reset input of a microcomputer. The pin is capable
of flowing 1 mA sink current.
Reference for all signals.
7
Negative reset output
RES
8
Chip select output
CS
VIN and VBAT are controlled by means of an internal switch and output
through VOUT.
The pin is capable of outputting up to 100 mA. Use it as VDD of CMOS
RAM and the like.
Backup power supply is connected to this pin.
If a lithium battery is used, insert a resistor in series for safety purposes.
Connect to the negative reset input of a microcomputer. The pin is
capable of flowing 1 mA sink current.
Connect to the chip select of RAM. The CS output is at low level in normal
state thereby letting RAM be active. Under failure or backup condition, the
CS output is set to high level, then RAM enters standby state disabling
read/write function. The pin is capable of flowing a 1 mA sink current.
Application Example
Note)2
M62021
+5V
(Main power supply)
VIN
3
VOUT
1
SW
+
+
CIN
R1
VDD
–
R2
MCU
or
CPU
+
Com
Reset
circuit
1.24V
RES
7
RES
5
COUT
D1
VBAT
2
+
Battery
3V
CS
8
Delay
circuit
CMOS
RAM
Ct
4
+
C1
Note)1
6
GND
Notes: * Capacitance to be connected: CIN: 10µF, COUT: 4.7µF, Ct: 4.7µF
1. If connecting a zener diode, select one of VZ ≈ 2V to 3V. (IZ = 0.1mA)
2. When it is necessary to charge the back-up power supply such as using the large-capacity capacitor,
connect it to VIN via a diode and a protection resistor.
Figure 2 Application Example
REJ03D0784-0200 Rev.2.00 Jun 15, 2007
Page 5 of 13
VDD
M62021L/P/FP
Configuration
Power Supply Detection
The internal reference voltage Vref is compare by means of a comparator with resistor-divided voltage VR (resistordivided voltage produced by R1 and R2 from VIN).
If the input voltage is 5 V, VR is set to 1.24 V or higher, so the comparator output is at low level and the Ct output (Q1
collector output) is set to high level. If the input voltage drops to below 4.4 V in an abnormal condition, VR becomes
below 1.24 V, so the comparator output goes from low to high level and the Ct output, from high to low. The input
voltage at this point is called VSL. Next, when the input voltage, restored from abnormal state, has a rise, the
comparator output goes from high to low level and the Ct output, from low to high.
The comparator used for detection has 100 mV hysteresis (∆VS), so that malfunctioning is prevented in case that the
input voltage slowly drops or VR nearly equals Vref.
Ct Output VO (Ct) (V)
5
4
∆VS
3
2
VSL
VSH
1
0
4.0
4.2
4.4
4.6
4.8
5.0
Input Voltage VIN (V)
Figure 3
Delay Circuit
Connecting an external capacitor to the Ct pin lets RES, RES, CS, and VOUT be delayed due to RC transient
phenomenon (electric charge).
Delay time is determined as follows.
Delay time (tpd) = C1 × (R3 + R4) × 1n
[VOH(Ct) – VOL(Ct)]
[VOH(Ct) – INV1(VTH)]
= C1 × 22kΩ × 0.2614
≈ 5.75 × 103 × C1
* C is an external capacitance.
Taking into consideration the time taken by the oscillator of microcomputer to be stable, connect a 4.7 µF capacitor to
the Ct pin. (As the response time of detection can be slowed due to internal structure depending in the rising rate of
power supply, avoid connecting a too large capacitance.)
tpd
VOH(Ct)
INV1(Vth)
VOL(Ct)
Figure 4 Delayed Output Waveforms of Ct
REJ03D0784-0200 Rev.2.00 Jun 15, 2007
Page 6 of 13
M62021L/P/FP
Schmitt Trigger Circuit
Since waveforms show a gentle rise due to the RC delay circuit, INV1, INV2, R5, and R6 constitute a Schmitt trigger
circuit to produce hysteresis so as to prevent each output from chattering.
Internal Circuit
Ct
4
VIN
3
RES
7
RES
5
Q4
R1
60.94k
–
VR
+
R2
24k
R7
10k
R6
R3
22k
R4
R5
47k
47
10k
INV1 INV2
R8
10k
R10
800
Q2
1 VOUT
R11
10k
D1
2 VBAT
INV3 INV4
Com
Q1
Vref
1.24V
R9
INV8 INV9
5k
Figure 5 Internal Circuit
REJ03D0784-0200 Rev.2.00 Jun 15, 2007
Page 7 of 13
8 CS
Q3
INV5 INV6 INV7
R10
22k
Q5
6 GND
M62021L/P/FP
Timing Chart
tpd
tpd
5V
∆VS
VSH
VSL
VIN
0V
V1
V2
V3
V4
V5
VOUT
V2
CS
V4
V5
VOL(CS)
5V
VIN(VSL)
RES
VOL(RES)
VOH(RES)
VIN(VSL)
RES
VOL(RES)
V1 = VIN – VDROP
V2 = VIN – Q4VEB(Di)
V3 = VIN(VSL) – VDROP
V4 = VIN(VSL) – Q4VEB(Di)
V5 = VBAT – VF
Figure 6 Timing Chart
Input
Voltage
In Normal Operation
In Failure (Instantaneous
Drop)
Restoration from Failure
(Instantaneous Drop)
In Backup State
Input voltage: 5V
Input voltage: 5V→4V
Each output varies if the input
voltage drops to VSL or under
Input voltage: 4V→5V
If the input voltage goes higher
than VSL by 100mV, each
output varies after delay
produced by the delay circuit
Input voltage: 0V
Backup voltage: 3V
VOUT
With Q4 set to ON,
a voltage (VIN – VDROP)
is output
Q4 is turned OFF. A voltage
(VIN – Q4VEB(Di)) is output by
the diode between E and B of
Q4.
Q4 is turned ON after delay
and a voltage (VIN – VDROP) is
output.
VBAT – VF
RES
The output level is VOL
(RES) with a logic low
As the state shifts from a logic
low to logic high, the output
level becomes approximately
equal to the input voltage.
A logic high is maintained, and
than shifts to a logic high.
—
RES
The output level is VOH
(RES) with a logic low
As the state shifts from a logic
high to logic low, the output
level becomes VOL (RES).
A logic low is held, and than
shifts to a logic high.
—
CS
The output level is VOL
(CS) with a logic low
As the state shifts from a logic
low to logic high, the output
level becomes the voltage VIN –
Q4VEB(Di).
A logic high is maintained, and
than shifts to a logic high.
Output
Pin
REJ03D0784-0200 Rev.2.00 Jun 15, 2007
Page 8 of 13
The output is a logic
high and the output
level is VBAT – VF
M62021L/P/FP
Typical Characteristics
Thermal Derating
(Maximum Rating)
Circuit Curent vs. Input Voltage
M62021P
600
M62021FP
400
200
0
0
Detection Voltage VS (V)
M62021L
Circuit Curent ICC (mA)
800
16
25
50
75
100
14
12
10
8
6
4
2
0
0
125
2
3
4
5
6
7
8
Input Voltage VIN (V)
Detection Voltage vs. Ambient Temperature
4.48
Hysteresis Voltage vs. Ambient Temperature
140
4.46
4.44
4.42
4.40
4.38
4.36
4.34
4.32
–40 –20 0
Tj = 25°C
130
120
110
100
90
80
70
60
–40 –20 0
20 40 60 80 100 120
Ambient Temperature Ta (°C)
Circuit Curent vs. Ambient Temperature
4.0
VIN = 5V
VIN = 4V
Circuit Curent ICC (mA)
9
8
7
6
5
4
3
2
–40 –20 0
20 40 60 80 100 120
Ambient Temperature Ta (°C)
REJ03D0784-0200 Rev.2.00 Jun 15, 2007
Page 9 of 13
20 40 60 80 100 120
Ambient Temperature Ta (°C)
Circuit Curent vs. Ambient Temperature
10
Circuit Curent ICC (mA)
1
Ambient Temperature Ta (°C)
Hysteresis Voltage ∆VS (mV)
Power Dissipation Pd (mW)
1000
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
–40 –20 0
20 40 60 80 100 120
Ambient Temperature Ta (°C)
M62021L/P/FP
60
40
20
0
0
50
100
150
200
250
RES "L" Output Voltage VOL(RES) (mV)
Backup Di Forward Direction Current IF (µA)
Difference between Input and Output Voltages
VDROP (mV)
Backup Di Forward Direction Current vs.
Backup Di Forward Direction Voltage
160
140
120
100
80
60
40
20
0
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8
Backup Di Forward Direction Voltage VF (V)
RES "L" Output Voltage vs.
Ambient Temperature
80
VIN = 5V
70 Isink = 1mA
60
50
40
30
20
10
0
–40 –20 0
20 40 60 80 100 120
Ambient Temperature Ta (°C)
REJ03D0784-0200 Rev.2.00 Jun 15, 2007
Page 10 of 13
Difference between Input and Output Voltages
VDROP (mV)
80
Backup Di Forward Direction Voltage VF (V)
Output Curent IOUT (mA)
VIN = 5V
Difference between Input and Output Voltages vs.
Ambient Temperature
400
RES "L" Output Voltage VOL(RES) (mV)
Output Curent vs.
Difference between Input and Output Voltages
100
VIN = 5V
350
300
250
200
150
IOUT = 100mA
IOUT = 80mA
IOUT = 50mA
100
50
0
–40 –20 0
20 40 60 80 100 120
Ambient Temperature Ta (°C)
Backup Di Forward Direction Voltage vs.
Ambient Temperature
0.8
0.7
0.6
IF = 100µA
0.5
IF = 10µA
0.4
IF = 1µA
0.3
0.2
0.1
0
–40 –20 0
20 40 60 80 100 120
Ambient Temperature Ta (°C)
RES "L" Output Voltage vs.
Ambient Temperature
80
VIN = 4V
70 Isink = 1mA
60
50
40
30
20
10
0
–40 –20 0
20 40 60 80 100 120
Ambient Temperature Ta (°C)
CS "L" Output Voltage VOL(CS) (mV)
CS "L" Output Voltage vs.
Ambient Temperature
160
VIN = 5V
140 Isink = 1mA
120
100
80
60
40
20
0
–40 –20 0
20 40 60 80 100 120
CS "H" Output Voltage VOH(CS) (mV)
M62021L/P/FP
CS "H" Output Voltage vs.
Ambient Temperature
4.0
VIN = 4V
3.8 RCS = 1MΩ
3.6
3.4
3.2
3.0
2.8
2.6
2.4
–40 –20 0
Ambient Temperature Ta (°C)
20 40 60 80 100 120
Ambient Temperature Ta (°C)
Delay Time vs.
External Capacitance Connected to the Ct Pin
1000
Delay Time vs. Ambient Temperature
40
VIN = 0V→5V
VIN = 0V→5V
Delay Time tpd (ms)
Delay Time tpd (ms)
35 Ct = 4.7µF
100
10
30
25
20
15
10
5
1
0.1
1
10
100
External Capacitance Connected to the Ct Pin Ct (µF)
REJ03D0784-0200 Rev.2.00 Jun 15, 2007
Page 11 of 13
0
–40 –20 0
20 40 60 80 100 120
Ambient Temperature Ta (°C)
M62021L/P/FP
Package Dimensions
JEITA Package Code
P-SIP8-6.4x19-2.54
RENESAS Code
PRSS0008AA-A
Previous Code
8P5
2.8
±0.2
±0.2
2.54
0.5
±0.1
0.85
3.0 Min
1.2 Min
8.3 Max
6.4
19.0
MASS[Typ.]
0.73g
+0.3
-0.1
1.2 ±0.1
1.2 +0.1
-0.3
RENESAS Code
PRDP0008AA-A
5
1
4
MASS[Typ.]
0.5g
c
*1
E
8
Previous Code
8P4
+0.07
-0.05
e1
JEITA Package Code
P-DIP8-6.3x8.84-2.54
0.27
NOTE)
1. DIMENSIONS "*1" AND "*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION "*3" DOES NOT
INCLUDE TRIM OFFSET.
*2
L
A1
A
A2
D
SEATING PLANE
*3 b
3
*3 b
2
bp
e
Reference
Symbol
e1
D
E
A
A1
A2
bp
b2
b3
c
e
L
REJ03D0784-0200 Rev.2.00 Jun 15, 2007
Page 12 of 13
Dimension in Millimeters
Min Nom Max
7.32 7.62 7.92
8.7 8.9 9.1
6.15 6.3 6.45
4.5
0.51
3.3
0.4 0.5 0.6
0.9 1.0 1.3
1.4 1.5 1.8
0.22 0.27 0.34
15°
0°
2.29 2.54 2.79
3.0
M62021L/P/FP
JEITA Package Code
P-SOP8-4.4x4.85-1.27
RENESAS Code
PRSP0008DE-C
*1
Previous Code
—
MASS[Typ.]
0.1g
F
D
8
NOTE)
1. DIMENSIONS"*1 (Nom)"AND"*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION"*3"DOES NOT
INCLUDE TRIM OFFSET.
5
c
*2
E
HE
bp
Index mark
Terminal cross section
( Ni/Pd/Au plating )
Reference
Symbol
4
1
*3
e
Z
bp
x
M
A
A2
L1
A1
θ
L
y
Detail F
JEITA Package Code
P-SOP8-4.4x5-1.27
RENESAS Code
PRSP0008DA-A
Min Nom Max
4.65 4.85 5.05
4.2
4.4 4.6
1.85
0.00 0.1 0.20
2.03
0.34 0.4 0.46
0.15 0.20 0.25
0°
8°
5.7 6.2 6.5
1.12 1.27 1.42
0.12
0.10
0.75
0.25 0.45 0.65
0.90
MASS[Typ.]
0.07g
E
5
*1
HE
8
Previous Code
8P2S-A
D
E
A2
A1
A
bp
b1
c
c1
θ
HE
e
x
y
Z
L
L1
Dimension in Millimeters
F
1
NOTE)
1. DIMENSIONS "*1" AND "*2"
DO NOT INCLUDE MOLD FLASH.
2. DIMENSION "*3" DOES NOT
INCLUDE TRIM OFFSET.
4
Index mark
c
A2
*2
A1
D
L
A
Reference
Symbol
*3
e
bp
y
D
E
A2
A1
A
bp
c
Detail F
HE
e
y
L
REJ03D0784-0200 Rev.2.00 Jun 15, 2007
Page 13 of 13
Dimension in Millimeters
Min Nom Max
4.8 5.0 5.2
4.2 4.4 4.6
1.5
0.05
1.9
0.35 0.4 0.5
0.13 0.15 0.2
0°
10°
5.9 6.2 6.5
1.12 1.27 1.42
0.1
0.2 0.4 0.6
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Notes:
1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes
warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property
rights or any other rights of Renesas or any third party with respect to the information in this document.
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but not limited to, product data, diagrams, charts, programs, algorithms, and application circuit examples.
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destruction or for the purpose of any other military use. When exporting the products or technology described herein, you should follow the applicable export control laws
and regulations, and procedures required by such laws and regulations.
4. All information included in this document such as product data, diagrams, charts, programs, algorithms, and application circuit examples, is current as of the date this
document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas products listed in this document,
please confirm the latest product information with a Renesas sales office. Also, please pay regular and careful attention to additional and different information to be
disclosed by Renesas such as that disclosed through our website. (http://www.renesas.com )
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result of errors or omissions in the information included in this document.
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any other inquiries.
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Refer to "http://www.renesas.com/en/network" for the latest and detailed information.
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© 2007. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon .7.0