IS31AP4991A

IS31AP4991A
1.1W AUDIO POWER AMPLIFIER WITH ACTIVE-LOW SHUTDOWN MODE
May 2013
GENERAL DESCRIPTION
FEATURES
The IS31AP4991A has been designed for demanding
audio applications such as mobile phones and permits
the reduction of the number of external components.


It is capable of delivering 1.1W of continuous RMS
output power into an 8Ω load @ 5V.

An externally-controlled standby mode reduces the
supply current to much less than 1μA. It also includes
internal thermal shutdown protection.




The unity-gain stable amplifier can be configured by
external gain setting resistors.
Operating from VCC = 2.7V ~ 5.5V
1.1W output power @ VCC = 5V, THD+N= 1%,
f = 1kHz, with 8Ω load
Ultra-low consumption in standby mode (much
less than 1μA)
56dB PSRR @217Hz in grounded mode
Near-zero click-and-pop
Ultra-low distortion (0.074%@0.5W, 1kHz)
SOP-8 and MSOP-8 package
APPLICATIONS




Mobile phones
PDAs
Portable electronic devices
Notebook computer
TYPICAL APPLICATION CIRCUIT
Figure 1
Typical Application Circuit (Single-ended input)
Integrated Silicon Solution, Inc. – www.issi.com
Rev. C, 05/13/2013
1
IS31AP4991A
Figure 2
Typical Application Circuit (Differential input)
Integrated Silicon Solution, Inc. – www.issi.com
Rev. C, 05/13/2013
2
IS31AP4991A
PIN CONFIGURATION
Package
Pin Configuration (Top View)
SOP-8
MSOP-8
PIN DESCRIPTION
No.
Pin
Description
1
SDB
The device enters shutdown mode when a low level is applied
on this pin.
2
BYPASS
Bypass capacitor pin which provides the common mode voltage
(VCC/2).
3
IN+
Positive input of the first amplifier.
4
IN-
Negative input of the first amplifier, receives the audio input
signal. Connected to the feedback resistor RF and to the input
resistor RIN.
5
OUT-
Negative output of the IS31AP4991A. Connected to the load
and to the feedback resistor RF.
6
VCC
Positive analog supply of the chip.
7
GND
Ground.
8
OUT+
Positive output of the IS31AP4991A. Connected to the load.
Integrated Silicon Solution, Inc. – www.issi.com
Rev. C, 05/13/2013
3
IS31AP4991A
ORDERING INFORMATION
Industrial Range: -40°C to +85°C
Order Part No.
Package
QTY/Reel
IS31AP4991A-GRLS2-TR
SOP-8, Lead-free
2500
IS31AP4991A-SLS2-TR
MSOP-8, Lead-free
2500
Copyright © 2013 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. – www.issi.com
Rev. C, 05/13/2013
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IS31AP4991A
ABSOLUTE MAXIMUM RATINGS (Note 1)
Supply voltage, VCC
Voltage at any input pin
Maximum junction temperature, TJMAX
Storage temperature range, TSTG
Operating temperature range, TA
Maximum power dissipation, SOP-8(25°C/85°C) (Note 2)
MSOP-8(25°C/85°C)
-0.3V ~ +6.0V
-0.3V ~ VCC+0.3V
150°C
-65°C ~ +150°C
−40°C ~ +85°C
720mW/380mW
590mW/310mW
Note 1: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Note 2: Thermal simulation @ 25°C /85°C ambient temperature, still air convection, 2s2p boards according to JESD51. The Pd (max by package)
is evaluated by (Tjmax-Ta)/Theta-Ja.
ELECTRICAL CHARACTERISTICS
The following specifications apply for CIN = 0.1μF, RIN = RF = 20kΩ, CBYPASS = 0.47μF, unless otherwise specified.
Limits apply for TA = 25°C. VCC=5V (Note 3 or specified)
Symbol
Parameter
ICC
Quiescent power supply current
VCC = 0V, Io = 0A, no Load
ISDB
Shutdown current
VSDB = GND, RL = ∞
VSD_H
Shutdown voltage input high
VCC = 5.5V
VSD_L
Shutdown voltage input low
VCC = 2.7V
VOS
Output offset voltage
Po
Output power (8Ω)
tWU
Condition
Min.
Typ.
Max.
3.0
Unit
mA
1
1.4
μA
V
THD+N = 1%; f = 1kHz
1.15
THD+N = 10%; f = 1kHz
1.40
Wake-up time (Note 4)
CBYPASS = 0.47μF
100
THD+N
Total harmonic distortion+noise
(Note 4)
Po = 0.5Wrms; f = 1kHz
PSRR
Power supply rejection ratio
(Note 4)
Vripple p-p = 200mV
Input Grounded
0.4
V
15
mV
W
250
0.074
f = 217Hz
56
f = 1kHz
68
ms
%
dB
The following specifications apply for CIN = 0.1μF, RIN = RF = 20kΩ, CBYPASS = 0.47μF, unless otherwise specified.
Limits apply for TA= 25°C. VCC=3V (Note 3 or specified)
Symbol
Parameter
ICC
Quiescent power supply current
VCC = 0V, Io = 0A, no Load
ISDB
Shutdown current
VSDB = GND, RL = ∞
Po
Output power (8Ω)
tWU
THD+N
Condition
Min.
Typ.
Max.
2.2
mA
1
THD+N = 1%; f = 1kHz
380
THD+N = 10%; f = 1kHz
490
Wake-up time (Note 4)
CBYPASS = 0.47μF
90
Total harmonic distortion+noise
(Note 4)
Po = 0.3Wrms; f = 1kHz
0.076
Unit
μA
mW
200
ms
%
Note 3: Production testing of the device is performed at 25°C. Functional operation of the device and parameters specified over other
temperature range, are guaranteed by design, characterization and process control.
Note 4: Guaranteed by design.
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Rev. C, 05/13/2013
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IS31AP4991A
TYPICAL PERFORMANCE CHARACTERISTIC
20
20
VCC = 3.0V
RL = 8Ω
f = 1kHz
10
5
2
THD+N(%)
THD+N(%)
5
1
0.5
0.2
2
1
0.5
0.2
0.1
0.1
0.05
0.05
0.02
0.02
0.01
10m
VCC = 5.0V
RL = 8Ω
f = 1kHz
10
20m
50m
100m
200m
500m
0.01
10m
1
20m
50m
Output Power(W)
Figure 3
THD+N vs. Output Power
Figure 4
10
THD+N(%)
THD+N(%)
VCC = 3.0V
PO = 0.25W
RL = 8Ω
2
0.2
THD+N vs. Output Power
0.2
0.1
0.05
0.02
0.02
50
100
200
500
1k
2k
5k
0.01
10k 20k
VCC = 5.0V
PO = 0.8W
RL = 8Ω
2
0.1
20
50
100
200
Figure 5
THD+N vs. Frequency
Figure 6
+0
1k
2k
5k
10k 20k
THD+N vs. Frequency
100u
VCC = 5.0V
RL = 8Ω
VCC = 5.0V
Output Voltage(V)
70u
-40
PSRR(dB)
500
Frequency(H z)
Frequency(H z)
-20
2
1
1
0.05
20
500m
20
1
0.01
200m
Output Power(W)
20
10
100m
-60
-80
50u
40u
30u
20u
-100
-120
20
50
100
200
500
1k
2k
5k
Frequency(Hz)
Figure 7
PSRR vs. Frequency
Integrated Silicon Solution, Inc. – www.issi.com
Rev. C, 05/13/2013
10k
20k
10u
20
50
100
200
500
1k
2k
5k
10k
Frequency(Hz)
Figure 8
Noise Floor
6
20k
IS31AP4991A
1.8
Output Power(W)
1.6
RL = 8Ω
1.4
THD+N = 10%
1.2
1
THD+N = 1%
0.8
0.6
0.4
0.2
0
2.5
3
3.5
4
4.5
5
5.5
Supply Voltage(V)
Figure 9
Output Power vs. Power Supply
Integrated Silicon Solution, Inc. – www.issi.com
Rev. C, 05/13/2013
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IS31AP4991A
APPLICATION INFORMATION
BTL CONFIGURATION PRINCIPLE
The IS31AP4991A is a monolithic power amplifier with
a BTL output type. BTL (bridge tied load) means that
each end of the load is connected to two single-ended
output amplifiers. Thus, we have:
Single-ended output 1 = VOUT+ = VOUT (V)
Single ended output 2 = VOUT- = -VOUT (V)
and
VOUT+ - VOUT- = 2VOUT (V)
The output power is:
POUT 
(2VOUT RMS ) 2
RL
For the same power supply voltage, the output power
in BTL configuration is four times higher than the
output power in single ended configuration.
GAIN IN A TYPICAL APPLICATION SCHEMATIC
The typical application schematic is shown in Figure 1
on page 1.
In the flat region (no CIN effect), the output voltage of
the first stage is (in Volts):
VOUT 
R
 (VIN ) F
RIN
For the second stage: VOUT+ = -VOUT- (V)
The differential output voltage is (in Volts):
VOUT   VOUT   2VIN
RF
RIN
The differential gain, GV, is given by:
Gv 
VOUT   VOUT 
R
2 F
VIN
RIN
VOUT- is in phase with VIN and VOUT+ is phased 180°
with VIN. This means that the positive terminal of the
loudspeaker should be connected to VOUT+ and the
negative to VOUT-.
LOW AND HIGH FREQUENCY RESPONSE
In the low frequency region, CIN starts to have an effect.
CIN forms with RIN a high-pass filter with a -3dB cut-off
frequency. fCL is in Hz.
f CL 
1
2RIN C IN
In the high frequency region, you can limit the
bandwidth by adding a capacitor (CF) in parallel with RF.
It forms a low-pass filter with a -3dB cut-off frequency.
fCH is in Hz.
Integrated Silicon Solution, Inc. – www.issi.com
Rev. C, 05/13/2013
f CH 
1
2RF C F
DECOUPLING OF THE CIRCUIT
Two capacitors are needed to correctly bypass the
IS31AP4991A: a power supply bypass capacitor CS
and a bias voltage bypass capacitor CBYPASS.
CS has particular influence on the THD+N in the high
frequency region (above 7kHz) and an indirect
influence on power supply disturbances. With a value
for CS of 1μF, you can expect THD+N levels similar to
those shown in the datasheet.
In the high frequency region, if CS is lower than 1μF, it
increases THD+N and disturbances on the power
supply rail are less filtered.
On the other hand, if CS is higher than 1μF, those
disturbances on the power supply rail are more filtered.
CBYPASS has an influence on THD+N at lower
frequencies, but its function is critical to the final result
of PSRR (with input grounded and in the lower
frequency region).
If CBYPASS is lower than 0.47μF, THD+N increases at
lower frequencies and PSRR worsens.
If CBYPASS is higher than 0.47μF, the benefit on THD+N
at lower frequencies is small, but the benefit to PSRR
is substantial.
Note that CIN has a non-negligible effect on PSRR at
lower frequencies. The lower the value of CIN, the
higher the PSRR is.
WAKE-UP TIME (tWU)
When the standby is released to put the device on, the
bypass capacitor CBYPASS will not be charged
immediately. As CBYPASS is directly linked to the bias of
the amplifier, the bias will not work properly until the
CBYPASS voltage is correct. The time to reach this
voltage is called wake-up time or tWU and specified in
the electrical characteristics table with CBYPASS =
0.47μF.
POP PERFORMANCE
Pop performance is intimately linked with the size of
the input capacitor CIN and the bias voltage bypass
capacitor CBYPASS.
The size of CIN is dependent on the lower cut-off
frequency and PSRR values requested. The size of
CBYPASS is dependent on THD+N and PSRR values
requested at lower frequencies.
Moreover, CBYPASS determines the speed with which
the amplifier turns on.
8
IS31AP4991A
CLASSIFICATION REFLOW PROFILES
Profile Feature
Pb-Free Assembly
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
150°C
200°C
60-120 seconds
Average ramp-up rate (Tsmax to Tp)
3°C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
217°C
60-150 seconds
Peak package body temperature (Tp)*
Max 260°C
Time (tp)** within 5°C of the specified
classification temperature (Tc)
Max 30 seconds
Average ramp-down rate (Tp to Tsmax)
6°C/second max.
Time 25°C to peak temperature
8 minutes max.
Figure 10
Classification Profile
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Rev. C, 05/13/2013
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IS31AP4991A
PACKAGE INFORMATION
SOP-8
Integrated Silicon Solution, Inc. – www.issi.com
Rev. C, 05/13/2013
10
IS31AP4991A
MSOP-8
Integrated Silicon Solution, Inc. – www.issi.com
Rev. C, 05/13/2013
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