ISSI IS31AP4991

IS31AP4991
1.2W AUDIO POWER AMPLIFIER WITH ACTIVE-LOW STANDBY MODE
November 2011
GENERAL DESCRIPTION
FEATURES
The IS31AP4991 has been designed for demanding
audio applications such as mobile phones and permits
the reduction of the number of external components.


It is capable of delivering 1.2W of continuous RMS
output power into an 8Ω load @ 5V.

An externally-controlled standby mode reduces the
supply current to much less than 1μA. It also includes
internal thermal shutdown protection.




The unity-gain stable amplifier can be configured by
external gain setting resistors.
Operating from VCC = 2.7V ~ 5.5V
1.2W output power @ VCC = 5V, THD+N= 1%,
f = 1kHz, with 8Ω load
Ultra-low consumption in standby mode (much
less than 1μA)
65dB PSRR @217Hz in grounded mode
Near-zero click-and-pop
Ultra-low distortion (0.025%@0.5W, 1kHz)
SOP-8 and MSOP-8 package
APPLICATIONS




Mobile phones
PDAs
Portable electronic devices
Notebook computer
TYPICAL APPLICATION CIRCUIT
Rfeed
20kΩ
Vcc
Cfeed
+
Vcc
Cin
0.22uF
Rin
20kΩ
Vin-
-
Vin+
Cs
1uF
Vout1
+
Vout2
AV = -1
+
Bypass
Standby
Standby
Control
Cb
1uF
+
Bias
GND
Figure 1
Integrated Silicon Solution, Inc. – www.issi.com
Rev.A, 11/22/2011
Typical Application Circuit
1
IS31AP4991
PIN CONFIGURATION
Package
Pin Configuration (Top View)
SOP-8
VIN+
1
8
VCC
VOUT1
2
7
Standby
VIN-
3
6
VOUT2
GND
4
5
Bypass
Standby
1
8
VOUT2
Bypass
2
7
GND
VIN+
3
6
VCC
VIN-
4
5
VOUT1
MSOP-8
PIN DESCRIPTION
No.
Pin
SOP
MSOP
VIN+
1
3
Positive input of the first amplifier.
VOUT1
2
5
Negative output of the IS31AP4991. Connected to the
load and to the feedback resistor Rfeed.
VIN-
3
4
Negative input of the first amplifier, receives the audio
input signal. Connected to the feedback resistor Rfeed
and to the input resistor Rin.
GND
4
7
Ground.
Bypass
5
2
Bypass capacitor pin which provides the common
mode voltage (Vcc/2).
VOUT2
6
8
Positive output of the IS31AP4991. Connected to the
load.
Standby
_____________
7
1
The device enters shutdown mode when a low level is
applied on this pin.
Vcc
8
6
Positive analog supply of the chip.
Description
Copyright © 2011 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products. Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that: a.) the risk of injury or damage has been minimized; b.) the user assume all such risks; and c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. – www.issi.com
Rev.A, 11/22/2011
2
IS31AP4991
ORDERING INFORMATION
Industrial Range: -40°C to +85°C
Order Part No.
Package
QTY/Reel
IS31AP4991-GRLS2-TR
SOP-8, Lead-free
2500
IS31AP4991-SLS2-TR
MSOP-8, Lead-free
2500
Integrated Silicon Solution, Inc. – www.issi.com
Rev.A, 11/22/2011
3
IS31AP4991
ABSOLUTE MAXIMUM RATINGS (Notes 1)
Supply voltage, VDD
Voltage at any input pin
Junction temperature, TJMAX
Storage temperature range, Tstg
Operating temperature ratings
Thermal resistance, θJA(SOP-8)
θJA(MSOP-8)
Power dissipation (Note 2)
-0.3V ~ +6.0V
-0.3V ~ VDD+0.3V
-40°C ~ +150°C
-65°C ~ +150°C
−40°C ~ +85°C
58°C/W
160°C/W
Internally Limited
Note 1: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other condition beyond those indicated in the operational sections of the specifications
is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Note 2: The maximum power dissipation must be derated at elevated temperatures and is dictated by TJMAX, θJA, and the ambient temperature
TA. The maximum allowable power dissipation is PDMAX = (TJMAX–TA)/θJA or the number given in Absolute Maximum Ratings, whichever is lower.
For the IS31AP4990D, see power derating curves for additional information.
ELECTRICAL CHARACTERISTICS
The following specifications apply for Cin = 0.22μF, Rin = Rfeed = 20kΩ, Cb = 1μF, unless otherwise specified. Limits
apply for TA = 25°C. VCC=5V (Note 3 or specified)
Symbol
Parameter
ICC
Quiescent power supply current
Condition
Typ.
Standby current
VCC = 0V, Io = 0A, no Load
VSTBY = GND, RL = ∞
VSTBYH
Shutdown voltage input high
VSTBYL
Shutdown voltage input low
ISTBY
VOS
Output offset voltage
Po
Output power (8Ω)
TWU
Wake-up time (Note 4)
Limit
4.8
Unit
mA (max)
1
μA(max)
VCC = 5.5V
1.4
V(min)
VCC = 2.7V
0.4
V(max)
15
mV (max)
THD+N = 1%; f = 1kHz
1.18
THD+N = 10%; f = 1kHz
Cb = 1μF
1.46
115
ms
0.025
%
THD+N
Total harmonic distortion+noise
(Note 4)
Po = 0.5Wrms; f = 1kHz
PSRR
Power supply rejection ratio
(Note 4)
Vripple p-p = 200mV
Input Grounded
f = 217Hz
65
f = 1kHz
77
W
dB
The following specifications apply for Cin = 0.22μF, Rin = Rfeed = 20kΩ, Cb = 1μF, unless otherwise specified. Limits
apply for TA= 25°C. VCC=3V (Note 3 or specified)
Symbol
Parameter
ICC
Quiescent power supply current
VCC = 0V, Io = 0A, no Load
Standby current
VSTBY = GND, RL = ∞
ISTBY
Typ.
Limit
3.8
Unit
mA(max)
1
μA(max)
THD+N = 1%; f = 1kHz
405
THD+N = 10%; f = 1kHz
502
Wake-up time (Note 4)
Cb = 1μF
102
ms
Total harmonic distortion+noise
(Note 4)
Po = 0.3Wrms; f = 1kHz
0.027
%
Po
Output power (8Ω)
TWU
THD+N
Condition
mW
Note 3: Production testing of the device is performed at 25°C. Functional operation of the device and parameters specified over other
temperature range, are guaranteed by design, characterization and process control.
Note 4: Guaranteed by design.
Integrated Silicon Solution, Inc. – www.issi.com
Rev.A, 11/22/2011
4
IS31AP4991
TYPICAL PERFORMANCE CHARACTERISTIC
10
5
2
10
Vcc = 3V
RL = 8Ω
f = 1kHz
5
2
1
THD+N (%)
THD+N (%)
1
0.5
0.2
0.1
0.5
0.2
0.1
0.05
0.05
0.02
0.02
0.01
10m
Vcc = 5V
RL = 8Ω
f = 1kHz
20m
50m
100m 200m
500m
1
0.01
10m
2
20m
50m
Output Power (W)
Figure 2
THD+N vs. Output Power
Figure 3
10
5
5
2
1
0.5
0.2
1
2
THD+N vs. Output Power
0.5
0.2
0.1
0.05
0 .05
0.02
0 .02
50 100 200
500 1k
2k
5k
20k
Vcc = 5V
RL = 8Ω
Power=800mW
1
0.1
0.01
20
500m
10
Vcc = 3V
RL = 8Ω
Power=250mW
THD+N (%)
THD+N (%)
2
100m 200m
Output Power (W)
0 .01
20
50 100 200
Frequency (Hz)
500 1k
2k
Figure 4
THD+N vs. Frequency
Figure 5
THD+N vs. Frequency
Figure 6
PSRR vs. Frequency
Figure 7
PSRR vs. Frequency
Integrated Silicon Solution, Inc. – www.issi.com
Rev.A, 11/22/2011
20k
5k
Frequency (H z)
5
IS31AP4991
100 u
Output Noise Voltage (V)
70 u
Vcc = 5V
RL = 8Ω
PoWeighted
A
= 800mWFilter
50 u
40 u
30 u
20 u
10 u
20
50 100 200
500 1k
2k
5k
20k
Frequency (Hz)
Figure 8
Noise Floor
Integrated Silicon Solution, Inc. – www.issi.com
Rev.A, 11/22/2011
Figure 9
Output Power vs. Power Supply
6
IS31AP4991
APPLICATION INFORMATION
BTL CONFIGURATION PRINCIPLE
The IS31AP4991 is a monolithic power amplifier with a
BTL output type. BTL (bridge tied load) means that
each end of the load is connected to two single-ended
output amplifiers. Thus, we have:
Single-ended output 1 = Vout1 = Vout (V)
Single ended output 2 = Vout2 = -Vout (V)
1
2R feed C feed
DECOUPLING OF THE CIRCUIT
Two capacitors are needed to correctly bypass the
IS31AP4991: a power supply bypass capacitor Cs and
a bias voltage bypass capacitor Cb.
Cs has particular influence on the THD+N in the high
frequency region (above 7kHz) and an indirect
influence on power supply disturbances. With a value
for Cs of 1μF, you can expect THD+N levels similar to
those shown in the datasheet.
and
Vout1 - Vout2 = 2Vout (V)
The output power is:
Pout 
FCH 
(2Vout RMS ) 2
RL
For the same power supply voltage, the output power
in BTL configuration is four times higher than the
output power in single ended configuration.
In the high frequency region, if Cs is lower than 1μF, it
increases THD+N and disturbances on the power
supply rail are less filtered.
On the other hand, if Cs is higher than 1μF, those
disturbances on the power supply rail are more filtered.
The typical application schematic is shown in Figure 1
on page 1.
Cb has an influence on THD+N at lower frequencies,
but its function is critical to the final result of PSRR
(with input grounded and in the lower frequency
region).
In the flat region (no Cin effect), the output voltage of
the first stage is (in Volts):
If Cb is lower than 1μF, THD+N increases at lower
frequencies and PSRR worsens.
GAIN IN A TYPICAL APPLICATION SCHEMATIC
Vout1  (Vin )
R feed
Rin
For the second stage: Vout2 = -Vout1 (V)
The differential output voltage is (in Volts):
Vout 2  Vout1  2Vin
R feed
Rin
The differential gain, Gv, is given by:
Gv 
R
Vout 2  Vout1
 2Vin feed
Vin
Rin
Vout2 is in phase with Vin and Vout1 is phased 180° with
Vin. This means that the positive terminal of the
loudspeaker should be connected to Vout2 and the
negative to Vout1.
LOW AND HIGH FREQUENCY RESPONSE
In the low frequency region, Cin starts to have an effect.
Cin forms with Rin a high-pass filter with a -3dB cut-off
frequency. FCL is in Hz.
FCL 
1
2RinCin
In the high frequency region, you can limit the
bandwidth by adding a capacitor (Cfeed) in parallel with
Rfeed. It forms a low-pass filter with a -3dB cut-off
frequency. FCH is in Hz.
Integrated Silicon Solution, Inc. – www.issi.com
Rev.A, 11/22/2011
If Cb is higher than 1μF, the benefit on THD+N at lower
frequencies is small, but the benefit to PSRR is
substantial.
Note that Cin has a non-negligible effect on PSRR at
lower frequencies. The lower the value of Cin, the
higher the PSRR is.
WAKE-UP TIME (tWU)
When the standby is released to put the device ON,
the bypass capacitor Cb will not be charged
immediately. As Cb is directly linked to the bias of the
amplifier, the bias will not work properly until the Cb
voltage is correct. The time to reach this voltage is
called wake-up time or tWU and specified in the
electrical characteristics table with Cb = 1μF.
POP PERFORMANCE
Pop performance is intimately linked with the size of
the input capacitor Cin and the bias voltage bypass
capacitor Cb.
The size of Cin is dependent on the lower cut-off
frequency and PSRR values requested. The size of Cb
is dependent on THD+N and PSRR values requested
at lower frequencies.
Moreover, Cb determines the speed with which the
amplifier turns ON.
7
IS31AP4991
CLASSIFICATION REFLOW PROFILES
Profile Feature
Pb-Free Assembly
Preheat & Soak
Temperature min (Tsmin)
Temperature max (Tsmax)
Time (Tsmin to Tsmax) (ts)
150°C
200°C
60-120 seconds
Average ramp-up rate (Tsmax to Tp)
3°C/second max.
Liquidous temperature (TL)
Time at liquidous (tL)
217°C
60-150 seconds
Peak package body temperature (Tp)*
Max 260°C
Time (tp)** within 5°C of the specified
classification temperature (Tc)
Max 30 seconds
Average ramp-down rate (Tp to Tsmax)
6°C/second max.
Time 25°C to peak temperature
8 minutes max.
Figure 10
Classification Profile
Integrated Silicon Solution, Inc. – www.issi.com
Rev.A, 11/22/2011
8
IS31AP4991
TAPE AND REEL INFORMATION
SOP-8
Integrated Silicon Solution, Inc. – www.issi.com
Rev.A, 11/22/2011
9
IS31AP4991
MSOP-8
Integrated Silicon Solution, Inc. – www.issi.com
Rev.A, 11/22/2011
10
IS31AP4991
PACKAGE INFORMATION
SOP-8
Integrated Silicon Solution, Inc. – www.issi.com
Rev.A, 11/22/2011
11
IS31AP4991
MSOP-8
Note: All dimensions in millimeters unless otherwise stated.
Integrated Silicon Solution, Inc. – www.issi.com
Rev.A, 11/22/2011
12