RENESAS 2SJ550

2SJ550(L), 2SJ550(S)
Silicon P Channel MOS FET
REJ03G0897-0300
(Previous: ADE-208-633A)
Rev.3.00
Sep 07, 2005
Description
High speed power switching
Features
• Low on-resistance
RDS (on) = 0.075 Ω typ.
• Low drive current.
• 4 V gate drive devices.
• High speed switching.
Outline
RENESAS Package code: PRSS0004AE-A
(Package name: LDPAK (L) )
RENESAS Package code: PRSS0004AE-B
(Package name: LDPAK (S)-(1) )
D
4
4
1. Gate
2. Drain
3. Source
4. Drain
G
1
1
2
2
3
3
S
Rev.3.00 Sep 07, 2005 page 1 of 8
2SJ550(L), 2SJ550(S)
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Body to drain diode reverse drain current
Symbol
VDSS
Value
–60
Unit
V
VGSS
ID
±20
–15
V
A
–60
–15
A
A
ID (pulse)
IDR
Note 1
Note 3
Avalanche current
Avalanche energy
IAP
Note 3
EAR
–15
19
A
mJ
Channel dissipation
Channel temperature
Pch
Tch
Note 2
50
150
W
°C
–55 to +150
°C
Storage temperature
Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1%
2. Value at Tc = 25°C
3. Value at Tch = 25°C, Rg ≥ 50 Ω
Tstg
Electrical Characteristics
(Ta = 25°C)
Item
Symbol
Min
Typ
Max
Unit
V (BR) DSS
V (BR) GSS
–60
±20
—
—
—
—
V
V
ID = –10 mA, VGS = 0
IG = ±100 µA, VDS = 0
IDSS
IGSS
—
—
—
—
–10
±10
µA
µA
VDS = –60 V, VGS = 0
VGS = ±16 V, VDS = 0
Gate to source cutoff voltage
Static drain to source on state resistance
VGS (off)
RDS (on)
–1.0
—
—
0.075
–2.0
0.095
V
Ω
ID = –1 mA, VDS = –10 V
Note 4
ID = –8 A, VGS = –10 V
Forward transfer admittance
RDS (on)
|yfs|
—
6.5
0.105
11
0.155
—
Ω
S
ID = –8 A, VGS = –4 V
Note 4
ID = –8 A, VDS = –10 V
Input capacitance
Output capacitance
Ciss
Coss
—
—
850
420
—
—
pF
pF
Reverse transfer capacitance
Turn-on delay time
Crss
td (on)
—
—
110
12
—
—
pF
ns
VDS = –10 V
VGS = 0
f = 1 MHz
Rise time
Turn-off delay time
tr
td (off)
—
—
75
125
—
—
ns
ns
Fall time
Body to drain diode forward voltage
tf
VDF
—
—
75
–1.1
—
—
ns
V
trr
—
70
—
ns
Drain to source breakdown voltage
Gate to source breakdown voltage
Zero gate voltage drain current
Gate to source leak current
Body to drain diode reverse recovery time
Note:
4. Pulse test
Rev.3.00 Sep 07, 2005 page 2 of 8
Test Conditions
Note 4
VGS = –10 V
ID = –8 A
RL = 3.75 Ω
IF = –15 A, VGS = 0
IF = –15 A, VGS = 0
diF/dt = 50 A/µs
2SJ550(L), 2SJ550(S)
Main Characteristics
Maximum Safe Operation Area
Power vs. Temperature Derating
1000
ID (A)
300
60
Drain Current
Channel Dissipation
Pch (W)
80
40
20
10 µs
100
30
0
µs
1
=1
m
s
0
Op
ms
era
(1
tio
sh
n(
ot)
T
Operation in
c=
2
this area is
5°
C)
limited by RDS (on)
DC
10
3
1
0.3
0
50
100
150
Case Temperature
0.1
0.1
200
Tc (°C)
3
10
100
30
VDS (V)
–20
–10 V
–16
1
Typical Transfer Characteristics
VDS = –10 V
Pulse Test
–4 V
Pulse Test
–6 V
–3.5 V
ID (A)
–20
0.3
Drain to Source Voltage
Typical Output Characteristics
ID (A)
PW
Ta = 25°C
0
–16
–12
–8
–3 V
–4
Drain Current
–12
Drain Current
10
–8
25°C
Tc = 75°C
–4
VGS = –2.5 V
–25°C
0
0
–2
–4
–6
–8
–10
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
–4.0
Pulse Test
–3.2
–2.4
–1.6
ID = –15 A
–10 A
–5 A
–0.8
0
0
–4
–8
–12
Gate to Source Voltage
Rev.3.00 Sep 07, 2005 page 3 of 8
–16
–20
VGS (V)
0
–1
–2
–3
–4
Gate to Source Voltage
VDS (V)
–5
VGS (V)
Static Drain to Source on State Resistance
vs. Drain Current
Static Drain to Source on State Resistance
RDS (on) (Ω)
Drain to Source Saturation Voltage VDS (on) (V)
Drain to Source Voltage
0
10
Pulse Test
3
1
0.3
VGS = –4 V
0.1
–10 V
0.03
0.01
–0.1 –0.3
–1
–3
Drain Current
–10
–30
ID (A)
–100
2SJ550(L), 2SJ550(S)
Forward Transfer Admittance vs.
Drain Current
Forward Transfer Admittance |yfs| (S)
Static Drain to Source on State Resistance
RDS (on) (Ω)
Static Drain to Source on State Resistance
vs. Temperature
0.40
Pulse Test
0.32
–5 A
–10 A
0.24
ID = –15 A
VGS = –4 V
0.16
0.08
–5 A, –10 A, –15 A
–10 V
0
–40
0
40
80
Case Temperature
120
160
100
30
Tc = –25°C
10
25°C
3
75°C
1
0.3
VDS = –10 V
Pulse Test
0.1
–0.1
Tc (°C)
–10
–30
–100
10000
3000
200
Capacitance C (pF)
Reverse Recovery Time trr (ns)
–3
Typical Capacitance vs.
Drain to Source Voltage
500
100
50
20
10
–0.5 –1
–2
300
Crss
IDR (A)
–8
VDS
VDD = –50 V
–25 V
–10 V
–60
–12
–16
–80
ID = –15 A
–100
0
8
16
Gate Charge
Rev.3.00 Sep 07, 2005 page 4 of 8
24
32
Qg (nc)
–10
–20
–30
–40
–50
–20
40
1000
Switching Time t (ns)
VGS
–40
VGS (V)
–4
Gate to Source Voltage
–20
0
Switching Characteristics
0
VDD = –10 V
–25 V
–50 V
VGS = 0
f = 1 MHz
Drain to Source Voltage VDS (V)
Dynamic Input Characteristics
0
Coss
100
10
–5 –10 –20
Reverse Drain Current
Ciss
1000
30
di / dt = 50 A / µs
VGS = 0, Ta = 25°C
5
–0.1 –0.2
VDS (V)
–1
Drain Current ID (A)
Body-Drain Diode Reverse
Recovery Time
Drain to Source Voltage
–0.3
500
VGS = –10 V, VDD = –30 V
PW = 5 µs, duty ≤ 1 %
200
td(off)
100
tf
50
tr
20
td(on)
10
–0.1 –0.2
–0.5 –1
–2
Drain Current
–5 –10 –20
ID (A)
2SJ550(L), 2SJ550(S)
Reverse Drain Current vs.
Source to Drain Voltage
Repetitive Avalanche Energy EAR (mJ)
Maximum Avalanche Energy vs.
Channel Temperature Derating
Reverse Drain Current IDR (A)
–20
–16
–10 V
–12
–5 V
–8
VGS = 0, 5 V
–4
Pulse Test
0
0
–0.4
–0.8
–1.2
–1.6
Source to Drain Voltage
–2.0
20
IAP = –15 A
VDD = –25 V
duty < 0.1 %
Rg ≥ 50 Ω
16
12
8
4
0
25
50
75
100
125
150
Channel Temperature Tch (°C)
VSD (V)
Normalized Transient Thermal Impedance γ s (t)
Normalized Transient Thermal Impedance vs. Pulse Width
3
Tc = 25°C
D=1
1
0.5
0.3
0.2
0.1
0.1
0.05
θch – c (t) = γ s (t) • θch – c
θch – c = 2.5°C/W, Tc = 25°C
0.02
PDM
0.03
0.0
1s
1
t
ho
pu
D=
lse
0.01
10 µ
PW
T
PW
T
100 µ
10 m
1m
100 m
1
10
Pulse Width PW (S)
Avalanche Test Circuit
VDS
Monitor
Avalanche Waveform
L
EAR =
1
• L • IAP2 •
2
VDSS
VDSS – VDD
IAP
Monitor
Rg
V(BR)DSS
IAP
D.U.T
VDD
VDS
ID
Vin
–15 V
50 Ω
0
Rev.3.00 Sep 07, 2005 page 5 of 8
VDD
2SJ550(L), 2SJ550(S)
Switching Time Test Circuit
Waveform
Vin
Vout
Monitor
Vin Monitor
10%
D.U.T.
90%
RL
90%
90%
Vin
–10 V
50 Ω
VDD
= –30 V
Vout
td(on)
Rev.3.00 Sep 07, 2005 page 6 of 8
10%
tr
10%
td(off)
tf
2SJ550(L), 2SJ550(S)
Package Dimensions
JEITA Package Code
RENESAS Code
Package Name
MASS[Typ.]

PRSS0004AE-A
LDPAK(L) / LDPAK(L)V
1.40g
8.6 ± 0.3
1.3 ± 0.15
1.3 ± 0.2
1.37 ± 0.2
0.76 ± 0.1
2.54 ± 0.5
2.54 ± 0.5
RENESAS Code
Package Name
PRSS0004AE-B
LDPAK(S)-(1) / LDPAK(S)-(1)V
0.4 ± 0.1
MASS[Typ.]
Unit: mm
1.30g
(1.5)
10.0
Rev.3.00 Sep 07, 2005 page 7 of 8
2.54 ± 0.5
0.4 ± 0.1
0.3
3.0 +– 0.5
2.54 ± 0.5
0.2
0.86 +– 0.1
7.8
7.0
2.49 ± 0.2
0.2
0.1 +– 0.1
1.37 ± 0.2
1.3 ± 0.2
7.8
6.6
1.3 ± 0.15
+ 0.3
– 0.5
8.6 ± 0.3
(1.5)
(1.4)
4.44 ± 0.2
10.2 ± 0.3
1.7
SC-83
2.49 ± 0.2
11.0 ± 0.5
11.3 ± 0.5
0.3
10.0 +– 0.5
(1.4)
4.44 ± 0.2
10.2 ± 0.3
0.2
0.86 +– 0.1
JEITA Package Code
Unit: mm
2.2
2SJ550(L), 2SJ550(S)
Ordering Information
Part Name
2SJ550L-E
2SJ550STL-E
Quantity
500 pcs
1000 pcs
Shipping Container
Box (Sack)
Taping
Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of
production before ordering the product.
Rev.3.00 Sep 07, 2005 page 8 of 8
Sales Strategic Planning Div.
Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan
Keep safety first in your circuit designs!
1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble
may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage.
Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary
circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap.
Notes regarding these materials
1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's
application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party.
2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data,
diagrams, charts, programs, algorithms, or circuit application examples contained in these materials.
3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of
publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is
therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product
information before purchasing a product listed herein.
The information described here may contain technical inaccuracies or typographical errors.
Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors.
Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Technology Corp. Semiconductor
home page (http://www.renesas.com).
4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to
evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes
no responsibility for any damage, liability or other loss resulting from the information contained herein.
5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life
is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a
product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater
use.
6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials.
7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and
cannot be imported into a country other than the approved destination.
Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited.
8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein.
http://www.renesas.com
RENESAS SALES OFFICES
Refer to "http://www.renesas.com/en/network" for the latest and detailed information.
Renesas Technology America, Inc.
450 Holger Way, San Jose, CA 95134-1368, U.S.A
Tel: <1> (408) 382-7500, Fax: <1> (408) 382-7501
Renesas Technology Europe Limited
Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, U.K.
Tel: <44> (1628) 585-100, Fax: <44> (1628) 585-900
Renesas Technology Hong Kong Ltd.
7th Floor, North Tower, World Finance Centre, Harbour City, 1 Canton Road, Tsimshatsui, Kowloon, Hong Kong
Tel: <852> 2265-6688, Fax: <852> 2730-6071
Renesas Technology Taiwan Co., Ltd.
10th Floor, No.99, Fushing North Road, Taipei, Taiwan
Tel: <886> (2) 2715-2888, Fax: <886> (2) 2713-2999
Renesas Technology (Shanghai) Co., Ltd.
Unit2607 Ruijing Building, No.205 Maoming Road (S), Shanghai 200020, China
Tel: <86> (21) 6472-1001, Fax: <86> (21) 6415-2952
Renesas Technology Singapore Pte. Ltd.
1 Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632
Tel: <65> 6213-0200, Fax: <65> 6278-8001
Renesas Technology Korea Co., Ltd.
Kukje Center Bldg. 18th Fl., 191, 2-ka, Hangang-ro, Yongsan-ku, Seoul 140-702, Korea
Tel: <82> 2-796-3115, Fax: <82> 2-796-2145
Renesas Technology Malaysia Sdn. Bhd.
Unit 906, Block B, Menara Amcorp, Amcorp Trade Centre, No.18, Jalan Persiaran Barat, 46050 Petaling Jaya, Selangor Darul Ehsan, Malaysia
Tel: <603> 7955-9390, Fax: <603> 7955-9510
© 2005. Renesas Technology Corp., All rights reserved. Printed in Japan.
Colophon .3.0