H7N1002LD, H7N1002LS, H7N1002LM Silicon N Channel MOS FET High Speed Power Switching REJ03G1131-0700 (Previous: ADE-208-1573E) Rev.7.00 Apr 07, 2006 Features • Low on-resistance RDS (on) = 8 mΩ typ. • Low drive current • Available for 4.5 V gate drive Outline RENESAS Package code: PRSS0004AE-A (Package name: LDPAK (L) ) RENESAS Package code: PRSS0004AE-B (Package name: LDPAK (S)-(1) ) 4 4 1 1 2 1. Gate 2. Drain 3. Source 4. Drain 2 3 3 H7N1002LD H7N1002LS RENESAS Package code: PRSS0004AE-C (Package name: LDPAK (S)-(2) ) D 4 G 1 2 3 H7N1002LM Rev.7.00 Apr 07, 2006 page 1 of 8 S H7N1002LD, H7N1002LS, H7N1002LM Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Symbol VDSS Value 100 Unit V VGSS ID ±20 75 V A 300 75 A A Note 1 Drain peak current Body to drain diode reverse drain current ID (pulse) IDR Note 3 Avalanche current Avalanche energy IAP Note 3 EAR 50 166 A mJ Channel dissipation Channel temperature Pch Tch Note 2 100 150 W °C –55 to +150 °C Storage temperature Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1% 2. Value at Tc = 25°C 3. Value at Tch = 25°C, Rg ≥ 50 Ω Tstg Electrical Characteristics (Ta = 25°C) Item Symbol Min Typ Max Unit V (BR) DSS V (BR) GSS 100 ±20 — — — — V V ID = 10 mA, VGS = 0 IG = ±100 µA, VDS = 0 Gate to source leak current Zero gate voltage drain current IGSS IDSS — — — — ±10 10 µA µA VGS = ±16 V, VDS = 0 VDS = 100 V, VGS = 0 Gate to source cutoff voltage Static drain to source on state resistance VGS (off) RDS (on) 1.0 — — 8 2.5 10 V mΩ ID = 1 mA, VDS = 10 V Note 4 ID = 37.5 A, VGS = 10 V 10 95 15 — mΩ S ID = 37.5 A, VGS = 4.5 V Note 4 ID = 37.5 A, VDS = 10 V VDS = 10 V VGS = 0 f = 1 MHz Drain to source breakdown voltage Gate to source breakdown voltage |yfs| — 57 Input capacitance Output capacitance Ciss Coss — — 9700 740 — — pF pF Reverse transfer capacitance Total gate charge Crss Qg — — 330 155 — — pF nC Gate to source charge Gate to drain charge Qgs Qgd — — 35 33 — — nC nC Turn-on delay time Rise time td (on) tr — — 43 245 — — ns ns Turn-off delay time Fall time td (off) tf — — 130 25 — — ns ns Body to drain diode forward voltage Body to drain diode reverse recovery time VDF trr — — 0.93 70 — — V ns Forward transfer admittance Note: 4. Pulse test Rev.7.00 Apr 07, 2006 page 2 of 8 Test Conditions Note 4 Note 4 VDD = 50 V VGS = 10 V ID = 75 A VGS = 10 V, ID = 37.5 A RL = 0.8 Ω Rg = 4.7 Ω IF = 75 A, VGS = 0 IF = 75 A, VGS = 0 diF/dt = 100 A/µs H7N1002LD, H7N1002LS, H7N1002LM Main Characteristics Maximum Safe Operation Area Power vs. Temperature Derating 1000 150 100 50 ID (A) 300 100 Drain Current Channel Dissipation Pch (W) 200 10 0 0 50 100 200 150 Case Temperature 1 30 DC Operation (Tc = 25°C) 3 PW = 10 ms 1 Operation in (1shot) 0.3 this area is limited by RDS(on) 0.1 Ta = 25°C 0.03 0.1 0.3 1 3 10 30 50 10 V 4V VDS = 10 V Pulse Test 3.6 V 40 ID (A) ID (A) Typical Transfer Characteristics Pulse Test Drain Current Drain Current 40 30 30 3.4 V 20 10 VGS = 3 V 20 Tc = 75°C 25°C 10 –25°C 0 0 0 2 4 6 Drain to Source Voltage 8 0 10 Pulse Test 0.8 0.6 ID = 50 A 0.4 20 A 0.2 10 A 0 0 5 10 15 20 Gate to Source Voltage VGS (V) Rev.7.00 Apr 07, 2006 page 3 of 8 2 3 4 5 VGS (V) Static Drain to Source on State Resistance vs. Drain Current Drain to Source on State Resistance RDS(on) (mΩ) 1.0 1 Gate to Source Voltage VDS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Drain to Source Saturation Voltage VDS(on) (V) 100 300 VDS (V) Drain to Source Voltage Tc (°C) Typical Output Characteristics 50 1 1 0 0 µs 0 m µs s 50 Pulse Test 20 VGS = 4.5 V 10 10 V 5 2 1 0.5 2 5 10 20 50 Drain Current ID (A) 100 200 H7N1002LD, H7N1002LS, H7N1002LM Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Drain to Source on State Resistance RDS(on) (mΩ) Static Drain to Source on State Resistance vs. Temperature 40 Pulse Test 32 50 A 24 ID = 10 A, 20 A 16 VGS = 4.5 V 50 A 8 10 A, 20 A 10 V 0 –40 0 40 80 120 Case Temperature 160 200 100 Tc = –25°C 10 25°C 1 75°C 0.1 VDS = 10 V Pulse Test 0.02 0.01 Tc (°C) 100 20000 10000 Capacitance C (pF) Reverse Recovery Time trr (ns) 10 Typical Capacitance vs. Drain to Source Voltage 100 50 20 di / dt = 100 A / µs VGS = 0, Ta = 25°C 10 0.1 Ciss 5000 2000 1000 Coss 500 200 Crss 100 50 VGS = 0 f = 1 MHz 20 0.3 1 3 10 Reverse Drain Current 30 100 0 10 160 16 VDD = 25 V 50 V 80 V 120 12 VDS 80 8 40 4 VDD = 80 V 50 V 25 V 0 0 80 160 240 320 Gate Charge Qg (nc) Rev.7.00 Apr 07, 2006 page 4 of 8 40 50 0 400 1000 Switching Time t (ns) VGS VGS (V) 20 ID = 75 A 30 Switching Characteristics Gate to Source Voltage 200 20 Drain to Source Voltage VDS (V) IDR (A) Dynamic Input Characteristics VDS (V) 1 Drain Current ID (A) Body to Drain Diode Reverse Recovery Time Drain to Source Voltage 0.1 300 tr td(off) 100 td(on) 30 tf 10 3 1 0.1 VGS = 10 V, VDD = 30 V PW = 5 µs, duty ≤ 1 % Rg = 4.7 Ω 0.3 1 3 Drain Current 10 30 ID (A) 100 H7N1002LD, H7N1002LS, H7N1002LM Maximum Avalanche Energy vs. Channel Temperature Derating Repetitive Avalanche Energy EAR (mJ) Reverse Drain Current IDR (A) Reverse Drain Current vs. Source to Drain Voltage 100 80 10 V 60 40 VGS = 0, –5 V 5V 20 Pulse Test 0 0.4 0 0.8 1.2 1.6 Source to Drain Voltage 2.0 200 IAP = 50 A VDD = 25 V duty < 0.1 % Rg ≥ 50 Ω 160 120 80 40 0 25 VSD (V) 50 75 100 125 150 Channel Temperature Tch (°C) Normalized Transient Thermal Impedance γ s (t) Normalized Transient Thermal Impedance vs. Pulse Width 3 Tc = 25°C 1 D=1 0.5 0.3 0.2 0.1 θch – c (t) = γ s (t) • θch – c θch – c = 1.25°C/W, Tc = 25°C 0.1 0.05 PDM 0.02 0.03 0.0 1 1s D= e uls PW tp ho 0.01 10 µ PW T T 100 µ 1m 10 m 100 m 10 1 Pulse Width PW (S) Avalanche Test Circuit VDS Monitor Avalanche Waveform L EAR = 1 • L • IAP2 • 2 VDSS VDSS – VDD IAP Monitor Rg V(BR)DSS IAP D.U.T VDD VDS ID Vin 15 V 50 Ω 0 Rev.7.00 Apr 07, 2006 page 5 of 8 VDD H7N1002LD, H7N1002LS, H7N1002LM Switching Time Test Circuit Waveform 90% Vout Monitor Vin Monitor D.U.T. Rg Vin Vout Vin 10 V VDS = 30 V 10% 10% 90% td(on) Rev.7.00 Apr 07, 2006 page 6 of 8 10% RL tr 90% td(off) tf H7N1002LD, H7N1002LS, H7N1002LM Package Dimensions RENESAS Code PRSS0004AE-A MASS[Typ.] 1.40g 4.44 ± 0.2 1.3 ± 0.15 1.3 ± 0.2 1.37 ± 0.2 0.76 ± 0.1 2.54 ± 0.5 2.54 ± 0.5 JEITA Package Code SC-83 RENESAS Code PRSS0004AE-B 2.49 ± 0.2 11.0 ± 0.5 0.2 0.86 +– 0.1 Package Name LDPAK(S)-(1) Unit: mm 10.2 ± 0.3 8.6 ± 0.3 11.3 ± 0.5 0.3 10.0 +– 0.5 Previous Code LDPAK(L) / LDPAK(L)V Previous Code LDPAK(S)-(1) / LDPAK(S)-(1)V 0.4 ± 0.1 MASS[Typ.] 1.30g (1.5) 10.0 Rev.7.00 Apr 07, 2006 page 7 of 8 2.54 ± 0.5 0.4 ± 0.1 0.3 3.0 +– 0.5 2.54 ± 0.5 0.2 0.86 +– 0.1 7.8 7.0 2.49 ± 0.2 0.2 0.1 +– 0.1 1.37 ± 0.2 1.3 ± 0.2 7.8 6.6 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 Unit: mm 1.7 JEITA Package Code (1.4) Package Name LDPAK(L) 2.2 H7N1002LD, H7N1002LS, H7N1002LM JEITA Package Code RENESAS Code PRSS0004AE-C Previous Code LDPAK(S)-(2) / LDPAK(S)-(2)V MASS[Typ.] 1.35g 7.8 6.6 (2.3) 10.0 2.49 ± 0.2 7.8 7.0 1.3 ± 0.15 + 0.3 – 0.5 8.6 ± 0.3 (1.5) (1.4) 4.44 ± 0.2 10.2 ± 0.3 Unit: mm 1.7 Package Name LDPAK(S)-(2) 0.2 0.1 +– 0.1 2.2 1.37 ± 0.2 2.54 ± 0.5 0.2 0.86 +– 0.1 2.54 ± 0.5 0.4 ± 0.1 0.3 5.0 +– 0.5 1.3 ± 0.2 Ordering Information Part Name H7N1002LD-E H7N1002LSTL-E Quantity 500 pcs 1000 pcs Shipping Container Box (Conductive Sack) Taping H7N1002LMTL-E 1000 pcs Taping Note: For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. Rev.7.00 Apr 07, 2006 page 8 of 8 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. 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