M61112FP Coil-less VIF/SIF REJ03F0022-0100Z Rev.1.0 Sep.16.2003 Description M61112FP is a semiconductor integrated circuit consisting of IF signal processing for NTSC system. The circuit includes VIF amplifier, Video detector, Coil-less VCO, APC detector, IF/RF AGC, SIF limiter and FM detector functions, which permits a smaller tuner system. Feature • • • • • • • Inter and split system for NTSC Built-in coil-less VCO Non alignment AFT 3.58MHz/4.0MHz Reference frequency Built-in mute function VIF and SIF Built-in SIF buffer Receive FM radio Application TV set, VCR tuners. Recommended Operating Condition Operating power supply voltage 5+/–0.25V 19 18 17 16 QIF in (Inter/Split SW) GND VIF in1 20 VIF in2 IF AGC1 21 NC IF AGC2 Pin Configulation 15 EQ F/B 22 14 RF AGC NC 23 13 AFT Video out 24 12 Logic Vcc M61112FP TV/FM SW 25 Video in 26 11 Ref. signal (3.58/4.00) 10 Logic GND 8 Audio level cont. Rev.1.0, Sep.16.2003, page 1 of 18 4 Vreg. 3 5 SIF out (US/JP SW) 2 LIM in (Delay Point) 1 6 7 Audio out Video det out 28 S-meter NC VCO F/B 9 APC Vcc 27 M61112FP IF AGC2 IF AGC1 NC VIF in VIF in GND QIF in Block Diagram 21 20 19 18 17 16 15 EQ F/B 22 VIF AMP IF AGC DET NC 23 13 AFT AFT 12 Logic Vcc 11 Ref. signal 10 Logic GND 9 NC 8 Audio level cont. QIF AGC APC Video in RF AGC Video Det Video out 24 TV/FM SW 25 RF AGC QIF Det 14 EQ AMP Coil-less VCO 26 AMP SIF AMP LPF FM Det LIM AMP Vcc 27 AF AMP SIF Meter Video det out 28 1 2 3 4 5 6 7 APC VCO F/B SIF IN (delay point) Vreg. SIF out (US/JP SW) S-meter Audio out Rev.1.0, Sep.16.2003, page 2 of 18 M61112FP Pin Description Pin No. Pin Name Function 1 APC APC filter terminal. Terminal Voltage 2.6V (no input) Equivalent Circuit 27 3.4V 21K 1 21K 300 300 1.5K 200uA 2 3 VCO F/B SIF in (Delay Point) VCO Feedback terminal. The feedback control is to keep the internal VCO of the uniform free-running frequency. This terminal has dual function, connecting to gnd select mode with VIF/SIF defeat. 3.0V RF AGC Delay terminal.4.5MHz SIF signal "LIM IN" is input at this pin which has dual function. The RF AGC Delay Point is set up of DC component of this signal. AC component is FM signal. 2.1V 27 To mute SW 1K 20K 10K 2 27 3.7V 7K 40 3 5.1K 40p 23K 160uA 4 Vreg Regulated voltage output terminal. The voltage is approximately 3 V. 3.0V 17.5K 27 50 4 9.9K 6.2K 5 SIF out (US/JP SW) SIF output terminal. FM signal which is converted to 4.5MHz is output. This pin has dual function of being VIF VCO type selection terminal. Connect to GND with 1.5kΩ ;JPN"58.75MHz" No connect;USA"45.75MHz" Rev.1.0, Sep.16.2003, page 3 of 18 2.2V 27 600 30K 3.8V 5 1.2mA 6p 20K M61112FP Pin No. Pin Name 6 S-meter 7 Audio out Function Terminal Voltage S-meter terminal. This Pin changes DC Voltage to keep regular the output amplitude of Pin5.It Does the AGC function. However, The output of this Pin is about 0V when it become out of AGC range for small input. 2.2V | 0V Sound output terminal. De-emphasis is achieved by external components. 2.3V Equivalent Circuit 27 100 6 27 200 7 0.8mA 8 9 10 11 Audio Level Cont. NC Logic GND Ref Signal (3.58/ 4.00) AF Bypass terminal. It is connected to one of the input of a differential amplifier,external capacitor provides AC filtering. When resistor is connected in series with capacitor, it is possible to lower the amplitude of the audio output. When audio output terminal is not use,please connect this terminal to GND. 2.8V — Ground terminal for Logic and Ref amp. — GND Reference signal input terminal. It is input external signal with sinewave. In case of 4MHz mode,connect to GND with 4.7 kΩ. 3.2V 27 8 30K 1K 100 30K 1K — 10 12 4.0V 4K 11 1.3K 4.5K 8p 210uA 12 Logic Vcc Power supply terminal for Logic and Ref amp. Rev.1.0, Sep.16.2003, page 4 of 18 5V 12 2p M61112FP Pin No. Pin Name 13 AFT (FM Carrier det) 14 RF AGC Terminal Voltage Function AFT output terminal. Because of pulse-like signal output, Smoothing capacitor is connected externally with TV mode. Under FM mode,this pin is carrier detector. Active ; High Non-active ; Low 5V | 0V RF AGC output terminal. It is current drive type. 5V | 0V Equivalent Circuit 27 350K 50 13 350K 27 50 14 500uA 15 QIF in (Inter/ Split SW) QIF Input terminal with SPLIT. This pin has dual function, The other is INTER/SPLIT SW. INTER : GND SPLIT : DC Open 2.4V 27 To INTER/ SPLIT SW 3.2V 1.5K 15 1.5K 180uA 16 GND 17 VIF in1 18 Ground terminal for VIF and SIF. IF signal after SAW filter is input. It is a balance-type input. GND 1.5V 27 2.3V 1.5V VIF in2 16 17 18 2K 2K 14K 19 NC — Rev.1.0, Sep.16.2003, page 5 of 18 — — M61112FP Pin No. Pin Name 20 IF AGC 1 Function IF AGC filter terminal 1. External capacitor effects AGC speed. When this terminal is grounded,the effect of VIF amp, becomes minimum gain. Terminal Voltage Equivalent Circuit 27 4.9V | 2.2V (TV) 10K 2.5K 21 21 IF AGC 2 IF AGC filter terminal 2. 20 4.0V | 2.0V (FM) 22 EQ AMP F/B Equalizer feedback terminal. It is possible to change the AC response of the video signal by attaching L,C,R to this terminal. 2.3V 27 2.2K 500 22 23 24 NC Video out — Video out terminal. — 2.3V (no input) 7K — 27 200 24 1.4mA 25 TV/FM SW TV/FM SW terminal. Open : TV Mode GND : FM Mode Connecting to GND with 100kΩ or adding to 1/2 Vcc at this terminal select to search mode. Rev.1.0, Sep.16.2003, page 6 of 18 5V (TV) 27 100K 100 25 50 M61112FP Pin No. Pin Name 26 Video in Function This terminal is input the video signal from Pin5"Video det out" by SIF trap. Input this terminal to DC of Video det signal is necessary for IF AGC function. Terminal Voltage =PIN28 27 100 26 27 Vcc Power supply terminal for VIF and SIF. 5V 28 Video det out Video detector output terminal. SIF trap and SIF BPF are connected to this terminal. It is necessary connecting external resistor for drive, because open emitter configuration. 2.3V (Load of 240Ω/ no signal) Rev.1.0, Sep.16.2003, page 7 of 18 Equivalent Circuit 27 27 50 28 M61112FP Absolute maximum ratings (Ta=25°C, unless otherwise noted) Parameter Symbol Ratings Unit Note Supply Voltage Total Power Dissipation Vcc Pd 6.0 1150 V mW — Conditions of this ratings. 2 (1) 70x70mm 1.6mmt ( 1 layer board) (2) Board material = Glass epoxy (FR-4) (3) Cupper share of board = 50% (4) Wind velocity = 0m/sec It changes with the material of mounting board, the Cupper share, etc. Operating Temperature Storage Temperature Topr Tstg –20 to 75 –40 to 150 °C °C — — Temperature Characteristics (maximum ratings) 1200 1150 Power Dissipation Pd [mW] 1000 800 690 600 400 200 0 0 25 50 75 100 125 150 Ambient Temperature Ta[˚C] Recommended Operating Condition (Ta=25°C, unless otherwise noted) Parameter Terminal # Ratings Unit Supply Voltage 12, 27 5.0 V Function Supply Voltage Range Reference Frequency 12, 27 11 4.75 to 5.25 3.579545 or 4.00 V MHz GND 10, 16 — — Rev.1.0, Sep.16.2003, page 8 of 18 M61112FP Electrical Characteristics General (Unless Otherwise Specified : : Ta = 25°C, Vcc = 5.0V, Ref Signal = 3.579545MHz, Vi = 100mVpp, SW Condition = 1) Limits Test Test No Parameter Symbol Circuit Point 1 VIF/SIF Vcc Current Icc1 1 Pin27 Input Point — Input SW Signal Condition Min — 44 Typ 63 Max Unit 82 mA 2 Logic Vcc Current 3.2 4.7 6.1 3 VIF/SIF Vcc Current Icc3 @Defeat Video out Voltage Vofm @FM Mode Fref Ref. Signal Input Level 4 5 Icc2 1 Pin12 — — 1 — — SW2=2 6.3 9.0 12.0 mA 1 Pin12 Pin27 TP24 — — SW25=2 - 0 0.5 V 1 Pin11 Pin11 — 50 100 600 mVpp Note# mA VIF Section 1 No Parameter 6 Video out Test Test Input Symbol Circuit Point Point Vodet 1 TP24 Pin17,18 Limits Input SW Signal Condition Min Typ Max Unit SG1 0.95 1.20 1.45 Vpp 7 Sync Tip level Vsync 1 TP24 Pin17,18 SG2 8 Video S/N VoS/N 1 SG2 Note# 1.20 1.45 1.70 V 48 50 — dB 1 SG3 6 7 — MHz 2 Video out Freq. Response 10 Input sensitivity BW 1 TP24 Pin17,18 A TP24 Pin17,18 VinMIN 1 TP24 Pin17,18 SG4 — 45 52 dBµV 3 11 Max.IF Input VinMAX 1 TP24 Pin17,18 SG5 101 105 — dBµV 4 12 IF AGC Range GR 1 — — 49 60 — dB 5 13 IF AGC voltage @80dBµV 14 Capture range U IFAGC 1 TP21 Pin17,18 SG6 2.7 3.0 3.3 V CR-U 1 TP24 Pin17,18 SG7 0.80 1.00 — MHz 6 15 Capture range L CR-L 1 TP24 Pin17,18 SG7 1.38 1.75 — MHz 7 16 Inter modulation IM 1 TP24 Pin17,18 SG8 32 38 — dB 8 17 D/G DG 1 TP28 Pin17,18 SG9 — 3 5 % 18 D/P DP 1 TP28 Pin17,18 SG9 — 3 5 deg 21 RF AGC High RFagcH 1 voltage 22 RF AGC Low voltage RFagcL 1 TP14 Pin17,18 SG10 4.4 4.7 5.0 V TP14 Pin17,18 SG11 0 0.3 0.6 V TP14 Pin17,18 SG12 82 85 88 dBµV 9 23 RF AGC delay point RFDP1 @TV mode 1 Rev.1.0, Sep.16.2003, page 9 of 18 — SW8=2 SW24=2 9 M61112FP VIF Section 2 Limits No Parameter Test Test Input Symbol Circuit Point Point Input SW Signal Condition Min Typ Max Unit Note# 24 AFT Sensitivity µ 1 TP13 Pin17,18 SG15 10 26 40 mV /kHz 10 25 AFT High voltage AFTH 1 TP13 Pin17,18 SG16 4.3 4.7 5 V 10 26 AFT Low voltage AFTL 1 TP13 Pin17,18 SG17 0 0.3 0.7 V 10 27 AFT Mute voltage AFTM 1 TP13 Pin17,18 SG18 2.4 2.5 2.6 V 28 AFT Center voltage @US mode 29 AFT Center voltage @JP mode VaftUS 1 TP13 Pin17,18 SG2 2.40 2.65 2.90 V VaftJP 1 TP13 Pin17,18 SG19 2.60 2.87 3.15 V SW5=2 SIF Section Test Test Symbol Circuit Point Input Point Input SW Signal Condition Min 30 AF output level @TV mode 31 AF output THD @TV mode 32 Audio S/N @TV mode VoAF1 No Parameter Limits Typ Max Unit 1 TP7 Pin3 SG20 SW21=2 400 700 1000 mVrms Note# THDAF1 1 TP7 Pin3 SG20 SW21=2 — 0.4 0.9 % AF S/N1 1 TP7 Pin3 SG21 SW21=2 50 55 — dB 11 33 Limiting sensitivity LIM 1 TP7 Pin3 SW21=2 — 50 55 dBµV 12 34 QIF Output 1 QIF1 1 TP5 94 100 106 dBµV 35 QIF Output 2 QIF2 1 TP5 SG22 SG23 Pin17,18 SG11 Pin15 SG13 Pin17,18 SG11 Pin15 SG14 94 100 106 dBµV VCO Section Test Test Symbol Circuit Point Input Input SW Point Signal Condition 36 VIF VCO freerun @US mode FvcofUS 1 TP13 — — 37 VIF VCO freerun @JP mode FvcofJP 1 TP13 — — No Parameter Rev.1.0, Sep.16.2003, page 10 of 18 Limits Min Typ Max Unit Note# SW8=2 –500 0 SW13&21=2 SW25=3 +500 kHz 13 SW5&8=2 –500 0 SW13&21=2 SW25=3 +500 kHz 13 M61112FP Test Circuit 50 50 0.01u SG1 SG2 0.01u 0.01u 0.22u 1 2 NC 21 20 SW15 19 18 17 16 15 VIF AMP QIF Det RF AGC 13 IF A GC DET 23 NC 14 22 0.1u SW13 0.1u 100K EQ AMP 50 0.01u AMP Coil-less VCO 33u SG3 Trap 26 SW11 SIF AMP LPF 15u Vcc 10 25 SW25 QIF AGC APC 12 1uH AFT 11 24 Video Det 27 LIM AMP 330 FM Det AF AMP NC 8 28 SIF Meter 240 9 4.7K 0.47u 1 2 0.1u 1000p 0.47u 200 3 4 SW3 1 5 0.01u 6 SW5 2 7.5K 0.01u 50 1K SG4 0.01u BPF 1K #This test circuit is based on Renesas Technology board for evaluation. Rev.1.0, Sep.16.2003, page 11 of 18 7 M61112FP Input Signal 50 Ω Termination SG 1 f0=45.75MHz Vi=90dBµV fm=20kHz 2 f0=45.75MHz Vi=90dBµV CW 3 f1=45.75MHz Vi=90dBµV CW f2=Freq. Variable Vi=70dBµV CW 4 f0=45.75MHz Vi=Variable fm=20kHz AM=77.8% 5 f0=45.75MHz Vi=Variable fm=20kHz AM=16.0% 6 f0=45.75MHz Vi=80dBµV CW 7 f0=Freq. Variable Vi=90dBµV fm=20kHz 8 f1=45.75MHz Vi=90dBµV CW f2=42.17MHz Vi=80dBµV CW f3=41.25MHz Vi=80dBµV CW f0=45.75MHz Sync Tip Level = 90dBµV 9 AM=77.8% } AM=77.8% } 87.5% TV modulation 10 step waveform 10 f0=45.75MHz Vi=70dBµV CW 11 f0=45.75MHz Vi=100dBµV CW 12 f0=45.75MHz Vi=Variable CW 13 f0=41.25MHz Vi=100dBµV CW 14 f0=41.25MHz Vi=70dBµV CW 15 f0=Freq. Variable Vi=90dBµV CW 16 f0=45.75-0.5MHz Vi=90dBµV CW 17 f0=45.75+0.5MHz Vi=90dBµV CW 18 f0=45.75+/-5MHz Vi=90dBµV CW 19 f0=58.75MHz Vi=90dBµV CW 20 f0=4.5MHz Vi=90dBµV fm=1kHz +/–25kHz dev 21 f0=4.5MHz Vi=90dBµV CW 22 f0=4.5MHz Vi=Variable fm=1kHz +/–25kHz dev 23 f0=4.5MHz Vi=Variable CW Rev.1.0, Sep.16.2003, page 12 of 18 Mixed signal Mixed signal M61112FP Mode Select Recommended Condition : Ta = 25°C, Vcc = 5.0V Recommendation Inter / Split select 15pin condition Split QIF IN QIF IN Inter within 0.5V GND TV / FM select 25pin condition Recommendation TV DC Open DC Open Search(#1) 2.2V to 2.8V 1/2 Vcc FM within 1.0V GND #1 : Search mode use for shipping test only. IF mute select 2pin condition Recommendation active DC open DC open mute within 0.5V GND US / JP select 5pin condition Recommendation US no resistance no resistance JP pull down 1.0kΩ +/–10% 1kΩ to GND Ref Signal select 11pin condition Recommendation 3.58M no resistance no resistance 4.00M pull down 4.7kΩ +/–10% 4.7kΩ to GND SIF mute select 8pin condition Recommendation active DC open DC open mute within 0.3V GND INTER Ref Signal IF Frequency US 3.58MHz 42.341MHz 4.00MHz 42.500MHz 3.58MHz 55.330MHz 4.00MHz 55.357MHz SPLIT Ref Signal IF Frequency US 3.58MHz 41.250MHz 4.00MHz 41.250MHz 3.58MHz 54.250MHz 4.00MHz 54.250MHz FM Mode IF Frequency (INTER) JP FM Mode IF Frequency (SPLIT) JP Rev.1.0, Sep.16.2003, page 13 of 18 M61112FP NOTE Note1 Video S/N : VoS/N Input SG2 to VIF IN (Pin17, 18) and measure the video out (TP24A) noise in r.m.s. through a 5MHz (–3dB) L.P.F. S/N = 20log ( 0.7 x Vodet (Vpp) ————————— NOISE (rms) ) (dB) Note2 Video Band Width : BW 1. Measure the 1MHz component level of Video output (TP24) with a spectrum analyzer when SG3 (f2 = 44.75MHz) is input to VIF IN (Pin17, 18). At that time, measure the voltage at TP21, and then fix TP21 at that voltage. 2. Reduce f2 and measure the value of (f1-f2) when the (f1-f2) component level reaches -3dB from the 1MHz component level as shown below. TP24 -3dB (f1-f2) 1MHz BW Note3 Input Sensitivity : VinMIN Input SG4 (Vi = 90dBµ) to VIF IN(Pin17, 18), and then gradually reduce Vi and measure the input level when the 20kHz component of Video output (TP24) reaches -3dB from Vo det level. Note4 Maximum Allowable Input : VinMAX 1. Input SG5 (Vi = 90dBµ) to VIF IN (Pin17, 18) , and measure the level of the 20kHz component of Video output (TP24). 2. Gradually increase the Vi of SG5 and measure the input level when the output reaches –3dB. Note5 AGC Control Range : GR GR = VinMAX - VinMIN (dB) Note6 Capture range : CR-U 1. Increase the frequency of SG7 until the VCO is out of locked-oscillation. 2. And decrease the frequency of SG7 and measure the frequency fU when the VCO is locked. CR-U = fU –45.75 (MHz) Note7 Capture range : CR-L 1. Decrease the frequency of SG7 until the VCO is out of locked-oscillation. 2. And increase the frequency of SG7 and measure the frequency fL when the VCO is locked. CR-L = 45.75 - fL Rev.1.0, Sep.16.2003, page 14 of 18 (MHz) M61112FP Note8 Inter modulation : IM 1. Input SG8 to VIF IN(Pin17,18), and measure video output (TP24) with an oscilloscope. 2. Adjust AGC filter voltage TP21 so that the minimum DC level of the output waveform is Vsync. 3. At that time, measure TP24 with a spectrum analyzer. The inter modulation is defined as a difference between 0.92MHz and 3.58 MHz frequency components. Note9 RF AGC Delay Point (TV Mode) : RFDP1 1. Input SG12 to VIF IN (Pin17, 18) and gradually reduce level and then measure the input level when RF AGC output (TP14) reaches 1/2Vcc, as shown below. 2. At that time, the state of Pin3 is DC open. TP14 Volt. RFagcH 1/2Vcc RFagcL RFDP1 SG12 Level (dBµV) Note10 AFT sensitivity: µ , Maximum AFT voltage:AFTH, Minimum AFT voltage:AFTL 1. Input SG15 to VIF IN (Pin17,18), and set the frequency of SG15 so that the voltage of AFT output (TP13) is 3 volt. This frequency is named f(3). 2. Set the frequency of SG15 so that the AFT output voltage is 2 volt. This frequency is named f(2). 3. IN the graph shown below, maximum and minimum DC voltage are AFTH and AFTL, respectively. 1000 (mV) µ = ——————————— f(2) - f(3) (kHz) (mV/kHz) TP13 Volt. AFTH 3V 2V AFTL f(3) f(2) f(MHz) Note11 Audio S/N(TV Mode) : AF S/N1 Input SG21 to SIF IN (Pin3), and measure the output noise level of Audio output (TP7) with FLAT-r.m.s. This level is named AFN1. AF S/N1 = 20log Rev.1.0, Sep.16.2003, page 15 of 18 ( VoAF1 (mVrms) —————————— AFN1 (mVrms) ) (dB) M61112FP Note12 Limiting Sensitivity : LIM 1. Input SG22 to LIM IN (Pin3), and measure the 1kHz component level of AF output (TP7) with FLAT-r.m.s. 2. Input SG23 to LIM IN (Pin3), and measure the noise level of AF output (TP7) with FLAT-r.m.s . 3. The input limiting sensitivity is defined as the input level when the difference between each 1kHz components of audio output (TP7) is 30dB, as shown below. TP7 (rms) TP7 while SG22 is input. 30dB TP7 while SG23 is input. (dBuV) LIM SIF IN Note13 VIF VCO Freerun frequency : FvcofUS / FvcofJP Input 3.579545MHz to Ref IN (Pin11), and set up SW as shown following. US Mode JP Mode SW No. Setting Condition Setting Condition 5 1 No-Connecting R 2 Connecting 1kΩ 8 2 GND 2 GND 11 1 No-Connecting R 1 No-Connecting R 13 2 No-Connecting C 2 No-Connecting C 21 2 GND 2 GND 25 3 Add to 2.5 Volt. 3 Add to 2.5 Volt. *VCO SW : US/JP 1. Measure the frequency of output signal at AFT out (TP13) each when be selected US or JP by SW5. 2. Measured frequency's are defined FaftUS (US Mode), FaftJP(JP Mode). The VCO freerun frequency is calculated by following. <Fref = 3.579545MHz> US Mode FvcofUS = 52.915(MHz) - 2×FaftUS(MHz) - 45.75(MHz) [MHz] JP Mode FvcofJP = 65.925(MHz) - 2×FaftJP(MHz) - 58.75(MHz) # [MHz] Case of Fref frequency is 4.00MHz, SW11 should be set up 2 (Pin11 is connected 4.7kΩ to GND). Others condition's are same as case of 3.58MHz mode,and the VCO freerun frequency is calculated by following. <Fref = 4.00MHz> US Mode FvcofUS = 52.952(MHz) - 9×FaftUS(MHz) - 45.75(MHz) [MHz] JP Mode FvcofJP = 65.951(MHz) - 9×FaftJP(MHz) - 58.75(MHz) Rev.1.0, Sep.16.2003, page 16 of 18 [MHz] M61112FP Application IF signal SAW VIF IN NC 21 20 19 18 17 16 15 QIF Det 26 12 SIF A MP LPF Trap Ref. signal 10 25 A MP Coil-less V CO Vcc 11 A PC EQ A MP A FT QIF AGC 0.1u 13 RF AGC V ideo Det 24 TV V IF A MP IF A G C DET 23 NC 14 22 FM 27 LIM A MP FM Det AF A MP NC 8 28 SIF Meter 9 4.7K 0.47u 1 2 3 4 5 6 7 0.1u mute BPF 1K active Recommendation * By pass capacitance for Logic Vcc (Pin12) should be mounted close hard by Logic GND (Pin10) * In order to mitigate the surroundings lump by the VIF input, the balanced connection from a SAW filter to the VIF input pin of 17,18 recommends a putter which serves as a 1t coil by Tip C or the jumper. Special components SAW : SAF45MA210Z TRP : TPSRA4M50B00 BPF : SFSH4.5MEB2 Rev.1.0, Sep.16.2003, page 17 of 18 M61112FP Package Dimensions 28PJW Note: Please contact Renesas Technology Corporation for further details. Rev.1.0, Sep.16.2003, page 18 of 18 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. 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