AUIRLS3114Z Product Datasheet

AUTOMOTIVE GRADE
AUIRLS3114Z
HEXFET® Power MOSFET
Features
l
l
l
l
l
l
l
l
l
Advanced Process Technology
Ultra Low On-Resistance
Logic Level Gate Drive
Enhanced dV/dT and dI/dT capability
175°C Operating Temperature
Fast Switching
Repetitive Avalanche Allowed up to Tjmax
Lead-Free, RoHS Compliant
Automotive Qualified *
VDSS
RDS(on) typ.
max.
ID (Silicon Limited)
D
G
ID (Wirebond
S
40V
3.8mΩ
4.9mΩ
122A
c
Limited)
56A
Description
Specifically designed for Automotive applications, this HEXFET®
Power MOSFET utilizes the latest processing techniques to achieve
extremely low on-resistance per silicon area. Additional features of
this design are a 175°C junction operating temperature, fast switching speed and improved repetitive avalanche rating . These features
combine to make this design an extremely efficient and reliable
device for use in Automotive applications and a wide variety of other
applications.
Base Part Number
Package Type
AUIRLS3114Z
D2-Pak
G
D2Pak
AUIRLS3114Z
G
D
S
Gate
Drain
Source
Standard Pack
Form
Tube
Tape and Reel Left
Tape and Reel Right
Absolute Maximum Ratings
S
D
Orderable Part Number
Quantity
50
800
800
AUIRLS3114Z
AUIRLS3114ZTRL
AUIRLS3114ZTRR
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only; and functional
operation of the device at these or any other condition beyond those indicated in the specifications is not implied. Exposure to absolute-maximum-rated
conditions for extended periods may affect device reliability. The thermal resistance and power dissipation ratings are measured under board mounted and
still air conditions. Ambient temperature (TA) is 25°C, unless otherwise specified.
Parameter
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
PD @TC = 25°C
VGS
EAS (Thermally Limited)
EAS (Tested)
IAR
EAR
dv/dt
TJ
TSTG
Max.
122
86
56
488
143
0.95
± 20
168
518
d
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
Peak Diode Recovery
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
e
d
f
d
Units
c
c
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Wirebond Limited)
A
W
W/°C
V
mJ
See Fig. 12a, 12b, 15, 16
2.3
-55 to + 175
A
mJ
V/ns
°C
300
Thermal Resistance
Parameter
RθJC
RθJA
j
Junction-to-Case
Junction-to-Ambient (PCB Mount)
i
Typ.
Max.
Units
–––
–––
1.05
40
°C/W
HEXFET® is a registered trademark of International Rectifier.
*Qualification standards can be found at http://www.irf.com/
1
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Static Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
ΔV(BR)DSS/ΔTJ
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
40
–––
–––
0.03
–––
–––
V
VGS = 0V, ID = 250μA
V/°C Reference to 25°C, ID = 1mA
RDS(on)
VGS(th)
ΔVGS(th)
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
1
3.8
1.7
4.9
2.5
mΩ
V
Gate Threshold Voltage Coefficient
Forward Transconductance
–––
103
-6.6
–––
–––
–––
Internal Gate Resistance
Drain-to-Source Leakage Current
–––
–––
0.8
–––
–––
20
Gate-to-Source Forward Leakage
–––
–––
–––
–––
250
100
Gate-to-Source Reverse Leakage
–––
–––
-100
gfs
RG
IDSS
IGSS
VGS = 10V, ID = 56A
VDS = VGS, ID = 100μA
mV/°C
S
VDS = 10V, ID = 56A
Ω
μA
nA
VDS = 40V, VGS = 0V
VDS = 40V, VGS = 0V, TJ = 125°C
VGS = 16V
VGS = -16V
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Qg
Qgs
Total Gate Charge
Gate-to-Source Charge
–––
–––
35
11
53
–––
Qgd
td(on)
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
–––
–––
16
28
–––
tr
Rise Time
–––
271
–––
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
43
60
–––
–––
Ciss
Coss
Input Capacitance
Output Capacitance
–––
–––
3617
633
–––
–––
Crss
Coss
Reverse Transfer Capacitance
Output Capacitance
–––
–––
345
2378
–––
–––
Coss
Coss eff.
Output Capacitance
–––
–––
570
875
–––
–––
Effective Output Capacitance
d
g
nC
ID = 56A
VDS =20V
VGS = 4.5V
VDD = 20V
ns
g
ID = 56A
RG = 3.7Ω
VGS = 4.5V
VGS = 0V
VDS = 25V
pF
Conditions
g
ƒ = 1.0 MHz, See Fig. 5
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 32V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 32V
h
Diode Characteristics
Parameter
IS
Continuous Source Current
ISM
(Body Diode)
Pulsed Source Current
VSD
trr
(Body Diode)
Diode Forward Voltage
Reverse Recovery Time
Qrr
ton
Reverse Recovery Charge
Forward Turn-On Time
d
Notes:
 Calculated continuous current based on maximum
allowable junction temperature. Bond wire current limit is
56A. Note that current limitations arising from heating of
the device leads may occur with some lead mounting
arrangements. (Refer to AN-1140)
‚ Repetitive rating; pulse width limited by max. junction
temperature.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.107mH,
RG = 50Ω, IAS = 56A, VGS =10V. Part not recommended
for use above this value.
2
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Min. Typ. Max. Units
c
–––
–––
–––
–––
488
–––
–––
–––
33
1.3
50
Conditions
MOSFET symbol
122
A
V
ns
showing the
integral reverse
D
G
p-n junction diode.
TJ = 25°C, IS = 56A, VGS = 0V
TJ = 25°C, IF = 56A, VDD = 20V,
di/dt = 100A/μs
S
g
g
–––
32
48
nC
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
„ ISD ≤ 56A, di/dt ≤ 263A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
… Pulse width ≤ 1.0ms; duty cycle ≤ 2%.
† Coss eff. is a fixed capacitance that gives the same charging
time as Coss while VDS is rising from 0 to 80% VDSS.
‡ When mounted on 1" square PCB (FR-4 or G-10 Material).
For recommended footprint and soldering techniques refer
to application note #AN-994.
ˆ Rθ is measured at TJ approximately 90°C
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AUIRLS3114Z
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.8V
2.5V
100
10
2.5V
1
≤60μs PULSE WIDTH
BOTTOM
2.5V
10
≤60μs PULSE WIDTH
Tj = 175°C
Tj = 25°C
0.1
1
0.1
1
10
100
1000
0.1
V DS, Drain-to-Source Voltage (V)
10
100
1000
Fig 2. Typical Output Characteristics
175
Gfs, Forward Transconductance (S)
1000
ID, Drain-to-Source Current (A)
1
V DS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
100
TJ = 175°C
10
T J = 25°C
1
VDS = 25V
≤60μs PULSE WIDTH
150
T J = 25°C
125
100
75
T J = 175°C
50
25
V DS = 10V
0
0.1
1
2
3
4
5
6
VGS, Gate-to-Source Voltage (V)
Fig 3. Typical Transfer Characteristics
3
VGS
15V
10V
8.0V
4.5V
3.5V
3.0V
2.8V
2.5V
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0
20
40
60
80
ID,Drain-to-Source Current (A)
Fig 4. Typical Forward Transconductance
vs. Drain Current
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AUIRLS3114Z
100000
14.0
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
ID= 56A
10000
Ciss
Coss
1000
12.0
VGS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
C oss = C ds + C gd
Crss
VDS= 32V
VDS= 20V
VDS= 8V
10.0
8.0
6.0
4.0
2.0
100
0.0
1
10
100
0
VDS, Drain-to-Source Voltage (V)
10
20
30
40
50
60
70
80
90
QG, Total Gate Charge (nC)
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
10000
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
T J = 175°C
100
TJ = 25°C
10
VGS = 0V
0.5
1.0
1.5
2.0
2.5
VSD, Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
100μsec
100
10msec 1msec
10
1
Tc = 25°C
Tj = 175°C
Single Pulse
DC
0.1
1.0
0.0
1000
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0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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AUIRLS3114Z
2.2
Wirebond Limitation
120
ID, Drain Current (A)
RDS(on) , Drain-to-Source On Resistance
(Normalized)
140
100
80
60
40
20
0
2.0
ID = 56A
VGS = 10V
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
25
50
75
100
125
150
175
-60 -40 -20 0 20 40 60 80 100120140160180
T C , Case Temperature (°C)
T J , Junction Temperature (°C)
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 10. Normalized On-Resistance
vs. Temperature
Thermal Response ( Z thJC ) °C/W
10
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
5
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AUIRLS3114Z
15V
D.U.T
RG
20V
VGS
DRIVER
L
VDS
EAS , Single Pulse Avalanche Energy (mJ)
700
+
V
- DD
IAS
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
ID
9.6A
20A
BOTTOM 56A
600
TOP
500
400
300
200
100
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
I AS
Fig 12b. Unclamped Inductive Waveforms
QG
2.6
10 V
QGD
VGS(th) , Gate threshold Voltage (V)
QGS
VG
Charge
Fig 13a. Basic Gate Charge Waveform
2.4
2.2
2.0
1.8
1.6
1.4
1.2
1.0
0.8
ID = 100μA
ID = 250μA
ID = 1.0mA
ID = 10mA
ID = 1.0A
0.6
0.4
-75 -50 -25
0
25 50 75 100 125 150 175
T J , Temperature ( °C )
L
DUT
0
VCC
Fig 14. Threshold Voltage vs. Temperature
1K
Fig 13b. Gate Charge Test Circuit
6
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AUIRLS3114Z
1000
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
Avalanche Current (A)
Duty Cycle = Single Pulse
100
0.01
0.05
0.10
10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
180
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 56A
EAR , Avalanche Energy (mJ)
160
140
120
100
80
60
40
20
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy
vs. Temperature
7
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Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of T jmax. This is validated for
every part type.
2. Safe operation in Avalanche is allowed as long asT jmax is
not exceeded.
3. Equation below based on circuit and waveforms shown in
Figures 12a, 12b.
4. PD (ave) = Average power dissipation per single
avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for
voltage increase during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed
Tjmax (assumed as 25°C in Figure 15, 16).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see figure 11)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
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AUIRLS3114Z
D.U.T
Driver Gate Drive
ƒ
+
‚
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
„
-
D=
Period
P.W.
+
VDD
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
-
Body Diode
VDD
Forward Drop
Inductor Curent
Ripple ≤ 5%
ISD
* VGS = 5V for Logic Level Devices
Fig 17. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
VDS
V GS
RG
RD
D.U.T.
+
-VDD
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 18a. Switching Time Test Circuit
VDS
90%
10%
VGS
td(on)
tr
t d(off)
tf
Fig 18b. Switching Time Waveforms
8
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AUIRLS3114Z
D2Pak Package Outline (Dimensions are shown in millimeters (inches))
D2Pak Part Marking Information
Part Number
AULS3114Z
YWWA
IR Logo
XX
or
Date Code
Y= Year
WW= Work Week
A= Automotive, Lead Free
XX
Lot Code
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
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AUIRLS3114Z
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
1.65 (.065)
1.60 (.063)
1.50 (.059)
11.60 (.457)
11.40 (.449)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
10.90 (.429)
10.70 (.421)
1.75 (.069)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
60.00 (2.362)
MIN.
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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AUIRLS3114Z
Qualification Information
†
Automotive
(per AEC-Q101)
Qualification Level
Moisture Sensitivity Level
††
Comments:
This
part
number(s) passed
Automotive qualification. IR’s Industrial and
Consumer qualification level is granted by
extension of the higher Automotive level.
MSL1
3L-D2 PAK
†††
Machine Model
Class M4(+/- 600V )
(per AEC-Q101-002)
†††
ESD
Human Body Model
Class H1C(+/- 2000V )
(per AEC-Q101-001)
†††
Charged Device Model
RoHS Compliant
†
Class C5(+/- 2000V )
(per AEC-Q101-005)
Yes
Qualification standards can be found at International Rectifier’s web site: http//www.irf.com/
†† Exceptions (if any) to AEC-Q101 requirements are noted in the qualification report.
††† Highest passing voltage
11
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IMPORTANT NOTICE
Unless specifically designated for the automotive market, International Rectifier Corporation and its subsidiaries
(IR) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its
products and services at any time and to discontinue any product or services without notice. Part numbers
designated with the “AU” prefix follow automotive industry and / or customer specific requirements with regards to
product discontinuance and process change notification. All products are sold subject to IR’s terms and conditions
of sale supplied at the time of order acknowledgment.
IR warrants performance of its hardware products to the specifications applicable at the time of sale in accordance
with IR’s standard warranty. Testing and other quality control techniques are used to the extent IR deems necessary
to support this warranty. Except where mandated by government requirements, testing of all parameters of each
product is not necessarily performed.
IR assumes no liability for applications assistance or customer product design. Customers are responsible for their
products and applications using IR components. To minimize the risks with customer products and applications,
customers should provide adequate design and operating safeguards.
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applications, IR will not be responsible for any failure to meet such requirements.
For technical support, please contact IR’s Technical Assistance Center
http://www.irf.com/technical-info/
WORLD HEADQUARTERS:
101 N. Sepulveda Blvd., El Segundo, California 90245
Tel: (310) 252-7105
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Revision History
Date
3/3/2014
13
Comments
• Added "Logic Level Gate Drive" bullet in the features section on page 1
• Updated data sheet with new IR corporate template
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