HAT3029R Silicon N/P Channel Power MOS FET Power Switching REJ03G1597-0600 Rev.6.00 Oct 16, 2007 Features • Capable of 4.5 V gate drive • Low drive current • High density mounting Outline RENESAS Package code: PRSP0008DD-D (Package name: SOP-8<FP-8DAV>) 6 87 7 8 D D 5 12 34 2 G 5 6 D D 1, 3 Source 2, 4 Gate 5, 6, 7, 8 Drain 4 G S1 Nch S3 Pch Absolute Maximum Ratings (Ta = 25°C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body-drain diode reverse drain current Channel dissipation Channel dissipation Channel temperature Storage temperature Symbol VDSS VGSS ID ID(pulse)Note1 IDR Pch Note2 Pch Note3 Tch Tstg Ratings Nch 30 ±20 6 48 Pch –30 -20/+10 –6 –48 6 –6 1.3 2.0 150 –55 to +150 Notes: 1. PW ≤ 10 µs, duty cycle ≤ 1 % 2. 1 Drive operation; When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10s 3. 2 Drive operation; When using the glass epoxy board (FR4 40 x 40 x 1.6 mm), PW ≤ 10s REJ03G1597-0600 Rev.6.00 Oct 16, 2007 Page 1 of 9 Unit V V A A A W W °C °C HAT3029R Electrical Characteristics (Ta = 25°C) • N Channel Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body–drain diode forward voltage Symbol V(BR)DSS IGSS IDSS VGS(off) RDS(on) RDS(on) |yfs| Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VDF trr Body–drain diode reverse recovery time Min 30 — — 1.0 — — 6 — — — — — — — — Typ — — — — 27 40 10 410 110 41 3.1 1.1 1.1 5.4 10 Max — ±0.1 1 2.5 34 58 — — — — — — — — — Unit V µA µA V mΩ mΩ S pF pF pF nC nC nC ns ns — — — — 36 3.0 0.84 20 — — 1.10 — ns ns V ns Test Conditions ID = 10 mA, VGS = 0 VGS = ±20 V, VDS = 0 VDS = 30 V, VGS = 0 VDS = 10 V, ID = 1 mA ID = 3 A, VGS = 10 V Note4 ID = 3 A, VGS = 4.5 V Note4 ID = 3 A, VDS = 10 V Note4 VDS = 10 V VGS = 0 f = 1 MHz VDD = 10 V VGS = 4.5 V ID = 6 A VGS = 10 V, ID = 3 A VDD ≅ 10 V RL = 3.33 Ω Rg = 4.7 Ω IF = 6 A, VGS = 0 Note4 IF = 6 A, VGS = 0 diF/ dt = 100 A/ µs Notes: 4. Pulse test • P Channel Item Drain to source breakdown voltage Gate to source leak current Zero gate voltage drain current Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Total gate charge Gate to source charge Gate to drain charge Turn-on delay time Rise time Turn-off delay time Fall time Body–drain diode forward voltage Body–drain diode reverse recovery time Symbol Min –30 Typ — Max — Unit V Test Conditions ID = –10 mA, VGS = 0 RDS(on) |yfs| Ciss Coss Crss Qg Qgs Qgd td(on) tr td(off) tf VDF — — –1.0 — — 6 — — — — — — — — — — — — — — 25 36 10 1330 215 155 11.5 3.2 4.4 18 19 47 8 –0.84 ±0.1 –1 –2.5 32 53 — — — — — — — — — — — –1.10 µA µA V mΩ mΩ S pF pF pF nC nC nC ns ns ns ns V VGS = -20,+10 V, VDS = 0 VDS = –30 V, VGS = 0 VDS = –10 V, ID = –1 mA ID = –3 A, VGS = –10 V Note4 ID = –3 A, VGS = – 4.5 V Note4 ID = –3 A, VDS = –10 V Note4 trr — 20 — ns V(BR)DSS IGSS IDSS VGS(off) RDS(on) Notes: 4. Pulse test REJ03G1597-0600 Rev.6.00 Oct 16, 2007 Page 2 of 9 VDS = –10 V VGS = 0 f = 1MHz VDD = –10 V VGS = –4.5 V ID = -6 A VGS = –10 V, ID = –3 A VDD ≅ –10 V RL = 3.33 Ω Rg = 4.7 Ω IF = –6 A, VGS = 0 Note4 IF = –6 A, VGS = 0 diF/ dt =100A/µs HAT3029R Main Characteristics • N Channel Power vs. Temperature Derating Maximum Safe Operation Area 100 Test Condition : When using the glass epoxy board (FR4 40x40x1.6 mm), PW ≤ 10 s 1.2 0.8 0.4 Drain Current ID (A) Channel Dissipation Pch (W) 1.6 PW DC 1 1m =1 s 0m s( Op 1s era tio n( PW 0.1 Operation in ≤1 this area is limited by RDS(on) ho t) No 0 ste 5 ) 0.01 Ta = 25°C 0 50 100 150 0.001 1 shot Pulse 0.1 1 200 3.4 V Typical Transfer Characteristics 10 Pulse Test 3.2 V 4.5 V 3V 6 4 2.8 V 2 VGS = 2.6 V Drain Current ID (A) 8 10 V 100 Note 5 : When using the glass epoxy board (FR4 40x40x1.6 mm) Typical Output Characteristics 10 10 Drain to Source Voltage VDS (V) Ambient Temperature Ta (°C) Drain Current ID (A) 10 µs 0µ s 10 10 Tc = 75°C VDS = 10 V Pulse Test 8 6 4 2 25°C –25°C 2 4 6 8 0 10 2 4 6 8 10 Drain to Source Voltage VDS (V) Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage Static Drain to Source on State Resistance vs. Drain Current 250 Pulse Test 200 150 ID = 5 A 100 2A 50 1A 0 4 8 12 16 20 Gate to Source Voltage VGS (V) REJ03G1597-0600 Rev.6.00 Oct 16, 2007 Page 3 of 9 Drain to Source On State Resistance RDS(on) (mΩ) Drain to Source Voltage VDS(on) (mV) 0 1000 Pulse Test 500 200 VGS = 4.5 V 100 50 10 V 20 10 1 10 100 Drain Current ID (A) 1000 Forward Transfer Admittance vs. Drain Current Forward Transfer Admittance |yfs| (S) Static Drain to Source on State Resistance vs. Temperature 100 Pulse Test 80 ID = 2 A, 5 A, 10 A 60 4.5 V 40 2 A, 5 A, 10 A 20 VGS = 10 V 0 -25 0 25 50 75 100 125 150 Tc = –25°C 10 25°C 75°C 1 VDS = 10 V Pulse Test 0.1 0.3 1 3 10 30 Body–Drain Diode Reverse Recovery Time Typical Capacitance vs. Drain to Source Voltage 100 10000 Capacitance C (pF) di/dt = 100 A/µs VGS = 0, Ta = 25°C 50 20 VGS = 0 f = 1 MHz 3000 1000 Ciss 300 Coss 100 Crss 30 10 10 0.1 50 1 10 100 10 15 20 25 30 Drain to Source Voltage VDS (V) Dynamic Input Characteristics Switching Characteristics 20 ID = 6 A VGS VDD = 25 V 10 V 5V VDS 16 12 20 8 VDD = 25 V 10 V 5V 10 0 5 Reverse Drain Current IDR (A) 40 30 0 2 4 6 8 Gate Charge Qg (nc) REJ03G1597-0600 Rev.6.00 Oct 16, 2007 Page 4 of 9 4 0 10 1000 Gate to Source Voltage VGS (V) Reverse Recovery Time trr (ns) 100 Drain Current ID (A) 100 Drain to Source Voltage VDS (V) 1000 Case Temperature Tc (°C) VGS = 10 V, VDS = 10 V Rg = 4.7 Ω, duty ≤ 1 % Switching Time t (ns) Static Drain to Source on State Resistance RDS(on) (mΩ) HAT3029R 100 td(off) 10 td(on) tf tr 1 0.1 1 10 Drain Current ID (A) 100 HAT3029R Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current IDR (A) 20 16 10 V 12 8 5V VGS = 0 V 4 Pulse Test 0.4 0 0.8 1.2 1.6 2.0 Source to Drain Voltage VSD (V) Normalized Transient Thermal Impedance γs (t) Normalized Transient Thermal Impedance vs. Pulse Width 10 1 0.1 D=1 0.5 0.2 0.1 0.05 θch - f(t) = γs (t) x θch - f θch - f = 143°C/W, Ta = 25°C When using the glass epoxy board (FR4 40x40x1.6 mm) 0.02 0.01 0.01 lse t pu o 1sh PDM D= 0.001 PW T PW T 0.0001 10 µ 100 µ 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) Switching Time Test Circuit 90% Vout Monitor Vin Monitor Rg Switching Time Waveform D.U.T. RL Vin Vout Vin 10 V VDS = 10 V 10% 90% td(on) REJ03G1597-0600 Rev.6.00 Oct 16, 2007 Page 5 of 9 10% tr 10% 90% td(off) tf HAT3029R • P Channel Power vs. Temperature Derating Maximum Safe Operation Area 1.2 -100 ID (A) Test Condition : When using the glass epoxy board (FR4 40x40x1.6 mm), PW ≤ 10 s 0.8 0.4 PW DC 0m s( 1s Op era tio Operation in n( PW -0.1 this area is ≤1 ho t) No 0 ste 5 ) limited by RDS(on) -0.01 50 100 150 200 -0.001 1 shot Pulse -0.1 -1 Typical Transfer Characteristics -20 -10 V VDS = -10 V Pulse Test Pulse Test -3.2 V -3.5 V -12 -3 V -8 -2.8 V -2.5 V -4 Drain Current ID (A) -4 V -16 -16 -12 -8 −25°C Tc = 75°C -4 VGS = -2 V 0 -2 -4 -6 -8 25°C -10 0 Drain to Source Voltage VDS (V) -6 A -120 -80 -3 A -40 ID = -1 A Pulse Test -4 -8 -12 -16 -20 Gate to Source Voltage VGS (V) REJ03G1597-0600 Rev.6.00 Oct 16, 2007 Page 6 of 9 -2 -3 -4 -5 Static Drain to Source on State Resistance vs. Drain Current Drain to Source On State Resistance RDS(on) (mΩ) -160 -1 Gate to Source Voltage VGS (V) Drain to Source Saturation Voltage vs. Gate to Source Voltage 0 -100 Note 5 : When using the glass epoxy board (FR4 40x40x1.6 mm) Typical Output Characteristics -20 -10 Drain to Source Voltage VDS (V) Ambient Temperature Ta (°C) Drain Current ID (A) =1 Ta = 25°C 0 Drain to Source Saturation Voltage VDS(on) (mV) 10 µs 0µ 1m s s 10 -10 -1 Drain Current Channel Dissipation Pch (W) 1.6 1000 Pulse Test 500 200 -4.5 V 100 50 VGS = -10 V 20 10 -0.1 -0.3 -1 -3 -10 -30 Drain Current ID (A) -100 Forward Transfer Admittance |yfs| (S) 100 Pulse Test 80 -6 A 60 -4.5 V 40 -1, -3 A 20 ID = -1, -3, -6 A VGS = -10 V 0 −25 0 25 50 75 100 125 150 100 Tc = –25°C 10 1 0.3 VDS = -10 V Pulse Test 0.1 -0.1 -0.3 -1 -10 -3 -30 Case Temperature Tc (°C) Drain Current ID (A) Body–Drain Diode Reverse Recovery Time Typical Capacitance vs. Drain to Source Voltage 3000 Capacitance C (pF) 500 200 100 50 20 10 5 di/dt = -100 A/µs VGS = 0, Ta = 25°C 2 -100 VGS = 0 f = 1 MHz Ciss 1000 300 Coss 100 Crss 30 10 3 1 -0.3 -1 -3 -10 -30 0 -100 -10 -20 -30 Reverse Drain Current IDR (A) Drain to Source Voltage VDS (V) Dynamic Input Characteristics Switching Characteristics 0 VDD = -5 V -10 V -25 V -10 -4 VDD = -5 V -10 V -25 V -20 -8 VDS VGS -30 -12 ID = -6 A 8 -16 16 24 32 Gate Charge Qg (nc) REJ03G1597-0600 Rev.6.00 Oct 16, 2007 Page 7 of 9 40 1000 Switching Time t (ns) 0 0 75°C 3 10000 -40 25°C 30 1000 1 -0.1 Drain to Source Voltage VDS (V) Forward Transfer Admittance vs. Drain Current Static Drain to Source on State Resistance vs. Temperature Gate to Source Voltage VGS (V) Reverse Recovery Time trr (ns) Static Drain to Source on State Resistance RDS(on) (mΩ) HAT3029R VGS = -10 V, VDD = -10 V PW = 5 µs, Rg = 4.7 Ω 100 td(off) tr td(on) 10 tf 1 -0.1 -0.3 -1 -3 -10 -30 Drain Current ID (A) -100 HAT3029R Reverse Drain Current vs. Source to Drain Voltage Reverse Drain Current IDR (A) -20 -16 -10 V -12 -8 -5 V VGS = 0 V -4 Pulse Test 0 -0.4 -0.8 -1.2 -1.6 -2.0 Source to Drain Voltage VSD (V) Normalized Transient Thermal Impedance γs (t) Normalized Transient Thermal Impedance vs. Pulse Width 10 D=1 0.5 1 0.2 0.1 0.05 0.1 θch - f(t) = γs (t) x θch - f θch - f = 143°C/W, Ta = 25°C When using the glass epoxy board (FR4 40x40x1.6 mm) 0.02 0.01 0.01 t sho lse pu PDM 1 0.001 D= PW T PW T 0.0001 10 µ 100 µ 1m 10 m 100 m 1 10 100 1000 10000 Pulse Width PW (S) Switching Time Test Circuit Vout Monitor Vin Monitor Rg Vin -10 V Switching Time Waveform Vin 10% D.U.T. RL 90% Vout td(on) REJ03G1597-0600 Rev.6.00 Oct 16, 2007 Page 8 of 9 90% 90% VDD = -10 V 10% tr 10% td(off) tf HAT3029R Package Dimensions JEITA Package Code P-SOP8-3.95 × 4.9-1.27 RENESAS Code PRSP0008DD-D Previous Code FP-8DAV MASS[Typ.] 0.085g F Package Name SOP-8 *1 D bp 1 c *2 E Index mark HE 5 8 4 Z Terminal cross section (Ni/Pd/Au plating) * 3 bp x M e NOTE) 1. DIMENSIONS "*1(Nom)" AND "*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. Reference Dimension in Millimeters Symbol Min A1 A L1 L y Detail F D E A2 A1 A bp b1 c c1 HE e x y Z L L1 Nom Max 4.90 5.3 3.95 0.10 0.14 0.25 1.75 0.34 0.40 0.46 0.15 0.20 0.25 0° 8° 5.80 6.10 6.20 1.27 0.25 0.1 0.75 0.40 0.60 1.27 1.08 Ordering Information Part Name HAT3029R-EL-E Note: Quantity 2500 pcs Shipping Container Taping For some grades, production may be terminated. Please contact the Renesas sales office to check the state of production before ordering the product. REJ03G1597-0600 Rev.6.00 Oct 16, 2007 Page 9 of 9 Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan Notes: 1. This document is provided for reference purposes only so that Renesas customers may select the appropriate Renesas products for their use. Renesas neither makes warranties or representations with respect to the accuracy or completeness of the information contained in this document nor grants any license to any intellectual property rights or any other rights of Renesas or any third party with respect to the information in this document. 2. Renesas shall have no liability for damages or infringement of any intellectual property or other rights arising out of the use of any information in this document, including, but not limited to, product data, diagrams, charts, programs, algorithms, and application circuit examples. 3. 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