BF992 Silicon N-channel dual gate MOS-FET Rev. 04 — 21 November 2007 Product data sheet IMPORTANT NOTICE Dear customer, As from October 1st, 2006 Philips Semiconductors has a new trade name - NXP Semiconductors, which will be used in future data sheets together with new contact details. In data sheets where the previous Philips references remain, please use the new links as shown below. http://www.philips.semiconductors.com use http://www.nxp.com http://www.semiconductors.philips.com use http://www.nxp.com (Internet) [email protected] use [email protected] (email) The copyright notice at the bottom of each page (or elsewhere in the document, depending on the version) - © Koninklijke Philips Electronics N.V. (year). All rights reserved is replaced with: - © NXP B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or phone (details via [email protected]). Thank you for your cooperation and understanding, NXP Semiconductors NXP Semiconductors Product specification Silicon N-channel dual gate MOS-FET APPLICATIONS BF992 PINNING • VHF applications such as VHF television tuners and FM tuners with 12 V supply voltage. The device is also suitable for use in professional communications equipment. DESCRIPTION Depletion type field-effect transistor in a plastic micro-miniature SOT143B package with source and substrate interconnected. PIN SYMBOL DESCRIPTION 1 s, b 2 d drain 3 g2 gate 2 4 g1 gate 1 source d handbook, halfpage 4 3 The transistor is protected against excessive input voltage surges by integrated back-to-back diodes between gates and source. g2 g1 CAUTION 1 The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. 2 s,b Top view MAM039 Marking code: %MB. Fig.1 Simplified outline (SOT143B) and symbol. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS TYP. MAX. UNIT VDS drain-source voltage (DC) − 20 V ID drain current (DC) − 40 mA Ptot total power dissipation Tamb = 60 °C − 200 mW Yfs forward transfer admittance f = 1 kHz; ID = 15 mA; VDS = 10 V; VG2-S = 4 V 25 − mS Cig1-s input capacitance at gate 1 f = 1 MHz; ID = 15 mA; VDS = 10 V; VG2-S = 4 V 4 − pF Crs reverse transfer capacitance f = 1 MHz; ID = 15 mA; VDS = 10 V; VG2-S = 4 V 30 − fF F noise figure GS = 2 mS; ID = 15 mA; VDS = 10 V; VG2-S = 4 V; f = 200 MHz 1.2 − dB Tj operating junction temperature − 150 °C Rev. 04 - 21 November 2007 2 of 9 NXP Semiconductors Product specification Silicon N-channel dual gate MOS-FET BF992 LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VDS drain-source voltage − 20 V ID drain current − 40 mA IG1 gate 1 current − ±10 mA IG2 gate 2 current − ±10 mA Ptot total power dissipation − 200 mW Tstg storage temperature −65 +150 °C Tj operating junction temperature − 150 °C Tamb ≤ 60 °C; see Fig.2; note 1 Note 1. Device mounted on a ceramic substrate, 8 mm × 10 mm × 0.7 mm. MBL033 handbook, halfpage 200 Ptot max (mW) 100 0 0 100 Tamb (o C) 200 Fig.2 Power derating curves. Rev. 04 - 21 November 2007 3 of 9 NXP Semiconductors Product specification Silicon N-channel dual gate MOS-FET BF992 THERMAL CHARACTERISTICS SYMBOL Rth j-a PARAMETER CONDITIONS thermal resistance from junction to ambient in free air VALUE UNIT 460 K/W note 1 Note 1. Device mounted on a ceramic substrate, 8 mm × 10 mm × 0.7 mm. STATIC CHARACTERISTICS Tj = 25 °C unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT ±V(BR)G1-SS gate 1-source breakdown voltage VG2-S = VDS = 0; IG1-SS = ±10 mA 8 20 V ±V(BR)G2-SS gate 2-source breakdown voltage VG1-S = VDS = 0; IG2-SS = ±10 mA 8 20 V −V(P)G1-S gate 1-source cut-off voltage VG2-S = 4 V; VDS = 10 V; ID = 20 µA 0.2 1.3 V −V(P)G2-S gate 2-source cut-off voltage VG1-S = 0; VDS = 10 V; ID = 20 µA 0.2 1.1 V ±IG1-SS gate 1 cut-off current VG2-S = VDS = 0; VG1-S = ±7 V − 25 nA ±IG2-SS gate 2 cut-off current VG1-S = VDS = 0; VG2-S = ±7 V − 25 nA DYNAMIC CHARACTERISTICS Common source; Tamb = 25 °C; VDS = 10 V; VG2-S = 4 V; ID = 15 mA; unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT yfs forward transfer admittance 20 25 − mS Cig1-s input capacitance at gate 1 f = 1 MHz − 4 − pF Cig2-s input capacitance at gate 2 f = 1 MHz − 1.7 − pF Cos output capacitance f = 1 MHz − 2 − pF Crs reverse transfer capacitance f = 1 MHz − 30 40 fF F noise figure f = 200 MHz; GS = 2 mS − 1.2 − dB Rev. 04 - 21 November 2007 4 of 9 NXP Semiconductors Product specification Silicon N-channel dual gate MOS-FET MGE797 24 BF992 MGE799 30 handbook, halfpage I handbook, halfpage D (mA) 20 ID (mA) VG1-S = 0.2 V 0.1 V 16 4V3V VG2-S = 5 V 20 0V 12 2V 1V −0.1 V −0.2 V 8 10 −0.3 V 0V −0.4 V −0.5 V 4 −0.6 V 0 −1 0 0 2 4 6 8 10 VDS (V) 12 VG2-S = 4 V; Tj = 25 °C. 0 VG1-S (V) 1 VDS = 10 V; Tj = 25 °C. Fig.3 Output characteristics; typical values. MGE798 30 Fig.4 Transfer characteristics; typical values. MGE800 30 handbook, halfpage handbook, halfpage 5V 4V 3V |yfs| (mS) Yfs (mS) VG2-S = 5V 4V 2V 20 20 3V 10 10 2V 1V VG2-S = 0 V 1V 0 0 10 ID (mA) VDS = 10 V; Tj = 25 °C. Fig.5 0 −1 20 0V 0 VG1-S (V) 1 VDS = 10 V; Tj = 25 °C. Forward transfer admittance as a function of drain current; typical values. Fig.6 Rev. 04 - 21 November 2007 Forward transfer admittance as a function of gate 1-source voltage; typical values. 5 of 9 NXP Semiconductors Product specification Silicon N-channel dual gate MOS-FET BF992 MGE794 102 handbook, halfpage MGE793 10 handbook, halfpage yis (mS) yos (mS) bos 10 bis 1 1 gis gos 10−1 10−1 10−2 10 102 f (MHz) 103 10−2 10 102 VDS = 10 V; VG2-S = 4 V; ID = 15 mA; Tamb = 25 °C. VDS = 10 V; VG2-S = 4 V; ID = 15 mA; Tamb = 25 °C. Fig.7 Fig.8 Input admittance as a function of frequency; typical values. MGE795 25 handbook, halfpage Output admittance as a function of frequency; typical values. MGE796 120 handbook, halfpage gfs Yfs (mS) 20 103 f (MHz) yrs (µS) 80 15 −brs 10 −bfs 40 5 grs 0 10 102 f (MHz) 103 0 10 102 103 f (MHz) VDS = 10 V; VG2-S = 4 V; ID = 15 mA; Tamb = 25 °C. VDS = 10 V; VG2-S = 4 V; ID = 15 mA; Tamb = 25 °C. Fig.9 Fig.10 Reverse transfer admittance as a function of frequency; typical values. Forward transfer admittance as a function of frequency; typical values. Rev. 04 - 21 November 2007 6 of 9 NXP Semiconductors Product specification Silicon N-channel dual gate MOS-FET BF992 PACKAGE OUTLINE Plastic surface mounted package; 4 leads SOT143B D B E A X y HE v M A e bp w M B 4 3 Q A A1 c 1 2 Lp b1 e1 detail X 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 max bp b1 c D E e e1 HE Lp Q v w y mm 1.1 0.9 0.1 0.48 0.38 0.88 0.78 0.15 0.09 3.0 2.8 1.4 1.2 1.9 1.7 2.5 2.1 0.45 0.15 0.55 0.45 0.2 0.1 0.1 OUTLINE VERSION REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 97-02-28 SOT143B Rev. 04 - 21 November 2007 7 of 9 BF992 NXP Semiconductors Silicon N-channel dual gate MOS-FET Legal information Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. 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Contact information For additional information, please visit: http://www.nxp.com For sales office addresses, send an email to: [email protected] Rev. 04 - 21 November 2007 8 of 9 BF992 NXP Semiconductors Silicon N-channel dual gate MOS-FET Revision history Revision history Document ID Release date Data sheet status Change notice Supersedes BF992_N_4 20071121 Product data sheet - BF992_3 • Modifications: Fig. 1 on page 2; Figure note changed BF992_3 (9397 750 06013) 19990811 Product specification - BF992_2 BF992_2 19960730 Product specification - BF992_SF_1 BF992_SF_1 - - - - Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2007. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: [email protected] Date of release: 21 November 2007 Document identifier: BF992_N_4