NJW4305A 3 PHASE BRUSHLESS DC MOTOR CONTROLL IC ■ GENERAL DESCRIPTION The NJW4305A is a 3 phase brush less DC motor controller IC. It uses hall element signal inputs and generates motor driving waveform. Output pre-driver is optimized to work with external Power MOS transistor for better power handling. Using the NJW4305A, 3-phase DC motor application with speed control feature can be easily achieved ■ PACKAGE OUTLINE NJW4305AVC3 (SSOP20-C3) ■ FEATURES ● Maximum Supply Voltage : 40V ● Operating Voltage Range : 7.3V to 36V ● Operating Ambient Temperature : - 40ºC to + 105ºC ● Quiescent Current : 3.2mA ( typ. ) at VCC=24V ● FG Output ● Lock Protection Function (Auto Release) ● Forward / Reverse Function ● Over Current Detection Function ● Thermal Shutdown Function ● UVLO Protection Circuit ● Direct PWM Control : up to 150kHz ● Bi-CDMOS Technology ● Package Outline : SSOP20-C3 Ver.2014-03-06 -1- NJW4305A ■ BLOCK DIAGRAM FG VCC VREF UVLO UH TSD VH H1+ H1- + - Rotor Position Decode H2+ H2- + - WH H3+ H3- + UL 18kHz Fix. FR Dead Time VL FR Local Oscillator ILIMIT OSC VERR GND Saw Oscillator WL PWM Logic + Lock Detect + - ILIMIT Ct -2- Ver.2014-03-06 NJW4305A ■ PIN CONFIGURATION 1. H1+ 20. VCC 2. H1- 19. UH 3. H2+ 18. VH NJW4305A 4. H25. H3+ 6. H37. FR 17. WH 16. UL 15. VL 14. WL 8. VERR 13. ILIMIT 9. OSC 12. FG 10. Ct 11. GND ■ PIN DESCRIPTION PIN SYMBOL 1 H1 + 2 H1 3 H2 + 4 H2 5 H3 + 6 H3 - DESCRIPTION Hall Element Input Pin H1 + Hall Element Input Pin H1 Hall Element Input Pin H2 + Hall Element Input Pin H2 Hall Element Input Pin H3 + Hall Element Input Pin H3 - 7 FR Forward Reverse Select Signal Input 8 VERR Error Amp Voltage Input 9 10 11 OSC Ct GND Connect Capacitor of PWM Control Connect Capacitor of Lock Protect Ground 12 FG 13 ILIMIT FG Output Over Current Detect NOTE U Phase Hall Signal Input + U Phase Hall Signal Input V Phase Hall Signal Input + V Phase Hall Signal Input W Phase Hall Signal Input + W Phase Hall Signal Input Low or Open = Forward Direction, H = Reverse Direction Set of PWM Duty. Not use = Pull up Set of PWM Frequency Set of ON Time for Lock Protection Connecting with Ground Rotation speed output Pin Use = Pull up L = Operating, H = Stop Nonuse = Pull down W Phase Output for Low Arm V Phase Output for Low Arm U Phase Output for Low Arm W Phase Output for Upper Arm V Phase Output for Upper Arm U Phase Output for Upper Arm Input DC Power 14 WL WL Output Pin 15 VL VL Output Pin 16 UL UL Output Pin 17 WH WH Output Pin 18 VH VH Output Pin 19 UH UH Output Pin 20 VCC Power Supply * All Ground Pins must be connected at the outside. * Electrical potential of all unused output pins must be fixed at the outside. Ver.2014-03-06 -3- NJW4305A ■ ABSOLUTE MAXIMUM RATINGS (Ta=25C) PARAMETER SYMBOL RATINGS UNIT NOTES Supply Voltage Hi Side Output Pin Voltage FG Pin Voltage VCC VOH VFG 40 40 7 V V V Hall Input Pin Voltage VIH 7 V VIN VLIM VVERR IOH IOL IFG 7 3.5 7 150 +100 / -150 15 V V V mA mA mA Power Dissipation PD 1000 mW VCC Pin UH, VH, WH Pin FG Pin H1+, H1-, H2+, H2-, H3+, H3Pin FR Pin ILIMIT Pin VERR Pin UH, VH, WH Pin UL, VL, WL Pin FG Pin Mounted on designated board based on EIA/JEDEC. 76.2*114.3*1.6mm 2Layer, FR-4 Operating Ambient Temperature Storage Temperature Topr Tstg - 40 to + 105 - 50 to + 150 °C °C Logic Input Pin Voltage ILIMIT Pin Voltage VERR Pin Voltage Hi Side Output Current Low Side Output Current FG Output Current ■ RECOMMENDED OPERATIONAL CONDITIONS PARAMETER Supply Voltage SYMBOL VCC TEST CONDITION TYP. 24.0 (Ta=25C) MAX. UNIT 36.0 V MIN. TYP. (Ta=25C) MAX. UNIT 0.08 0 - 3.5 V V 2 0 - 5.5 0.8 V V 0 - - 5.5 150 V kHz MIN. 7.3 ■ PIN OPERATING CONDITION PARAMETER SYMBOL TEST CONDITION ► Hall Input Pin ( H1+, H1-, H2+, H2-, H3+, H3- ) Hall Input Sensitivity ΔVMIH Peak to peak Hall Input Voltage Range VICMIH ► Logic Input Pin ( FR ) H Level Input Voltage VHIN L Level Input Voltage VLIN ► VERR Pin Input Voltage Range VICMVERR PWM Input Frequency fIPWMVERR -4- Ver.2014-03-06 NJW4305A ■ ELECTRICAL CHARACTERISTICS ( Ta = 25°C, VCC=24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=0V, VERR=5V, OSC=1V, Ct=ILIMIT= 0V ) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT ► GENERAL Quiescent Current 1 ICC1 VCC = 12V 2.4 2.9 3.8 mA Quiescent Current 2 ICC2 VCC = 24V 2.7 3.2 4.1 mA ► THERMAL SHUTDOWN BLOCK (TSD) TSD Operating Temperature TTSD1 180 °C TSD Recovery Temperature TTSD2 130 °C TSD Hysteresis Temperature ΔTTSD 50 °C ► UNDER VOLTAGE LOCK OUT BLOCK UVLO Detect Voltage VDUVLO VCC Decreasing 6.0 6.45 7.19 V UVLO Recovery Voltage VRUVLO VCC Increasing 6.01 6.6 7.2 V UVLO Hysteresis Voltage Range ΔVUVLO 0.15 V ► LOCK DETECT BLOCK ( Ct Pin ) Lock Protection ON time tON Ct = 0.47µF 0.18 0.25 0.34 s High Level Voltage VHCt 3.2 3.4 3.6 V Low Level Voltage VLCt 0.8 1.0 1.2 V Lock Charge Current ICHGCt Ct = 0V → 2.5V 5.0 6.5 8.5 µA Lock Discharge Current IDCHGCt1 0.3 0.65 0.9 µA Lock Charge Discharge ICHGCt / IDCHGCt 10 Current Ratio ► HALL AMP BLOCK ( H1+, H1-, H2+, H2-, H3+, H3- Pin ) Hysteresis Voltage Range ΔVHYSH 10 30 50 mV Input Bias Current IBIH at 1 input 2 µA ► HIGH SIDE BLOCK ( UH, VH, WH Pin ) High Side Output Voltage VOLH ISINK = 50mA 0.5 1.2 V High Side Leak Current IOLEAKH VOH = 36V 1 µA ► LOW SIDE BLOCK ( UL, VL, WL Pin ) Low Side Output Voltage1 VOHL1 VCC = 12V, ISOURCE = 50mA 8.0 10.0 V Low Side Output Voltage2 VOHL2 VCC = 24V, ISOURCE = 50mA 8.0 10.0 V Low Side Output L Voltage VOLL ISINK = 50mA 0.5 1.2 V Low Side Clamp Voltage VOCLL VCC = 36V, ISOURCE = 0.1mA 16.0 V ► FG OUTPUT BLOCK ( FG Pin ) Output Voltage VOFG IFG = 10mA 0.2 0.6 V Leak Current ILEAKFG VFG = 5V 1 µA ► OVER CURRENT DETECT BLOCK ( ILIMIT Pin ) Detect Voltage VDETLIM 0.25 0.28 0.31 V Input Bias Current IBLIM 1.0 2.0 µA ► ERROR AMP BLOCK ( VERR Pin ) PWM0% Detect Voltage VPWM1VERR Output ON Duty = 0% 0.6 V PWM100% Detect Voltage VPWM2VERR Output ON Duty = 100% 3.5 V Input Bias Current IBVERR 1.0 2.0 µA ► OSCILLATOR BLOCK ( OSC Pin ) Saw Wave Peak Voltage VPOSC 2.7 3.0 3.3 V Saw Wave Bottom Voltage VBOSC 0.8 1.0 1.2 V OSC Charge Current ICHGOSC OSC = 0V → 2.5V 50 80 120 µA OSC Discharge Current IDCHGOSC OSC = 5V → 2.5V 0.6 1.3 2.0 mA Oscillation Frequency fOSC COSC = 1000pF 35 50 kHz ► CONTROL INPUT BLOCK H Level Input Current IHIN VIN = 5V 30 50 100 µA L Level Input Current ILIN VIN = 0V 1 µA Pull Down Resistance RIN 100 kΩ Ver.2014-03-06 -5- NJW4305A ■ OPERATIONAL DEFINITION ( TERMINAL and CIRCUIT ) ► Hole input Pin Common mode input voltage range VICMH ► Hall input hysteresis voltage width VICMH Logic Inversion 3.5V Logic Inversion 3.5V ΔVHY SIH 0V 0V ► Input Pin ► Oscillation frequency VIN 5.5V VOSC High Level Voltage VPOSC 2.0V Undefined 0.8V Low Level Voltage VBOSC t CHGOSC Time : t t DCH GOSC 0V fosc = 1 / ( tCHGOSC + tDCHGOSC ) -6- Ver.2014-03-06 NJW4305A ► PWM 0% / PWM 100% detect voltage VVERR Full Speed ( = Output ON Duty 100% ) VPWM2VERR VPOSC VVERR VOSC Variable Speed Control VBOSC VPWM1VERR Stop ( = Output ON Duty 0% ) ► Over current detect voltage LOCAL_OSC(fOSCLO)=18kHz typ. Fix. VDETLIM VILIMIT Time : t VOL (V UL, V VL, V WL) Active L Active Time : t Motor Operation Rotate STOP Rotate Time : t ► Thermal shutdown (TSD) operational temperature TSD Reset Temperature ( Normal Operating ) -40ºC 105ºC Hysteresis Temperature TTSD2 150ºC TSD Operating Temperature ( Output Stop ) TTSD1 Tj (Tjmax) Ver.2014-03-06 -7- NJW4305A ► Under voltage protection operating voltage VCC 36V 7.3V Recommended Operational Voltage (max.) Recommended Operational Voltage (min.) UVLO Reset Volage( Nomral Operation ) VRUVLO Hysteresis Voltage VDUVLO 0V UVLO Operating Voltage( Output Stop ) ► Lock detect FG Hole Signal Input Timing VCt VHCt Time : t VLCt t ON Motor Rotate -8- t OFF Motor Hold Ver.2014-03-06 NJW4305A ■ TRUTH TABLE Input vs. Output Truth table 1 ( H1+ > H1 -, H2+ > H2 -, H3+ > H3 - = “ H ”, Don’t Care = “ X ” ) H1 H2 H3 H H L L L L H H H L L L L H H H L H H H L L L H H H L L L L H H H L L L H H H L L L L H H H L L L H H H L H H H L L L L H H H L L L L H H H L H H H L L L L H H H L L L L H H H L H H L L L L H H H L H L H H H L L L L H H H L L L L H H H L H H H L L L L H H H L L L L H H H L H H H L L L L H H H L L L L H H H L H L H H L L L L H H H L L L L H H Hi-Z L Hi-Z L Hi-Z H L H TSD UVLO ILIMIT VERR OSC UH VH WH UL VL WL FG Hi-Z Hi-Z L L Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z L L L Hi-Z Hi-Z Hi-Z H L L L L L H H L L L L L H H Hi-Z L Hi-Z L Hi-Z Hi-Z L Hi-Z H L L L L Hi-Z Hi-Z Hi-Z Hi-Z L Hi-Z Hi-Z L L Hi-Z Hi-Z L L Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z L Hi-Z Hi-Z Hi-Z L L Hi-Z L L Hi-Z Hi-Z Hi-Z L L H H L L L L L L H H H H L L L L L L L Hi-Z L Hi-Z L Hi-Z L Hi-Z L Hi-Z L Hi-Z Hi-Z L Hi-Z L Hi-Z Hi-Z L L Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z L L L Hi-Z Hi-Z Hi-Z Hi-Z L Hi-Z L Hi-Z Hi-Z L Hi-Z L L Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z L L Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z L L Hi-Z L Hi-Z L Hi-Z H L Hi-Z Hi-Z L L L L H H L Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z L L Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z L L Hi-Z L Hi-Z L Hi-Z L Hi-Z Hi-Z L Hi-Z Hi-Z L L Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z L L L Hi-Z Hi-Z Hi-Z Hi-Z L Hi-Z L Hi-Z Hi-Z L Hi-Z L L Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z L L Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z L L Hi-Z L Hi-Z L Hi-Z L Hi-Z Hi-Z OFF OFF OFF H L Ct L FR L OFF OFF OFF H L L H OFF OFF X X X H L OFF OFF OFF OFF OFF X ON OFF OFF OFF OFF OFF ON X X X X ON ON X X L X L H H X X H X H X X X X L H L L L X X L H H L H X X Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z L L L L L L L L L L L L L L L COMMENT Forward Reverse Lock Detect ( Forward ) PWM ( Forward ) Lock Detect ( Reverse ) PWM ( Reverse ) Over current protection Over current protection L L L L L L L Hi-Z L Hi-Z L Hi-Z Under voltage lock detect Thermal shutdown L Input vs. Output Truth table 2 ( H1+ > H1 -, H2+ > H2 -, H3+ > H3 - = “ H ”, Don’t Care = “ X ” ) H1 H H2 H H3 H L L L Ver.2014-03-06 TSD UVLO ILIMIT VERR OSC X X X X X Ct FR UH VH WH UL VL WL FG COMMENT X X Hi-Z Hi-Z Hi-Z L L L Hi-Z Error pattern Hole signal input -9- NJW4305A ■ TIMING CHART 1. Forward Rotation Rotor Electrical Position (deg) 0 VCC 60 120 180 240 300 360 420 480 540 600 660 720 780 840 900 24V H1 H2 H3 L FR VERR 5V OSC Ct 0V ILimit 0V FG UH VH WH UL VL WL Condition - 10 - Forward Rotation Ver.2014-03-06 NJW4305A 2. Forward Rotation at PWM Rotor Electrical Position (deg) 0 VCC 60 120 180 240 300 360 420 480 540 600 660 720 780 840 900 24V H1 H2 H3 FR L VERR OSC Ct 0V ILimit 0V FG UH VH WH UL VL WL Condition Ver.2014-03-06 Forward Rotation Forward Rotation DUTY50% Forward Rotation DUTY0% - 11 - NJW4305A 3. Change for Forward Rotate to Reverse Rotate Rotor Electrical Position (deg) 0 VCC 60 120 180 240 300 360 420 480 540 600 660 720 780 840 900 24V 100 110 010 011 001 001 001 101 100 110 010 011 001 101 100 110 H1 H2 H3 FR VERR 5V OSC Ct 0V ILimit 0V FG UH VH WH UL VL WL Local OSC STOP(Brake) Condition Forward Rotation Reverse Rotation Brake Dead Time - 12 - Ver.2014-03-06 NJW4305A 4. Forward Rotation → Lock Detect Rotor Electrical Position (deg) 0 VCC 60 120 180 240 300 360 420 480 540 600 660 720 780 840 900 24V 100 110 010 011 001 001 001 001 001 001 001 001 001 101 100 110 H1 H2 H3 FR VERR 5V OSC Ct 0V Detect Abnormal Stop ILimit Lock Rereace End Abnormal Stop 0V FG UH VH WH UL VL WL Forward Rotation Abnormal Stop Abnormal Stop Abnormal Stop Condition Lock Detect Ver.2014-03-06 Lock Detect Forward Rotation - 13 - NJW4305A 5. Forward Rotation → UVLO Rotor Electrical Position (deg) 0 VCC 60 120 180 240 300 360 420 480 540 600 660 720 780 840 900 24V H1 H2 H3 FR VERR L 5V OSC Ct 0V ILimit 0V FG UH VH WH UL VL WL Condition - 14 - Forward Rotation UVLO Forward Rotation Ver.2014-03-06 NJW4305A 6. Forward → THD Rotor Electrical Position (deg) 0 VCC 60 120 180 240 300 360 420 480 540 600 660 720 780 840 900 24V H1 H2 H3 FR VERR L 5V OSC Ct 0V ILimit 0V FG UH VH WH UL VL WL Forward Rotation Ver.2014-03-06 TSD Forward Rotation - 15 - NJW4305A Technical Information ■ TYPICAL APPLICATION < MOS FET Drive Circuit, PWM Control, Operating Voltage VCC=24V, Motor Voltage VMM=24V > VMM VDD C1 + RFG C2 C3 FG Out + C4 GND FG VCC RUH1 VREF RVH1 RWH1 UVLO UH RUH2 VH RVH2 TSD 3 Phase Motor H1+ H H1- H2- + - S N Rotor Position Decode H2+ H N S + - WH RWH2 UL RUL VL RVL WL RWL H3+ H H3- + - 18kHz Fix. FR Dead Tim e FR Local Oscillator ILIMIT OSC Saw Os cillator COSC VERR CVERR GND PWM Logic + - ILIMIT Lock Detect + - Lowpass Filter Ct Cct - 16 - Ver.2014-03-06 NJW4305A Technical Information ■ FUNCTION DESCRIPTIONS VICMH 1. Hall Signal Input (H1+, H1-, H2+, H2-, H3+, H3- Pin) 1-1: Using Hall Device These pins are hall device input pin. 3.5V These are connected to input differential amplifier (hall amplifier) with hall device input pin. When the Hall input level becomes "H" or "L" at the same time of three-phase, the outputs (WL, VL, UL, WH, VH, UH) become OFF. The Rotor Position decode circuit judges like following 0V that the voltage level is “H” at H + > H – and “L” at H + < H -. The hall amplifier has the input hysteresis voltage of The hall signal peak value must not exceed 50mV (max). You should input the amplitude greater than VICMIH. 100mVp-p with considering the margin. At this time, the hall signal peak value must not exceed the input common-mode input voltage range VICMIH. It should be used the hall bias resistance of same value at VCC and GND side. Some noise might overlap to the hall signal based on the GND level fluctuations by phase current change or the unbalance of an output signal course, etc. When the malfunction of the output chattering etc. occurs, it should connect between the positive pin and the negative pin with filter capacitor in range of from 1nF to 100nF. 1-2: Using Hall IC This products is a usage hall device, but can use a hall ICs. But please add the voltage conversion circuit such as the figure because it is necessary to adapt the output amplitude of hall IC to the input voltage range of the IC. H1 is High, please set R3, R4 at the time of high so that the voltage ov VH1+ is as follows 3.5V. < Hall IC – Hall Device Exchange Circuit > 12V R3 12kΩ Hall IC R1 30kΩ H1 Signal Amplitude NJW4305A 3.4V H1+ 1.6V (H1-) About 0V R4 4.7kΩ Ver.2014-03-06 R2 4.7kΩ Time : t - 17 - NJW4305A Technical Information 2. Output Block (WL, VL, UL / WH, VH, UH Pin) 2-1: Output for Lower Arm (120º Excitation Output + ON/OFF Output ) It is an output pin that can drive directly Nch FET gate for three-phase motor lower arm. The phase switching signal is output that generated by the hall signal. The output interrupter switch is built in. The PWM function by VERR/OSC, Protection function by Ct pin and OCP by ILIMIT are operating to the lower arm. Moreover, the voltage clamp circuit that prevents the excess voltage input to an external Nch FET gate is built in. The output series resistance is suppressing the transient current and/or vibration at the time of switching. In case of using 3A to 5A class MOS FET, you should consider the resistance value in the range of 100Ω to 1,000Ω. 2-2: Output Upper Arm (120º Excitation Output ) It is an output pin that can drive directly Pch FET gate for three-phase motor upper arm. The phase switching signal is output that generated by the hall signal. Because these are open-drain configuration, pull-up resistor is required. The upper arm output is different from the lower arm output, and the output interrupter switch is not built in. You should consider gate output series resistor value in the range from 100Ω to 1,000Ω as with the lower arm. And you should set pull-up resistor that ensures sufficient VGS. 3. Forward / Reverse Function Switching (FR Pin) It is the pin that a motor forward / reverse function switching. It can switch the phase excitation sequence by the FR input logic. As a result, the direction where the motor is rotated can be switched. The sequence at the time of a motor rotation switching is shown below and the internal oscillator controls it. In addition, an internal oscillator is fixed with 18kHz, and becomes operation of normal rotation reversal at the 4th clock. FR CLK Upper Arm Lower Arm L Based on a turn value L Based on a turn value L L L L L L Dead Time Brake Dead Time Dead Time Brake Dead Time 4. FG Output (FG Pin) It is the pin that outputs the pulse at the cycle proportional to the rotation of a motor. This pin is open-drain output of 7V absolute maximum rating. This pin should be pull-up with resistor to power supply that is 5V or more. This pin should be pull-up with resistor to power supply that is 5V or more. Do not connect this pin to power supply (VCC) or power supply for motor (VMM). - 18 - Ver.2014-03-06 NJW4305A Technical Information 5. Oscillation Block (VERR, OSC Pin) The PWM function is successively compared the DC voltage (VVERR) that is input to the VERR and the triangular wave (sawtooth wave) voltage (VOSC) generated from COSC connected with OSC. As a result, the lower arm output is turned on at VVERR>VOSC. The PWM frequency (fOSC) is determined by the following elements that are charging/discharging to COSC. : The triangular wave peak voltage (VPOSC), the bottom voltage (VBOSC), the charge current (ICHGOSC), and the discharge current (IDCHGOS). It is possible to approximate from the relation of ICHGOSC≪IDCHGOSC by the following formula. The COSC recommended value is from 330pF to 2200pF. ITEM Oscillation Frequency VOSC fOSC=1/(tCHGOSC+tDCHGOSC) VPOSC VBOSC Time : t t CHGOSC t DCH GOSC SYMBOL FORMULA fOSC fOSC 35 106 / COSC It is possible to use the direct PWM input that inputs duty controlled logic signal to VERR, and chopping driving the lower arm output. In this case, it should be biased to the OSC pin voltage with approx 2V (between 1V and 3V). In case of the ON duty is light at the time of the PWM signal is input to the VERR pin, the switching (power) device saturation and/or the ON resistance reduction might become insufficient. As the result, the switching device might cause unexpected heat. You should confirm that external power device ASO having sufficient margin to your application. Ex.: In cases of VERR=2.2V Fixed setting When the pull-up voltage is 5V, it should be pulled-up to approx 1.8kΩ. When the pull-up voltage is 12V, it should be pulled-up to approx 6.2kΩ. The output ON is when VERR is 2.2V or more. Signal Amplitude 5.0V (12V) 1.8kΩ (6.2kΩ) 5.0V NJW4305A VERR Input Signal OSC About 0V Time : t 1.44kΩ VERR OSC Voltage : About 2.2V Output Signal (UL, VL, WL) Time : t Ver.2014-03-06 - 19 - NJW4305A Technical Information 6. Lock Protection Circuit / Lock Protection Locked Time, Lock Protection Release Time (Ct Pin) This pin is the setting pin for Lock Protection Time. It connects to capacitor (CCt). Under normal conditions the Ct pin feeds charge current (ICHGCt) through CCt. However, while the motor rotation the Ct is fast discharging CCt according to the edge timing of the FG signal. Therefore, the minute shape saw-tooth waveform appears as shown in the following figure at Ct pin. This Ct pin voltage VCt is approx 0V. When the hall signal is stopped after the motor locked, the fast discharge is lost and VCt rises gradually. When the VCt reaches lock protection H level voltage (VHCt), the low-side output (WL, VL, UL) becomes turned off (lock protection). The lock protection locked time (tDCt1) is defined the following: the time from the ICHGCt charge start time to the output OFF. When the VCt reaches the VHCt once, the Ct pin is discharged by discharge current (IDCHGCt), and the VCt pin voltage gradually comes down. The lock protection is released when VCt falls below lock protection L level voltage (VLCt), and returns to normal output (auto release). The lock protection release time (tRCt) is defined the following: the time from the CCt discharge start time to the output OFF is released. Even if output OFF is released, CCt begins the charging again when the hall signal is not input with the motor locked. As a result, when VCt exceeds VHCt, it becomes output OFF. The lock protection re-locked time (tDCt2) is defined the following: the time of until lock protection is re-operating. It is attention that the definition is different from the lock protection locked time (tDCt1). After that, the lock protection and an auto release are repeated for every tRCt and tDCt2 until FG signal is generated. The tDCt1/tDCt2/tRCt can be calculated by the following formulas. You should consider the CCt in the range of 0.1μF to 10μF. ITEM Lock Protection Locked Time Lock Protection Re-locked Time Lock Protection Release Time SYMBOL FORMULA tDCt1 tDCt VHCt CCt / ICHGCt = 0.523 106 CCt tDCt2 tDCt1 (VHCt-VLCt) CCt / ICHGCt = 0.369 106 CCt tRCt tRCt (VHCt-VLCt) CCt / IDCHGCt = 3.69 106 CCt Rotate 1 FG Rotate Stop Motor Lock Time : t Auto Release V Ct V HCt V LCt Time : t t DCt1 Rotate 2 ( Low Speed than Rotate 1 ) FG t RCt t DCt2 Rotate Stop Motor Lock Time : t Auto Release V Ct V HCt V LCt Time : t tDCt1 - 20 - tRCt tDCt2 Ver.2014-03-06 NJW4305A Technical Information At the during rotation 1 in the left figure, VCt waveform becomes a sawtooth waveform of approx 0V as described above. The during rotation 2 figure shows a case of slower status than at the during rotation 1 condition. And it shows the saw tooth waveform peak rises. When it is made extremely low-speed on the velocity changeable application etc., the FG signal edge timing might become long. As a result, VCt might rise and the lock protection circuit malfunctions. To avoid the lock protection malfunction, you should consider Ct discharge circuit adding or value adjustment of Ct. Moreover, when the Ct pin is connected to GND, this lock protection function is canceled. < Low-speed Lock Protection Operation Avoidance Circuit > It is Ct discharge circuit with the FG signal output. For example in the speed control application, the hall signals input timing becomes long at low speed time. Therefore, Ct voltage peak level rises and the lock protection circuit operates early. The Vct rise is suppressed by extending the rapid discharge time of Cct with the differentiation circuit by C1 and R1 and the comparator. VREF(5V) NJW4305A RFG R2 C1 D1 FG-OUT FG FG-IN R1 R3 CT CCt 7. Over Current Detect Circuit (ILIMIT Pin) When the voltage that exceeds the detection voltage VDETLIM=0.28V typ. input to ILIMIT, all the lower arm output (UL, VL, WL) level is in “L” all. By flowing the resistor to match the source current of the lower arm of the external FET input to ILIMIT terminal voltages developed , and such a configuration can detect an overcurrent occurs in either r phase . ILIMIT will return as a trigger by local oscillator (typical frequency 18kHz) . This behavior is independent of the Hall signal, internal signal as rock protection and PWM signal from the VERR/OSC pins. If the speed of the motor is controlled by the duty signal input by external circuit to VERR, note that it can not output returns with the trigger by local oscillator , to stop the motor, therefore ILIMIT can be operated once. Since not only the winding current of the motor ,spike current of the number 100ns about caused by the charging and discharging of the parasitic capacitance of the external FET flows , short surge pulses are frequently entered the ILIMIT to RILIMIT. When the behavior of the ILIMIT comparator reacts to short pulses of them, there is the PWM pulse missing, causing a reduction of torque and/or rotation speed of the motor. By adding an RC low-pass filter to ILIMIT, it is possible to avoid the effects of such surge pulses. The product of C and R, I set the output voltage V of the RC circuit does not exceed VDETLIM. RC condition give the following: Ver.2014-03-06 - 21 - NJW4305A R C t V ln 1 DETLIM vi Vi is the pulse voltage generated in the RILIMIT, t is the duration. ln means the natural logarithm. In order to obtain the RC value, it is assigned to vi the amplitude of the surge pulse, t the duration and VDETLIM the target value with standard minimum and some margin in this equation. Adjust R and C as appropriate while cheking the actual equipment. Example: VDETLIM = 0.22 [V] minimum standard and 0.03[V] margin, vi = 1 [V], for t = 1 [μs] Ans.: RC>4.02E-6 It is available in a combination such as R=4.3kohm, C=1nF. * Constant setting of other <Filter capacitor of the power supply> In order to reduce the influence to the Hall bias current, be installed capacitors C1 and C2 suppress variations i In VDD near the Hall bias resistors. C3 and C4 capacitors to suppress the fluctuation of the VMM by the motor winding current are also in consideration of the current loop, the wiring length to GND and the VMM do not be long carelessly. - 22 - Ver.2014-03-06 NJW4305A ■ ELECTRICAL CHARACTERISTICS EXAMPLES < GENERAL > Quiescent Current1 vs. Ambient Temperature < GENERAL > Quiescent Current1 vs. Ambient Temperature VCC=12V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V, OSC=1V VCC=24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V, OSC=1V 5.0 Quiescent Current2 : ICC2 [mA] Quiescent Current1 : ICC1 [mA] 5.0 4.5 4.0 3.5 3.0 2.5 2.0 4.5 4.0 3.5 3.0 2.5 2.0 -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] -50 < UNDER VOLTAGE LOCK OUT BLOCK > UVLO Detect Voltage vs. Ambient Temperature Ta=25ºC, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V, OSC=1V VCC Decreasing, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V, OSC=1V 7.2 UVLO Detect Voltage : V DUVLO [V] 4.0 Quiescent Current : ICC [mA] 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] < GENERAL > Quiescent Current vs. Supply Voltage 4.5 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 7 6.8 6.6 6.4 6.2 6 0 5 10 15 20 25 30 Supply Voltage : VCC [V] 35 40 -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] < UNDER VOLTAGE LOCK OUT BLOCK > UVLO Hysteresis Voltage Range vs. Ambient Temperature VCC Increasing, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V, OSC=1V VCC =24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V, OSC=1V UVLO Hysteresis Voltage Range : ΔVUVLO [V] < UNDER VOLTAGE LOCK OUT BLOCK > UVLO Recovery Voltage vs. Ambient Temperature 7.2 UVLO Recovery Voltage : VRUVLO [V] -25 7 6.8 6.6 6.4 6.2 6 0.3 0.25 0.2 0.15 0.1 0.05 0 -50 Ver.2014-03-06 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] - 23 - NJW4305A < LOCK DETECT BLOCK > H Level Voltage vs. Ambient Temperature < LOCK DETECT BLOCK > L Level Voltage vs. Ambient Temperature VCC=24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=ILIMIT=0V, VERR=5V, OSC=1V VCC=24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=ILIMIT=0V, VERR=5V, OSC=1V 3.60 1.20 3.55 1.15 L Level Voltage : VLCt [V] H Level Voltage : VHCt [V] ■ ELECTRICAL CHARACTERISTICS EXAMPLES 3.50 3.45 3.40 3.35 3.30 3.25 1.10 1.05 1.00 0.95 0.90 0.85 3.20 0.80 -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] -50 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] < LOCK DETECT BLOCK > Lock Charge Current vs. Ambient Temperature < LOCK DETECT BLOCK > Lock Discharge Current vs. Ambient Temperature VCt=0V2.5V, VCC=24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=ILIMIT=0V, VERR=5V, OSC=1V VCt=3.8V2.5V,VCC=24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=ILIMIT=0V, VERR=5V, OSC=1V 10 0.9 Lock Discharge Current : IDCHGCt [μA] Lock Charge Current : ICHGCt [μA] -25 9 8 7 6 5 4 0.8 0.7 0.6 0.5 0.4 0.3 -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] < LOCK DETECT BLOCK > Lock Charge Discharge Current Ratio vs. Ambient Temperature Lock Charge Discharge Current Ratio : ICHGCt/IDCHGt VCC=24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=ILIMIT=0V, VERR=5V, OSC=1V 13 12 11 10 9 8 7 -50 - 24 - -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] Ver.2014-03-06 NJW4305A ■ ELECTRICAL CHARACTERISTICS EXAMPLES < HALL AMP BLOCK > < HALL AMP BLOCK > Input Bias Current vs. Ambient Temperature Hysteresis Voltage Range vs. Ambient Temperature H1+=1V, H1-=3V, MEAS:IH1+, VCC=24V, H3+=3V, H2+=1V, H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V, OSC=1V 50 1.8 45 1.6 Input Bias Current : IBIH [μA] Hysteresis Voltage Range : ΔVHYSH [mV] MEAS:VH1+, VCC=24V, H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V, OSC=1V 40 35 30 25 20 15 1.0 0.8 0.6 0.2 -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] < HIGH SIDE OUTPUT BLOCK > High Side Output Voltage vs. Ambient Temperature < HIGH SIDE OUTPUT BLOCK > High Side Leak Current vs. Ambient Temperature H1+=H3+=1V, H2+=3V, UH=50mA, MEAS:VUH, VCC=24V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V, OSC=1V UH=36V, MEAS:IUH, VCC=24V, H1+=H2+=H3+=3V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V, OSC=1V 1.0 High Side Leak Current : IOLEAKH [μA] 1.2 High Side Output Voltage : VOLH [V] 1.2 0.4 10 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.2 0.0 -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] < LOW SIDE OUTPUT BLOCK > Low Side Output Voltage1 vs. Ambient Temperature < LOW SIDE OUTPUT BLOCK > Low Side Output Voltage vs. Ambient Temperature VCC=12V, UL=-50mA, MEAS: VUL, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=0V, VERR=3.5V, OSC=1V, CT=ILIMIT=0V VCC=24V, UL=-50mA, MEAS: VUL, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=0V, VERR=3.5V, OSC=1V, CT=ILIMIT=0V 13 Low Side Output Voltage : VOHL2 [V] 13 Low Side Output Voltage1 : VOHL1 [V] 1.4 12 11 10 9 8 7 6 5 12 11 10 9 8 7 6 5 -50 Ver.2014-03-06 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] - 25 - NJW4305A ■ ELECTRICAL CHARACTERISTICS EXAMPLES < LOW SIDE OUTPUT BLOCK > Low Side Output L Voltage vs. Ambient Temperature < LOW SIDE OUTPUT BLOCK > Low Side Clamp Voltage vs. Ambient Temperature VCC=24V, H1+=1V, H2+=H3+=3V, UL=150mA, MEAS:VUL, H1-=H2-=H3-=2V, FR=0V, VERR=5V, OSC=1V, CT=ILIMIT=0V VCC=36V, UL=-0.1mA, MEAS:VUL, IH1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=0V, VERR=3.5V, OSC=1V, CT=ILIMIT=0V 13 Low Side Clamp Voltage : VOCLL [V] Low Side Output L Voltage : VOLL [V] 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 11 10 9 8 7 6 5 -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] < FG OUTPUT BLOCK > Output Voltage vs. Ambient Temperature < FG OUTPUT BLOCK > Leak Current vs. Ambient Temperature FG=10mA, VCC=24V, H1+=H2+=H3+=3V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V, OSC=1V H1+=1V, FG=5V, VCC=24V, H2+=H3+=3V, UL=150mA, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V, OSC=1V 0.60 0.6 0.50 0.5 Leak Current : IOLEAKFG [μA] Output Voltage : VOFG [V] 12 0.40 0.30 0.20 0.10 0.4 0.3 0.2 0.1 0.00 0.0 -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] < OVER CURRENT DETECT BLOCK > Detect Voltage vs. Ambient Temperature < OVER CURRENT DETECT BLOCK > Input Bias Current vs. Ambient Temperature VCC=24V, H1+=H2+=H3+=3V, H1-=H2-=H3-=2V, FR=CT=0V, VERR=5V, OSC=1V VCC=24V, H1+=H2+=H3+=3V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V, OSC=1V 2.0 0.31 Input Bias Current : IBLIM [μA] Detect Voltage : VDETLIM [V] 1.8 0.30 0.29 0.28 0.27 0.26 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.25 0.0 -50 - 26 - -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] Ver.2014-03-06 NJW4305A < ERROR AMP BLOCK > Input Bias Current vs. Ambient Temperature < OSCILLATOR BLOCK > Saw Wave Peak Voltage vs. Ambient Temperature VERR=0V, VCC=24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, OSC=1V VCC =24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V 2.0 3.30 1.8 3.25 Saw Wave Peak Voltage : VPOSC [V] Input Bias Current : IBVERR [μA] ■ ELECTRICAL CHARACTERISTICS EXAMPLES 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 3.20 3.15 3.10 3.05 3.00 2.95 2.90 2.85 2.80 2.75 0.0 2.70 -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] -50 VCC =24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V, OSC=0V->2.5V 120 1.20 OSC Charge Current : ICHGOSC [μA] Saw Wave Bottom Voltage : VBOSC [V] VCC =24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V 1.10 1.05 1.00 0.95 0.90 0.85 110 100 0.80 90 80 70 60 50 -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] < OSCILLATOR BLOCK > Oscillation Frequency vs. Ambient Temperature < OSCILLATOR BLOCK > OSC Discharge Current vs. Ambient Temperature Cosc=1000pF, VCC =24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V VCC =24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, FR=CT=ILIMIT=0V, VERR=5V, OSC=5V->2.5V 2.0 Oscillation Frequency : fOSC [kHz] 50 1.8 OSC Discharge Current : IDCHGOSC [mA] 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] < OSCILLATOR BLOCK > OSC Charge Current vs. Ambient Temperature < OSCILLATOR BLOCK > Saw Wave Bottom Voltage vs. Ambient Temperature 1.15 -25 1.6 1.4 1.2 1.0 0.8 45 40 35 30 25 20 15 0.6 10 -50 Ver.2014-03-06 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] - 27 - NJW4305A < CONTROL INPUT BLOCK > H Level Input Current vs. Ambient Temperature < CONTROL INPUT BLOCK > L Level Input Current vs. Ambient Temperature FR=5V, VCC=24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, CT=ILIMIT=0V, VERR=5V, OSC=1V FR=0V, VCC=24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, CT=ILIMIT=0V, VERR=5V, OSC=1V 100 0.6 90 0.5 L Level Input Current : ILIN [μA] H Level Input Current : IHIN [μA] ■ ELECTRICAL CHARACTERISTICS EXAMPLES 80 70 60 50 40 0.4 0.3 0.2 0.1 0.0 -0.1 30 -0.2 -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] -50 -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] < CONTROL INPUT BLOCK > Pull Down Resistance vs. Ambient Temperature Pull Down Resistance : RIN [kΩ] 150 FR=5V, VCC=24V, H1+=H3+=3V, H2+=1V, H1-=H2-=H3-=2V, CT=ILIMIT=0V, VERR=5V, OSC=1V 140 130 120 110 100 90 80 70 60 50 -50 - 28 - -25 0 25 50 75 100 125 150 Ambient Temperature : Ta [ºC] Ver.2014-03-06 NJW4305A [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. Ver.2014-03-06 - 29 -