Ordering number : EN7229B LB11920 Monolithic Digital IC For OA Products http://onsemi.com Three-Phase Brushless Motor Driver Overview The LB11920 is a direct PWM drive motor driver IC for 3-phase power brushless motors. The PWM duty can be controlled by IC inputs, and it can be used over the wide supply voltage range of 9.5 to 30V. Features • Three-phase bipolar drive (35V, 3.5V) • Direct PWM drive • Built-in high and low side kickback absorbing diodes • Braking function (short-circuit braking) • Built-in forward/reverse direction switching circuit • Full complement of built-in protection circuits, including current limiter, low-voltage protection, motor lock (physical constraint) protection, and thermal protection circuits • The PWM duty can be controlled by IC inputs Specifications Absolute Maximum Ratings at Ta = 25°C Parameter Symbol Supply voltage 1 VM max Supply voltage 2 VCC max Conditions Ratings Unit 35 V 7 V Output voltage VOUT max OUT1 to OUT3 35 V Output current IO max T ≤ 500ms 3.5 A Allowable power dissipation Pd max1 Independent IC 3 W Pd max2 With an infinitely large heat sink. 20 W Operating temperature Topr -20 to +80 °C Storage temperature Tstg -55 to +150 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. Semiconductor Components Industries, LLC, 2013 May, 2013 82008 MS PC/O3003SI (OT) No.7229-1/10 LB11920 Allowable Operating Conditions at Ta = 25°C Parameter Symbol Conditions Ratings Unit Supply voltage range 1 VM 9.5 to 30 Supply voltage range 2 VCC 4.5 to 5.5 V V HP pin applied voltage VHP 0 to 32 V HP pin output current IHP 0 to 3 mA Electrical Characteristics at Ta = 25°C, VM = RF = 27V, VCC = 5V Parameter Symbol Ratings Conditions min typ Unit max Supply current 1 IVCC-1 VCC pin 9 13 mA Supply current 2 IVCC-2 VCC pin at stop mode 2.0 3.0 mA Output saturation voltage 1 VO sat1 IO = 1.0A, VO (sink) + VO (source) 1.7 2.4 V Output saturation voltage 2 VO sat2 IO = 2.0A, VO (sink) + VO (source) 2.0 2.9 V Output saturation voltage 3 VO sat3 IO = 3.0A, VO (sink) + VO (source) 2.4 3.5 V 100 μA Output block Output leakage current IO leak Output delay time 1 td1 PWMIN “H” → “L” 1.25 2.5 μs Output delay time 2 td2 PWMIN “L” → “H” 1.8 3.6 μs Lower diode forward 1 VD1-1 ID = -1.0A 1.1 1.5 V Lower diode forward 2 VD1-2 ID = -2.0A 1.3 1.9 V Lower diode forward 3 VD1-3 ID = -3.0A 1.5 2.3 V Upper diode forward 1 VD2-1 ID = 1.0A 1.3 1.7 V Upper diode forward 2 VD2-2 ID = 2.0A 2.0 2.7 V Upper diode forward 3 VD2-3 ID = 3.0A 2.7 3.7 V Hall Amplifier Input bias current IHB Common-mode input voltage range 1 VICM1 Hall device used Common-mode input voltage range 2 VICM2 For input one-side bias (Hall IC application) Hall input sensitivity -2 at differential input μA -0.1 0.5 VCC-2.0 V 0 VCC V 50 mVp-p Hysteresis width ΔVIN 20 30 50 mV Input voltage low → high VSLH 5 15 25 mV Input voltage high → low VSHL -25 -15 -5 mV 2.75 3.0 3.25 PWM oscillator Output H level voltage VOH (PWM) Output L level voltage VOL (PWM) External C charge current ICHG(PWM) VPWM = 2.1V Oscillator frequency f (PWM) C = 1000pF Amplitude V (PWM) V 1.0 1.2 1.3 V -60 -45 -30 μA 15.8 20 24.2 kHz 1.6 1.8 2.1 Vp-p 3.6 3.9 4.2 V -15 -11 -7 μA CSD circuit Operating voltage VOH (CSD) External C charge current ICHG (CSD) VCSD = 0V Operating time T (CSD) C = 10μF, Design target value* 3.5 Output low level voltage VOL (HP) IHP = 2mA 0.1 Output leakage current Ileak(HP) VHP = 30V TTSD Design target value* (junction temperature) ΔTSD Design target value* (junction temperature) s HP pin 0.4 V 10 μA Thermal shutdown operation Thermal shutdown operating 150 180 °C 45 °C temperature Hysteresis width Current limiter circuit (RF pin) Limiter voltage VRF 0.45 0.5 0.55 V Note : * This parameter is a design target value and is not measured. Continued on next page. No.7229-2/10 LB11920 Continued from preceding page. Parameter Symbol Ratings Conditions min Unit typ max Low-voltage protection circuit Operating voltage VSDL 3.6 3.8 Release voltage Hysteresis width 4.0 V VSDH 4.1 ΔVSD 0.35 4.3 4.5 V 0.5 0.65 V PWMIN pin Input frequency f (PI) H level input voltage VIH (PI) 2.0 VCC 50 V L level input voltage VIL (PI) 0 1.0 V Input open voltage VIO (PI) VCC-0.5 Hysteresis width VIS (PI) 0.15 H level input current IIH (PI) VPWMIN = VCC L level input current IIL (PI) VPWMIN = 0V 0.25 kHz VCC V 0.35 V -10 0 10 μA -116 -87 -58 μA S/S pin H level input voltage VIH (S/S) 2.0 VCC V L level input voltage VIL (S/S) 0 1.0 V Input open voltage VIO (S/S) VCC-0.5 VCC V Hysteresis width VIS (S/S) 0.15 0.25 0.35 V H level input current IIH (S/S) VS/S = VCC -10 0 10 μA L level input current IIL(S/S) VS/S = 0V -116 -87 -58 μA VCC V V F/R pin H level input voltage VIH (F/R) 2.0 L level input voltage VIL (F/R) 0 1.0 Input open voltage VIO (F/R) VCC-0.5 VCC V Hysteresis width VIS (F/R) 0.15 0.35 V H level input current IIH (F/R) VF/R = VCC L level input current IIL(F/R) VF/R = 0V 0.25 -10 0 10 μA -116 -87 -58 μA VCC V V BR pin H level input voltage VIH (BR) 2.0 L level input voltage VIL (BR) 0 1.0 Input open voltage VIO (BR) VCC-0.5 VCC V Hysteresis width VIS (BR) 0.15 0.35 V H level input current IIH (BR) VBR = VCC L level input current IIL(BR) VBR = 0V 0.25 -10 0 10 μA -116 -87 -58 μA Package Dimensions unit : mm (typ) 3174C Pd max -- Ta 15 12.7 11.2 R1.7 0.4 8.4 28 1 14 20.0 4.0 4.0 26.75 (1.81) 1.78 0.6 Allowable power dissipation, Pd max – W 24 20 With an infinitely large heat sink 16 12 8 4 3 Independent IC 0 – 20 1.0 0 20 40 60 80 100 Ambient temperature, Ta – °C SANYO : DIP28H(500mil) No.7229-3/10 LB11920 Pin Assignment OUT1 NC GND2 VM RF GND3 IN3+ IN3- IN2+ IN2- IN1+ IN1- CSD TOC 28 27 26 25 24 23 22 21 20 19 18 17 16 15 13 14 LB11920 1 2 OUT2 3 OUT3 GND2 4 5 6 7 8 9 10 11 12 NC VM RF HP BR PWMIN F/R S/S VCC GND1 PWM Top view Truth Table Source F/R = “L” Sink IN1 F/R = “H” IN2 IN3 IN1 IN2 IN3 1 OUT2 → OUT1 H L H L H L 2 OUT3 →OUT1 H L L L H H 3 OUT3 → OUT2 H H L L L H 4 OUT1 → OUT2 L H L H L H 5 OUT1 → OUT3 L H H H L L 6 OUT2 → OUT3 L L H H H L S/S pin PWMIN pin Input condition Condition Input condition Condition H or open Stop H or open Output OFF L Start L Output O Input condition Condition BR pin H or open - L Brake The PWMIN pin must be held at the low-level voltage when this IC is operated with a voltage applied to the TOC pin. No.7229-4/10 5V VCC + S/S S/S VREF RESET OSC PWM + PWMIN IN PWM F/R F/R BR BR VCC HP H IN1 H IN2 IN3 H HALL HYS AMP HALL LOGIC LOGIC + PWM TOC – CIRCUIT CSD DRIVER TSD GND2 OUT3 OUT2 OUT1 RF LIM Rf 27V CURR VM + GND3 GND1 LVSD CSD LB11920 Block Diagram No.7229-5/10 LB11920 Pin Functions Pin No. Pin name 28 OUT1 Function 1 OUT2 2 OUT3 3, 26 GND2 5, 25 VM Power pin. 6, 24 RF Output Tr power and output current detector pins, Motor drive output pin. Equivalent circuit VM 5 25 300Ω RF Output GND pin. 6 24 which connect low resistance (Rf) to VM. The output current is limited to the current value 1 2 28 set with IOUT = VRF/Rf. 3 26 7 HP Hall element signal three-phase composite VCC output. Withstand voltage 35V max. 7 8 BR Brake input pin. VCC 50kΩ “L” for brake and “H” or open for normal rotation. 3.5kΩ 9 PWMIN PWM pulse input pin. VCC 50kΩ L for output drive and H or open for output OFF. 8 3.5kΩ F/R Forward/reverse input pin. VCC 50kΩ 10 9 3.5kΩ 10 Continued on next page. No.7229-6/10 LB11920 Continued from preceding page. Pin No. Pin name 11 S/S Function Equivalent circuit Start/stop control pin. VCC Start with L and stop with H or in the open 50kΩ condition. 3.5kΩ 11 12 VCC 13 GND1 GND pin (control circuit block). Control circuit power pin. 14 PWM Pin to set the PWM oscillation frequency. Connect a capacitor between this pin and GND. VCC 200Ω 2kΩ 14 15 TOC PWM waveform comparator pin. Normally use with “L” or open. To control the VCC output duty by applying the voltage to this pin without using the PWMIN pin, set the PWMIN pin to “L”. 50kΩ 15 CSD Pin to set the operation time of motor lock protection circuit. VCC Insertion of a capacitor (about 10μF) between CSD and GND enables setting of the protection operation time of about 3.5sec. 300Ω 500Ω 16 16 Continued on next page. No.7229-7/10 LB11920 Continued from preceding page. Pin No. 18 17 20 Pin name IN1+ IN1IN2+ 22 IN2IN3+ 21 IN3- 19 Function Equivalent circuit Hall amplifier input. IN+ > IN- is the input high state, and the reverse is VCC the input low state. Connect a capacitor between the IN+ and INinputs if there is noise in the Hall sensor signals. 300Ω 18 20 22 23 GND3 4 NC 300Ω 19 21 23 SUBGND pin to connect to GND1 that is GND of the control circuit. NC pin that can be used for wiring. 27 LB11920 Description 1. Output drive circuit This IC is of a direct PWM drive type that suffers less power loss at the output. On the basis of the signal (“H” level for OFF and “L” level for ON) entered in the PWMIN pin, the lower output Tr performs PWM switching, causing change in the motor drive power. To control by means of the DC voltage, apply the voltage to the TOC pin (in this case, the PWMIN pin should be in the “L” level input condition). The TOC pin voltage is compared with the oscillation voltage of PWM pin, determining the duty. As the TOC pin voltage is lower, the output duty increases. 2. Hall input signal For Hall input, entry of the signal whose amplitude is larger than the hysteresis width (50mV max) is necessary. Considering effects of noise and phase delay, entry of the amplitude of 120mVp-p (at differential input) or more is recommended. When noise causes disturbance in the output waveform (at phase switching) or in the HP output (Hall signal three-phase composite output), insert a capacitor, etc. as near as possible to the pin between inputs to prevent such effects. The Hall input is used as a signal for judgment of the input of the motor lock protection circuit. Though it is designed to ignore noise to a certain extent, due attention should be paid to check for incorrect operation of the protection circuit. Both upper and lower outputs are OFF when all three-phases of Hall input signal are in the common-mode input condition. When the Hall IC output is to be entered, entry of 0 - VCC can be made for another single-side input by fixing either one side (+ or -) of input to the voltage within the common-mode input range with the Hall element used. 3. Current limiting circuit The current limiting circuit performs limiting with the current determined from I = VRF/Rf (VRF = 0.5Vtyp, Rf : current detector resistance) (that is, this circuit limits the peak current). The control operation functions to reduce the on state duty of the output and thus reduce the current. Switching during current limiting is made on the basis of the frequency oscillated with the PWM pin. The PWM frequency is determined from the capacitance C (F) of capacitor connected to the PWM pin. fPWM ≈ 1/ (50000 × C) The PWM frequency of 15k to 25kHz is recommended. As PWM oscillation is used also as a clock signal of the internal logic circuit, its oscillation is necessary even in the application where current limiting is not needed. 4. Power save circuit This IC enters the power save condition to decrease the current dissipation in the stop mode. In this condition, the bias current of most of circuits is cut off. No.7229-8/10 LB11920 5. Forward/backward changeover The motor rotation can be changed over with the F/R pin. Following cautions should be observed when F/R changeover is to be made while the motor is running : • The circuit incorporates a measure against the through current at a time of changeover. However it is necessary to take an appropriate measure to prevent the voltage from exceeding the rated voltage (35V) because of rising of the VM voltage at changeover (instantaneous return of the motor current to the power supply). When this is a problem, increase the capacitance of a capacitor between VM and GND. • When the motor current after changeover is the current limit or more, the lower Tr is turned OFF. But the upper Tr enters the short-brake condition, and the current determined from the motor counter-electromotive voltage and coil resistance flows. It is necessary to prevent this current from exceeding the rated current (3.5A). (F/R changeover at high rotation speed is dangerous.) 6. Brake operation Brake operation is made through setting of the BR pin to the “L” level. This operation consists of a short-brake operation in which all of lower outputs are turned OFF while all of upper outputs are turned ON. While the brake is operating, current limiting and motor lock protection circuits are not operative. Apply brake only when the current during operation does not exceed the rated current (3.5A). The circuit incorporates a measure against the through current at a time of changeover. However it is necessary to take an appropriate measure to prevent the voltage from exceeding the rated voltage (35V) because of rising of the VM voltage at changeover (instantaneous return of the motor current to the power supply). When this is a problem, increase the capacitance of a capacitor between VM and GND. 7. Motor lock protection circuit A motor lock protection circuit is incorporated for protection of IC and motor when the motor is locked. The lower output Tr is turned OFF when the Hall input signal is not switched for a certain period in the motor drive condition. The time is set by means of a capacity of a capacitor connected to the CSD pin. Time setting of about 3.5sec is possible for the capacitance of 10μF. (Variance ±30%) Set time (s) ≈ 0.35 × C (μF) Due care must be taken on any leakage current in the capacitor used because it may adversely affect error of the set time, etc. To cancel the motor lock protection condition, one of following steps must be taken : • Stop mode • Maintaining the output duty 0% condition through input of PWMIN or TOC for more than the period of tPWM × 8. (tPWM : IC internal PWM oscillation period) • Power must be applied again (in the stop condition). Connect the CSD pin to GND when the motor lock protection circuit is not to be used. The motor lock protection active period at restart becomes shorter than the setting when the stop time to cancel motor lock protection is shorter because the charge of capacitor cannot be fully discharged. Therefore, it is necessary to provide a certain allowance to the stop period while referring to the following formula as a guideline. Stop time (ms) ≥ 15 × C (μF) 8. Circuit for low-voltage protection This circuit detects the voltage applied to the VCC pin. When this voltage drops below the operation voltage (see the electric characteristics), the lower side output is turned OFF. To prevent repetition of output ON/OFF near the protection activation voltage, the hysteresis is provided. Accordingly, the output is not recovered unless the voltage rises by about 0.5V above the activation voltage. 9. HP output For the HP output, the composite signal of three phases of Hall element signal is output. This is an open collector output. This can be used for the motor rotation detection signal, etc. No.7229-9/10 LB11920 10. Power supply stabilization This IC has a large output current, which causes deviation of the power line readily. To ensure stability, it is necessary to insert a capacitor with sufficient capacitance between the VM pin and GND. To eliminate the high-frequency noise due to switching, insert a ceramic capacitor of about 0.1μF as near as possible to the pin between VM (pin 5) and GND 2 (pin 3). When inserting diode in the power line to prevent breakdown due to reverse connection of power supply, select the sufficiently large capacitance because the power line tends to develop deviation readily. The VCC voltage that is a control power supply must also be fully stabilized by means of a capacitor when such voltage tends to fluctuate because of routing. 11. Routing of a printed circuit board Two pins are provided for each of VM, RF, and GND2 pins where large current flows. On the printed circuit board, both of these pins should be connected and used. If the use of only one pin is possible in certain cases, use pins 3, 5, and 6. GND3 that is a sub-GND (internal separation layer) should be connected with control GND or GND1 with the shortest possible wiring. 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