EM78P153K 8-Bit Microcontroller with OTP ROM Product Specification DOC. VERSION 1.3 ELAN MICROELECTRONICS CORP. October 2012 Trademark Acknowledgments: IBM is a registered trademark and PS/2 is a trademark of IBM. Windows is a trademark of Microsoft Corporation. ELAN and ELAN logo are trademarks of ELAN Microelectronics Corporation. Copyright © 2012 by ELAN Microelectronics Corporation All Rights Reserved Printed in Taiwan The contents of this specification are subject to change without further notice. ELAN Microelectronics assumes no responsibility concerning the accuracy, adequacy, or completeness of this specification. ELAN Microelectronics makes no commitment to update, or to keep current the information and material contained in this specification. Such information and material may change to conform to each confirmed order. In no event shall ELAN Microelectronics be made responsible for any claims attributed to errors, omissions, or other inaccuracies in the information or material contained in this specification. ELAN Microelectronics shall not be liable for direct, indirect, special incidental, or consequential damages arising from the use of such information or material. The software (if any) described in this specification is furnished under a license or nondisclosure agreement, and may be used or copied only in accordance with the terms of such agreement. ELAN Microelectronics products are not intended for use in life support appliances, devices, or systems. Use of ELAN Microelectronics product in such applications is not supported and is prohibited. NO PART OF THIS SPECIFICATION MAY BE REPRODUCED OR TRANSMITTED IN ANY FORM OR BY ANY MEANS WITHOUT THE EXPRESSED WRITTEN PERMISSION OF ELAN MICROELECTRONICS. ELAN MICROELECTRONICS CORPORATION Headquarters: Hong Kong: USA: No. 12, Innovation 1st Road Hsinchu Science Park Hsinchu, TAIWAN 30076 Tel: +886 3 563-9977 Fax: +886 3 563-9966 [email protected] http://www.emc.com.tw Elan (HK) Microelectronics Corporation, Ltd. Flat A, 19F., World Tech Centre 95 How Ming Street, Kwun Tong Kowloon, HONG KONG Tel: +852 2723-3376 Fax: +852 2723-7780 Elan Information Technology Group (U.S.A.) PO Box 601 Cupertino, CA 95015 U.S.A. Tel: +1 408 366-8225 Fax: +1 408 366-8225 Korea: Shenzhen: Shanghai: Elan Korea Electronics Company, Ltd. Elan Microelectronics Shenzhen, Ltd. ELAN Microelectronics Shanghai, Ltd. 301 Dong-A Building 632 Kojan-Dong, Namdong-ku Incheon City, KOREA Tel: +82 32 814-7730 Fax: +82 32 813-7730 8A Floor, Microprofit Building Gaoxin South Road 6 Shenzhen Hi-tech Industrial Park South Area, Shenzhen CHINA 518057 Tel: +86 755 2601-0565 Fax: +86 755 2601-0500 [email protected] 6F, Ke Yuan Building No. 5 Bibo Road Zhangjiang Hi-Tech Park Shanghai, CHINA 201203 Tel: +86 21 5080-3866 Fax: +86 21 5080-0273 [email protected] Contents Contents 1 General Description .................................................................................................. 1 2 Features ..................................................................................................................... 1 3 Pin Assignment ......................................................................................................... 2 4 Pin Description.......................................................................................................... 3 5 Functional Description ............................................................................................. 4 5.1 Operational Registers......................................................................................... 4 5.1.1 5.1.2 5.1.3 5.1.4 5.1.5 5.1.6 5.1.7 5.1.8 5.2 R0 (Indirect Addressing Register) .......................................................................4 R1 (Timer Clock/Counter) ...................................................................................4 R2 (Program Counter and Stack)........................................................................5 R3 (Status Register)............................................................................................6 R4 (RAM Select Register)...................................................................................7 R5 ~ R6 (Port 5 ~ Port 6) ....................................................................................7 RF (Interrupt Status Register) .............................................................................7 R10 ~ R2F...........................................................................................................7 Special Function Registers................................................................................. 8 5.2.1 5.2.2 5.2.3 5.2.4 5.2.5 5.2.6 5.2.7 5.2.8 A (Accumulator)...................................................................................................8 CONT (Control Register).....................................................................................8 IOC5 ~ IOC6 (I/O Port Control Register) ............................................................9 IOCB (Pull-down Control Register) .....................................................................9 IOCC (Open-drain Control Register)...................................................................9 IOCD (Pull-high Control Register).....................................................................10 IOCE (WDT Control Register)...........................................................................10 IOCF (Interrupt Mask Register)......................................................................... 11 5.3 TCC/WDT and Prescaler.................................................................................. 11 5.4 I/O Ports ........................................................................................................... 12 5.5 Reset and Wake-up.......................................................................................... 15 5.5.1 5.5.2 5.5.3 Reset.................................................................................................................15 Summary of Registers Initialized Values...........................................................17 Status of RST, T, and P of the Status Register..................................................19 5.6 Interrupt ............................................................................................................ 20 5.7 Oscillator .......................................................................................................... 21 5.7.1 5.7.2 5.7.3 5.7.4 5.8 Oscillator Modes ...............................................................................................21 Crystal Oscillator/Ceramic Resonators (Crystal) ..............................................22 External RC Oscillator Mode.............................................................................24 Internal RC Oscillator Mode..............................................................................26 Code Option Register....................................................................................... 26 5.8.1 5.8.2 5.8.3 Code Option Register (Word 0) ........................................................................26 Code Option Register (Word 1) ........................................................................27 Code Option Register (Word 2) ........................................................................28 Product Specification (V1.3) 10.23.2012 • iii Contents 5.9 Power-on Considerations ................................................................................. 29 5.10 Programmable Oscillator Set-up Time ............................................................. 29 5.11 External Power-on Reset Circuits..................................................................... 29 5.12 Residue-Voltage Protection .............................................................................. 30 5.13 Instruction Set .................................................................................................. 31 6 Absolute Maximum Ratings ................................................................................... 34 7 Electrical Characteristics ....................................................................................... 34 8 7.1 DC Characteristics ........................................................................................... 34 7.2 AC Characteristics............................................................................................ 36 7.3 Device Characteristics...................................................................................... 37 Timing Diagrams ..................................................................................................... 58 APPENDIX A Ordering and Manufacturing Information ............................................................. 59 B Package Type........................................................................................................... 60 C Package Information............................................................................................... 61 Specification Revision History Doc. Version 1.0 Revision Description Date Official original Specification 2011/11/22 1. Added Ordering and Manufacturing Information 2. Modified the Instruction Table, not the Instruction Set 1.1 3. Added diagram of Voltage to Frequency Curve in Section 7.3 Device Characteristics 2012/05/28 4. Modified the part number 5. Modified the description about POR and LVR in the Features section 1.2 1.3 iv • 1. Fixed up the part number issues 2012/08/07 2. Added 10-Pin SSOP Package Added diagrams of Temperature relative measurements 2012/10/23 Product Specification (V1.3) 10.23.2012 EM78P153K 8-Bit Microcontroller with OTP ROM 1 General Description The EM78P153K is an 8-bit microprocessor designed and developed with low-power and high-speed CMOS technology. The device has an on-chip 1024×13-bit Electrical One Time Programmable Read Only Memory (OTP-ROM). It provides a protection bit to prevent intrusion of user’s OTP memory code. Fifteen Code option bits are also available to meet user’s requirements. With enhanced OTP-ROM features, the EM78P153K provides a convenient way of developing and verifying user’s programs. Moreover, this OTP device offers the advantages of easy and effective program updates, using development and programming tools. Users can avail of the ELAN Writer to easily program their development code. 2 Features • Crystal mode: CPU configuration • 1k×13 bits on-chip ROM DC ~ 20 MHz / 2clks @ 5V DC ~ 8 MHz / 2clks @ 3V DC ~ 4MHz / 2clks @ 2.1V • 32×8 bits on-chip registers (SRAM, general purpose) • ERC mode: • 5-level stacks for subroutine nesting DC ~ 2 MHz / 2clks @ 2.1V • Less than 1.5 mA at 5V / 4 MHz Peripheral configuration • Typically 15 µA at 3V / 32kHz •8-bit Real Time Clock/Counter (TCC) with selective signal sources, trigger edges, and overflow interrupt • Typically 1 µA during Sleep mode I/O port configuration • 2 bidirectional I/O ports : P5, P6 • Power-on reset and 3 programmable level voltage reset • 12 I/O pins • Wake-up port : P6 POR: 1.8V (Default), LVR: 4.0, 3.5, 2.7V • 6 Programmable pull-down I/O pins • 7 programmable pull-high I/O pins • 2-/ 4 clocks per instruction cycle selected by code option • 7 programmable open-drain I/O pins • High EFT immunity Three available interrupts: • External interrupt : P60 • TCC overflow interrupt Operating voltage range: • 2.1V ~ 5.5V at • Input-port status changed interrupt (wake-up from sleep mode) 0 ~ 70°C (Commercial) • 2.3V ~ 5.5V at -40 ~ 85°C (Industrial) Operating frequency range (base on 2 clocks): • IRC mode: Internal RC Freq. • External interrupt Special features • Programmable free running Watchdog Timer • Power saving sleep mode Drift Rate • Selectable oscillation mode Temp. (-40~85°C) Voltage 4 MHz ± 1% ± 3% @ 2.1~5.5V ± 2% ± 6% 16 MHz ± 1% ± 1% @ 4.0~5.5V ± 2% ± 4% • 14-pin DIP 300mil 8 MHz ± 1% ± 2% @ 3.0~5.5V ± 2% ± 5% • 14-pin SOP 150mil : EM78P153KSO14J 1 MHz ± 1% ± 3% @ 2.1~5.5V ± 2% ± 6% • 10-pin SSOP 150mil : EM78P153KSS10J Process Total • Programmable prescaler of oscillator set-up time Package type: : EM78P153KD14J • 10-pin SSOP 150mil : EM78P153KASS10J Note: These are all green products which do not contain hazardous substances. Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) •1 EM78P153K 8-Bit Microcontroller with OTP ROM 3 Pin Assignment 14-Pin DIP/SOP 1 14 P51 P67 2 13 P52 P66 3 12 P53 Vdd 4 11 Vss P65/OSCI/ERCin 5 10 P60//INT P64/OSCO/RCOUT 6 9 P61 P63//RST 7 8 P62/TCC EM78P153K P50 Figure 3-1 EM78P153KD14J/SO14J 10-Pin SSOP 1 Figure 3-2 EM78P153KSS10J 10-Pin SSOP 2 P66 1 10 P67 VDD 2 9 VSS P65/OSCI/ERCin 3 8 P60//INT P64/OSCO/RCOUT 4 7 P61 P63//RST 5 6 P62/TCC Figure 3-2 EM78P153KASS10J 2• Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM 4 Pin Description Name Function Input Type Output Type Description P53 P53 ST CMOS Bidirectional I/O pin P52 P51 P50 P52 P51 P50 ST CMOS Bidirectional I/O pin with programmable pull-low P67 P66 P67 P66 ST CMOS Bidirectional I/O pin with programmable pullhigh, open-drain and wake-up pin from sleep mode when the pin status changes. P65 ST CMOS Bidirectional I/O pin with programmable pullhigh, open-drain and wake-up pin from sleep mode when the pin status changes. XTAL − ST CMOS − XTAL Clock output of crystal/ resonator oscillator P63 ST − Input pin and wake-up pin from sleep mode when the pin status changes. /RESET ST − Reset Pin, Active Low. P62 ST CMOS TCC ST − P65/OSCI OSCI P64 P64/OSCO OSCO P63//RESET P62/TCC Clock input of crystal/ resonator oscillator Bidirectional I/O pin with programmable pullhigh, open-drain and wake-up pin from sleep mode when the pin status changes. Bidirectional I/O pin with programmable pullhigh, pull-low, open-drain and wake-up pin from sleep mode when the pin status changes. TCC External Input P61 ST CMOS Bidirectional I/O pin with programmable pull-high, pull-low, open-drain and wake-up pin from sleep mode when the pin status changes. P60 ST CMOS Bidirectional I/O pin with programmable pullhigh, pull-low, open-drain and wake-up pin from sleep mode when the pin status changes. /INT ST − External interrupt pin triggered by a falling edge VDD VDD Power − IC Power supply VSS VSS Power − Ground for the IC P61 P60/INT Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) •3 EM78P153K 8-Bit Microcontroller with OTP ROM 5 Functional Description OSCO OSCI /RESET WDT Timer Oscillator/Timing Control TCC /INT ROM Prescaler Built-in OSC Interrupt Controller RAM R4 R2 Stack ALU Instruction Register R3 R1 (TCC) Instruction Decoder ACC DATA and CONTROL BUS IOC6 I/O Port 6 R6 P60 P61 P62/TCC P63//REST P64/OSCO P65/OSCI P66 P67 IOC5 I/O Port 5 R6 P5 P5 0 1 P52 P53 Figure 5-1 EM78P153K Functional Block Diagram 5.1 Operational Registers 5.1.1 R0 (Indirect Addressing Register) R0 is not a physically implemented register. It is used as an indirect addressing pointer. Any instruction using R0 as a pointer actually accesses data pointed by the RAM Select Register (R4). 5.1.2 R1 (Timer Clock/Counter) 4• Incremented by an external signal edge, which is defined by TE bit (CONT-4) through the TCC pin, or by the instruction cycle clock. Writable and readable as any other registers. Defined by resetting PAB (CONT-3). The prescaler is assigned to TCC, if the PAB bit (CONT-3) is reset. The contents of the prescaler counter will be cleared only when the TCC register is written with a value. Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM 5.1.3 R2 (Program Counter and Stack) Depending on the device type, R2 and hardware stack are 10-bit wide. The structure is depicted in the following figure. PC (A9 ~ A0) 000H 008H User Memory Space Stack Level 1 Stack Level 2 Stack Level 3 Stack Level 4 Stack Level 5 Reset Vector Interrupt Vector On-chip Program Memory 3FFH Figure 5-2 Program Counter Organization The configuration structure generates 1024×13 bits on-chip OTP ROM addresses to the relative programming instruction codes. One program page is 1024 words long. R2 is set as all "0" when under RESET condition. "JMP" instruction allows direct loading of the lower 10 program counter bits. Thus, "JMP" allows PC to go to any location within a page. "CALL" instruction loads the lower 10 bits of the PC, and then PC+1 are pushed onto the stack. Thus, the subroutine entry address can be located anywhere within a page. "RET" ("RETLk", "RETI") instruction loads the program counter with the contents of the top-level stack. Any instruction written to R2 (e.g. “ADD R2, A”, "MOV R2, A", "BC R2, 6",⋅⋅⋅) will cause the ninth bit and the tenth bit (A8 ~ A9) of the PC to be cleared. Hence, the computed jump is limited to the first 256 locations of a page. All instructions are single instruction cycle (fclk / 2 or fclk / 4) except for instructions that would change the contents of R2. Such instructions will need one more instruction cycle. Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) •5 EM78P153K 8-Bit Microcontroller with OTP ROM The Data Memory Configuration is as follows: Address 00 R PAGE Registers R0 IOC PAGE Registers (IAR) Reserve 01 R1 (TCC) CONT 02 R2 (PC) Reserve 03 R3 (Status) Reserve 04 R4 (RSR) Reserve 05 R5 (Port 5) IOC5 (I/O Port Control Register) 06 R6 (Port 6) IOC6 (I/O Port Control Register) 07 Reserve Reserve 08 Reserve Reserve 09 Reserve Reserve 0A Reserve Reserve 0B Reserve IOCB (Pull-down Register) 0C Reserve IOCC (Open-drain Control) 0D Reserve IOCD (Pull-high Control Register) 0E Reserve IOCE (WDT Control Register) 0F RF IOCF (Interrupt Mask Register) 10 : 2F (Interrupt Status) (Control Register) General Registers Figure 5-3 Data Memory Configuration 5.1.4 R3 (Status Register) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 RST GP1 GP0 T P Z DC C Bit 7 (RST): Bit for reset type 0: Set to “0“ if the device wakes up from other reset type 1: Set to “1“ if the device wakes up from sleep mode on a pin change Bits 6 ~ 5 (GP1 ~ GP0): General-purpose read/write bits Bit 4 (T): Time-out bit Set to “1” with the "SLEP" and "WDTC" commands, or during power up; and reset to “0” by WDT time-out. Bit 3 (P): Power down bit Set to “1” during power on or by a "WDTC" command; and reset to “0” by a "SLEP" command. Bit 2 (Z): Zero flag Set to "1" if the result of an arithmetic or logic operation is zero. Bit 1 (DC): Auxiliary carry flag Bit 0 (C): Carry flag 6• Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM 5.1.5 R4 (RAM Select Register) Bits 7 ~ 6 are not used (Read only). Bits 7 ~ 6 set to “1” at all time. Bits 5 ~ 0 are used to select registers (Address: 0x00 ~ 0x06, 0x0F ~ 0x2F) in indirect addressing mode. See the Data Memory Configuration in Figure 5-3. 5.1.6 R5 ~ R6 (Port 5 ~ Port 6) R5 and R6 are I/O registers. Only the lower 4 bits of R5 are available. The upper 4 bits of R5 are fixed to “0”. P63 is input only. 5.1.7 RF (Interrupt Status Register) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 - - - - - EXIF ICIF TCIF Note: “1“ means with interrupt request Bits 7 ~ 3: “0“ means no interrupt occurs Not used. Set to “0” at all time. Bit 2 (EXIF): External Interrupt Flag. Set by a falling edge on the /INT pin, reset by software. Bit 1 (ICIF): Port 6 input status change interrupt flag. Set when Port 6 input changes, reset by software. Bit 0 (TCIF): TCC Overflow Interrupt Flag. Set when TCC overflows, reset by software. RF can be cleared by instruction but cannot be set. IOCF is the interrupt mask register. NOTE The result of reading RF is the "logic AND" of RF and IOCF. 5.1.8 R10 ~ R2F These are all 8-bit general-purpose registers. Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) •7 EM78P153K 8-Bit Microcontroller with OTP ROM 5.2 Special Function Registers 5.2.1 A (Accumulator) Internal data transfer operation, or instruction operand holding usually involves the temporary storage function of the Accumulator, which is not an addressable register. 5.2.2 CONT (Control Register) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 GP /INT TS TE PAB PSR2 PSR1 PSR0 Bit 7 (GP): General purpose register Bit 6 (/INT): Interrupt Enable flag 0: Masked by DISI or hardware interrupt 1: Enabled by ENI/RETI instructions Bit 5 (TS): TCC signal source 0: Internal instruction cycle clock, P62 is a bidirectional I/O pin 1: Transition on the TCC pin Bit 4 (TE): TCC Signal Edge 0: Increment if the transition from low to high takes place on the TCC pin 1: Increment if the transition from high to low takes place on the TCC pin Bit 3 (PAB): Prescaler Assigned Bit 0: TCC 1: WDT Bits 2 ~ 0 (PSR2 ~ PSR0): TCC / WDT prescaler bits PSR2 PSR1 PSR0 TCC Rate WDT Rate 0 0 0 1:2 1:1 0 0 1 1:4 1:2 0 1 0 1:8 1:4 0 1 1 1:16 1:8 1 0 0 1:32 1:16 1 0 1 1:64 1:32 1 1 0 1:128 1:64 1 1 1 1:256 1:128 The CONT register is both readable and writable. 8• Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM 5.2.3 IOC5 ~ IOC6 (I/O Port Control Register) 0: Defines the relative I/O pin as output 1: Puts the relative I/O pin into high impedance Only the lower 4 bits of IOC5 are available to be defined. IOC5 and IOC6 registers are both readable and writable. 5.2.4 IOCB (Pull-down Control Register) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 - /PD62 /PD61 /PD60 - /PD52 /PD51 /PD50 Bit 7: Not used. Set to “1” at all time. 0: Enable internal pull-down 1: Disable internal pull-down Bit 6 (/PD62): Control bit used to enable pull-down of the P62 pin. Bit 5 (/PD61): Control bit used to enable pull-down of the P61 pin. Bit 4 (/PD60): Control bit used to enable pull-down of the P60 pin. Bit 3: Not used. Set to “1” at all time. Bit 2 (/PD52): Control bit used to enable pull-down of the P52 pin. Bit 1 (/PD51): Control bit used to enable pull-down of the P51 pin. Bit 0 (/PD50): Control bit used to enable pull-down of the P50 pin. The IOCB Register is both readable and writable. 5.2.5 IOCC (Open-drain Control Register) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 OD67 OD66 OD65 OD64 - OD62 OD61 OD60 Bit 7 (OD67): Control bit used to enable open-drain of the P67 pin. 0: Disable open-drain output 1: Enable open-drain output Bit 6 (OD66): Control bit used to enable open-drain of the P66 pin. Bit 5 (OD65): Control bit used to enable open-drain of the P65 pin. Bit 4 (OD64): Control bit used to enable open-drain of the P64 pin. Bit 3: Not used. Set to “0” at all time. Bit 2 (OD62): Control bit used to enable open-drain of the P62 pin. Bit 1 (OD61): Control bit used to enable open-drain of the P61 pin. Bit 0 (OD60): Control bit used to enable open-drain of the P60 pin. The IOCC Register is both readable and writable. Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) •9 EM78P153K 8-Bit Microcontroller with OTP ROM 5.2.6 IOCD (Pull-high Control Register) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 /PH67 /PH66 /PH65 /PH64 - /PH62 /PH61 /PH60 Bit 7 (/PH67): Control bit is used to enable pull-high of the P67 pin. 0: Enable internal pull-high 1: Disable internal pull-high Bit 6 (/PH66): Control bit used to enable pull-high of the P66 pin. Bit 5 (/PH65): Control bit used to enable pull-high of the P65 pin. Bit 4 (/PH64): Control bit used to enable pull-high of the P64 pin. Bit 3: Not used. Set to “1” at all time. Bit 2 (/PH62): Control bit used to enable pull-high of the P62 pin. Bit 1 (/PH61): Control bit used to enable pull-high of the P61 pin. Bit 0 (/PH60): Control bit used to enable pull-high of the P60 pin. The IOCD Register is both readable and writable. 5.2.7 IOCE (WDT Control Register) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 WDTE EIS - - - - - - Bit 7 (WDTE): Control bit used to enable the Watchdog timer. 0: Disable WDT 1: Enable WDT WDTE is both readable and writable. Bit 6 (EIS): Control bit is used to define the function of P60 (/INT) pin. 0: P60, bidirectional I/O pin. 1: /INT, external interrupt pin. In this case, the I/O control bit of P60 (Bit 0 of IOC6) must be set to "1." When EIS is "0," the path of /INT is masked. When EIS is "1," the status of /INT pin can also be read by way of reading Port 6 (R6). See Figure 5-6 under Section 5.4 for reference. EIS is both readable and writable. Bits 5 ~ 0: Not used. Set to “0” at all time. 10 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM 5.2.8 IOCF (Interrupt Mask Register) Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 - - - - - EXIE ICIE TCIE Bits 7 ~ 3: Not used. Set to “1” at all time. Individual interrupt is enabled by setting its associated control bit in the IOCF to "1". Global interrupt is enabled by the ENI instruction and is disabled by the DISI instruction. Bit 2 (EXIE): EXIF interrupt enable bit 0: Disable EXIF interrupt 1: Enable EXIF interrupt Bit 1 (ICIE): ICIF interrupt enable bit 0: Disable ICIF interrupt 1: Enable ICIF interrupt Bit 0 (TCIE): TCIF interrupt enable bit 0: Disable TCIF interrupt 1: Enable TCIF interrupt The IOCF register is both readable and writable. 5.3 TCC/WDT and Prescaler There is an 8-bit counter available as prescaler for the TCC or WDT. The prescaler is available for the TCC only or the WDT only and the PAB bit of the CONT register is used to determine the prescaler assignment. The PSR0~PSR2 bits determine the ratio. The prescaler is cleared each time the instruction is written to TCC under TCC mode. The WDT and prescaler, when assigned to WDT mode, are cleared by the “WDTC” or “SLEP” instructions. Figure 5-4 depicts the circuit diagram of TCC / WDT. R1 (TCC) is an 8-bit timer / counter. The TCC clock source can be internal or external clock input (edge selectable from TCC pin). If the TCC signal source is from an internal clock, TCC will be incremented by 1 at every instruction cycle (without prescaler). Referring to Figure 5-4, CLK=Fosc / 2 or CLK=Fosc / 4, depends on the Code Option bit CLK. CLK=Fosc / 2 is used if CLK bit is "0", and CLK=Fosc / 4 is used if CLK bit is "1". If the TCC signal source is from an external clock input, TCC is incremented by "1" at every falling edge or rising edge of the TCC pin. Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 11 EM78P153K 8-Bit Microcontroller with OTP ROM The Watchdog Timer is a free running on-chip RC oscillator. The WDT will keep running even when the oscillator driver has been turned off (i.e. in sleep mode). During normal operation or sleep mode, a WDT time-out (if enabled) will cause the device to reset. The WDT can be enabled or disabled any time during normal mode by software programming. Refer to WDTE bit of the IOCE register. Without prescaler, the WDT time-out period is approximately 18 ms 1 (default). Data Bus CLK (Fosc/2 or Fosc/4) 0 1 M U X TCC Pin 0 1 TE TS 0 WDT M U X M U X SYNC 2 cycles PAB TCC (R1) TCC Overflow Interrupt 8-bit Counter 1 PSR0~PSR2 8-to-1 MUX PAB WDTE (in IOCE) 0 1 MUX PAB WDT Time Out Figure 5-4 TCC and WDT Block Diagram 5.4 I/O Ports The I/O registers, both Port 5 and Port 6, are bidirectional tri-state I/O ports. Port 6 can be pulled-high internally by software except P63. In addition, Port 6 can also have open-drain output by software except P63. Input status changed interrupt (or wake-up) function is available from Port 6. P50 ~ P52 and P60 ~ P62 pins can be pulled-down by software. Each I/O pin can be defined as "input" or "output" pin by the I/O control register (IOC5 ~ IOC6) except P63. The I/O registers and I/O control registers are both readable and writable. The I/O interface circuits for Port 5 and Port 6 are shown in Figure 5-5 ~ Figure 5-7 respectively. 1 12 • Vdd = 5V, set up time period = 16.5ms ± 30% at 25°C Vdd = 3V, set up time period = 18ms ± 30% at 25°C Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM PCRD P R Q _ Q Port C L Q P R _ Q C L D PCWR CLK IOD D CLK PDWR PDRD 0 M U X 1 Note: Pull-down is not shown in the figure. Figure 5-5 I/O Port and I/O Control Register Circuit for Port 5 PCRD Q P RD _ CLK Q C L Q P R D _ CLK Q C L Port Bit 6 of IOCE 0 1 D P R Q CLK _ C Q L PCWR IOD PDWR M U X PDRD T10 P D R Q CLK _ C Q L Note: Pull-high (down) and open-drain are not shown in the figure. Figure 5-6 I/O Port and I/O Control Register Circuit for P60 (/INT) Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 13 EM78P153K 8-Bit Microcontroller with OTP ROM PORT 0 1 Q _ Q P R D CLK C L PCWR Q _ Q P R D CLK C L PDWR IOD M U X TIN PDRD P R CLK C L D Q _ Q Note: Pull-high (down) and open-drain are not shown in the figure. Figure 5-7 I/O Port and I/O Control Register Circuit for P61~P67 ICIE D P R Q Interrupt CLK _ C Q L ICIF ENI Instruction P D R P60 P61 P62 P63 Q CLK _ C Q L P64 P65 P66 P67 P Q R D CLK _ Q C L DISI Instruction /SLEP Interrupt (Wake-up from SLEEP) Next Instruction (Wake-up from SLEEP) Figure 5-8 Block Diagram of I/O Port 6 with input change interrupt/wake-up 14 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM Table 5-1 Usage of Port 6 Input Change Wake-up / Interrupt Function Usage of Port 6 Input Status Change Wake-up/Interrupt (I) Wake-up from Port 6 Input Status Change (II) Port 6 Input Status Change Interrupt (a) Before Sleep 1. Read I/O Port 6 (MOV R6,R6) 1. Disable WDT 2. Execute “ENI” 2. Read I/O Port 6 (MOV R6,R6) 3. Enable interrupt (Set IOCF.1) 3. Execute "ENI" or "DISI" 4. IF Port 6 change (interrupt) 4. Enable interrupt (Set IOCF.1) → Interrupt vector (008H) 5. Execute "SLEP" instruction (b) After Wake-up 1. IF "ENI" → Interrupt vector (008H) 2. IF "DISI" → Next instruction 5.5 Reset and Wake-up 5.5.1 Reset A Reset is initiated by one of the following events: 1) Power-on reset 2) /RESET pin input "low" 3) WDT time-out (if enabled) 4) Low Voltage Reset 2 The device is kept under reset condition for a period of approximately 18ms (one oscillator start-up timer period) after a reset is detected. Once a Reset occurs, the following functions are performed: The oscillator is running, or will be started. The Program Counter (R2) is set to all "0." All I/O port pins are configured as input mode (high-impedance state) The Watchdog timer and prescaler are cleared. When power is switched on, the upper 3 bits of R3 are cleared. The bits of the CONT register are set to all "1" except for Bit 6 (INT flag). The bits of the IOCB register are set to all "1." The IOCC register is cleared. The bits of the IOCD register are set to all "1." Bit 7 of the IOCE register is set to "1," and Bits 4 and 6 are cleared. Bits 0 ~ 2 of RF and Bits 0 ~ 2 of IOCF registers are cleared. 2 Vdd = 5V, set up time period = 16.8ms ± 30% Vdd = 3V, set up time period = 18ms ± 30% Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 15 EM78P153K 8-Bit Microcontroller with OTP ROM Sleep (power down) mode is asserted by executing the “SLEP” instruction. While entering Sleep mode, WDT (if enabled) is cleared but keeps on running. The controller can be awakened by: 1) External reset input on /RESET pin 2) WDT time-out (if enabled) 3) Port 6 Input Status changed (if enabled) The first two cases will cause the EM78P153K to reset. The T and P flags of R3 are used to determine the source of the reset (wake-up). The last case is considered a continuation of program execution and the global interrupt ("ENI" or "DISI" being executed) determines whether or not the controller branches to the interrupt vector following a wake-up. If ENI is executed before SLEP, the instruction will begin to execute from Address 008H after wake-up. If DISI is executed before SLEP, the operation will restart from the succeeding instruction right next to SLEP after a wake-up. Only one of Cases 2 and 3 can be enabled before going into the Sleep mode. That is, [a] If Port 6 Input Status Change Interrupt is enabled before SLEP, WDT must be disabled by software. Hence, the EM78P153K can be awakened only by Case 1 or Case 3. [b] If WDT is enabled before SLEP, Port 6 Input Status Change Interrupt must be disabled. Hence, the EM78P153K can be awakened only by Case 1 or Case 2. For further details, refer to Section 5.6, Interrupt. If Port 6 Input Status Change Interrupt is used to wake-up the EM78P153K (Case [a] above), the following instructions must be executed before SLEP: MOV A, @xxxx1110b CONTW WDTC MOV A, @0xxxxxxxb IOW RE MOV R6, R6 MOV A, @00000x1xb IOW RF ENI (or DISI) SLEP 16 • ; Select the WDT prescaler, it must be ; set over 1:1 ; Clear WDT and prescaler ; Disable WDT ; Read Port 6 ; Enable Port 6 input change interrupt ; Enable (or disable) global interrupt ; Sleep Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM NOTE 1. After waking up from sleep mode, WDT is automatically enabled. The WDT enable / disable operation after waking up from sleep mode should be appropriately defined in the software. 2. To avoid a reset from occurring when the Port 6 Input Status Changed Interrupt enters into interrupt vector or is used to wake-up the MCU, the WDT prescaler must be set above the 1:1 ratio. 5.5.2 Summary of Registers Initialized Values Address 0×00 0×01 0×02 Name R0 (IAR) R1 (TCC) R2 (PC) Reset Type 0×04 0×05 R4 (RSR) P5 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit Name - - - - - - - - U U U U U U U U /RESET and WDT P P P P P P P P Wake-up from Pin Change P P P P P P P P Bit Name - - - - - - - - Power-on 0 0 0 0 0 0 0 0 /RESET and WDT 0 0 0 0 0 0 0 0 Wake-up from Pin Change P P P P P P P P Bit Name - - - - - - - - Power-on 0 0 0 0 0 0 0 0 /RESET and WDT 0 0 0 0 0 0 0 0 Bit Name R3 (SR) Bit 6 Power-on Wake-up from Pin Change 0×03 Bit 7 Jump to Address 0x08 or continue to execute next instruction RST GP1 GP0 T P Z DC C Power-on 0 0 0 1 1 U U U /RESET and WDT 0 0 0 * * P P P Wake-up from Pin Change 1 P P * * P P P Bit Name GP1 GP0 - - - - - - Power-on U U U U U U U U /RESET and WDT P P P P P P P P Wake-up from Pin Change P P P P P P P P Bit Name × × × × P53 P52 P51 P50 Power-on 1 1 1 1 1 1 1 1 /RESET and WDT P P P P P P P P Wake-up from Pin Change P P P P P P P P Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 17 EM78P153K 8-Bit Microcontroller with OTP ROM Address 0×06 0×0F N/A 0×05 0×06 0×0B 0×0C Name P6 RF (ISR) CONT IOC5 IOC6 IOCB IOCC Reset Type Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit Name P67 P66 P65 P64 P63 P62 P61 P60 Power-on 1 1 1 1 1 1 1 1 /RESET and WDT P P P P P P P P Wake-up from Pin Change P P P P P P P P Bit Name × × × × × EXIF ICIF TCIF Power-on 0 0 0 0 0 0 0 0 /RESET and WDT 0 0 0 0 0 0 0 0 Wake-up from Pin Change 0 0 0 0 0 P N P Bit Name × /INT TS TE PAB PSR2 PSR1 PSR0 Power-on 1 0 1 1 1 1 1 1 /RESET and WDT 1 0 1 1 1 1 1 1 Wake-up from Pin Change P 0 P P P P P P Bit Name × × × × C53 C52 C51 C50 Power-on 0 0 0 0 1 1 1 1 /RESET and WDT 0 0 0 0 1 1 1 1 Wake-up from Pin Change 0 0 0 0 P P P P Bit Name C67 C66 C65 C64 C63 C62 C61 C60 Power-on 1 1 1 1 1 1 1 1 /RESET and WDT 1 1 1 1 1 1 1 1 Wake-up from Pin Change P P P P P P P P Bit Name × Power-on 1 1 1 1 1 1 1 1 /RESET and WDT 1 1 1 1 1 1 1 1 Wake-up from Pin Change P P P P P P P P Bit Name OD67 OD66 OD65 OD64 × OD62 OD61 OD60 Power-on 0 0 0 0 0 0 0 0 /RESET and WDT 0 0 0 0 0 0 0 0 Wake-up from Pin Change P P P P P P P P Bit Name 0×0D 18 • IOCD /PD66 /PD65 /PD64 /PH67 /PH66 /PH65 /PH64 x × /PD52 /PD51 /PD50 /PH62 /PH61 /PH60 Power-on 1 1 1 1 1 1 1 1 /RESET and WDT 1 1 1 1 1 1 1 1 Wake-up from Pin Change P P P P P P P P Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM Address 0×0E 0×0F 0×10~ 0×2F Name IOCE IOCF R10~R2F Reset Type Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit Name WDTE EIS × × × × × × Power-on 1 0 1 1 1 1 1 1 /RESET and WDT 1 0 1 1 1 1 1 1 Wake-up from Pin Change 1 P 1 1 1 1 1 1 Bit Name × × × × × EXIE ICIE TCIE Power-on 1 1 1 1 1 0 0 0 /RESET and WDT 1 1 1 1 1 0 0 0 Wake-up from Pin Change 1 1 1 1 1 P P P Bit Name - - - - - - - - Power-on U U U U U U U U /RESET and WDT P P P P P P P P Wake-up from Pin Change P P P P P P P P Legend: ×: Not used U: Unknown or don’t care P: Previous value before reset * Refer to the tables provided in the next section (Section 5.5.3). 5.5.3 Status of RST, T, and P of the Status Register A Reset condition is initiated by the following events 1) A power-on condition 2) A high-low-high pulse on /RESET pin 3) Watchdog timer time-out The values of T and P listed in the table below are used to check how the processor wakes up. Table 5-2 Values of RST, T, and P after a Reset Reset Type RST T P Power on 0 1 1 /RESET during Operation mode 0 *P *P /RESET wake-up during Sleep mode 0 1 0 WDT during Operation mode 0 0 *P WDT wake-up during Sleep mode 0 0 0 Wake-up on pin change during Sleep mode 1 1 0 * P: Previous status before reset Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 19 EM78P153K 8-Bit Microcontroller with OTP ROM The following table shows the events that may affect the status of T and P. Table 5-3 Status of T and P Being Affected by Events Event RST T P Power on 0 1 1 WDTC instruction *P 1 1 WDT time-out 0 0 *P SLEP instruction *P 1 0 Wake-up on pin change during Sleep mode 1 1 0 * P: Previous status before reset VDD D Q CLK CLR Oscillator CLK Power-on Reset Voltage Detector W DTE W DT W DT Timeout Setup Time RESET /RESET Figure 5-9 Controller Reset Block Diagram 5.6 Interrupt The EM78P153K has three falling-edge interrupts as listed herewith: 1) TCC overflow interrupt 2) Port 6 Input Status Change Interrupt 3) External interrupt [(P60, /INT) pin] Before the Port 6 Input Status Changed Interrupt is enabled, reading Port 6 (e.g. "MOV R6, R6") is necessary. Each pin of Port 6 will have this feature if its status changes. Any pin configured as output or P60 pin configured as /INT is excluded from this function. The Port 6 Input Status Changed Interrupt can wake up the EM78P153K from Sleep mode if Port 6 is enabled prior to going into Sleep mode by executing SLEP instruction. When the chip wakes-up, the controller will continue to execute the program in-line if the global interrupt is disabled. If the global interrupt is enabled, it will branch to the interrupt Vector 008H. 20 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM RF is the interrupt status register that records the interrupt requests in the relative flags / bits. IOCF is an interrupt mask register. The global interrupt is enabled by the ENI instruction and is disabled by the DISI instruction. When one of the interrupts (enabled) occurs, the next instruction will be fetched from Address 008H. Once in the interrupt service routine, the source of an interrupt can be determined by polling the flag bits in RF. The interrupt flag bit must be cleared by instructions before leaving the interrupt service routine before interrupts are enabled to avoid recursive interrupts. The flag (except ICIF bit) in the Interrupt Status Register (RF) is set regardless of the status of its mask bit or the execution of ENI. Note that the outcome of RF will be the logic AND of RF and IOCF (refer to Figure 5-10). The RETI instruction ends the interrupt routine and enables the global interrupt (the execution of ENI). When an interrupt is generated by the INT instruction (enabled), the next instruction will be fetched from Address 001H. VCC P D R CLK C L RF /IR Q n IR Q n Q _ Q RFRD IN T IR Q m E N I/D IS I IO C F /R E S E T Q _ Q P D R CLK C L IO D IO C F W R IO C F R D RFW R Figure 5-10 Interrupt Input Circuit 5.7 Oscillator 5.7.1 Oscillator Modes The EM78P153K can be operated in four different oscillator modes, such as External RC oscillator mode (ERC), Internal RC oscillator mode (IRC), High Crystal oscillator mode (XT, HXT1/2), and Low Crystal oscillator mode (LXT1/2). The desired mode can be selected by programming OSC3 ~ OSC0 in the Code Option register. Table 5-4 describes how these four oscillator modes are defined. Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 21 EM78P153K 8-Bit Microcontroller with OTP ROM Table 5-4 Oscillator Modes Defined by OSC Oscillator Modes OSC3 OSC2 OSC1 OSC0 1 0 0 0 0 1 0 0 0 1 0 0 1 0 ERC (External RC oscillator mode); P64/RCOUT act as P64 ERC (External RC oscillator mode); P64/RCOUT act as RCOUT 2 IRC (Internal RC oscillator mode); P64/RCOUT act as P64 2 IRC (Internal RC oscillator mode); P64/RCOUT act as RCOUT 0 0 1 1 3 0 1 0 0 3 0 1 0 1 3 0 1 1 0 3 HXT2 (Frequency range of HXT2 mode is 12 MHz ~ 6 MHz) 0 1 1 1 XT (Frequency range of XT mode is 6 MHz~1 MHz) (default) 1 1 1 1 LXT1 (Frequency range of LXT1 mode is 1 MHz ~ 100kHz) HXT1 (Frequency range of HXT1 mode is 20 MHz ~ 12 MHz) LXT2 (Frequency range of LXT2 mode is 32.768kHz) 1 In ERC mode, ERCin is used as oscillator pin. RCOUT/P64 is defined by code option Word 1 Bit 4 ~ Bit 1. 2 In IRC mode, P64 is normal I/O pin. RCOUT/P64 is defined by code option Word 1 Bit 4 ~ Bit 1. 3 In LXT1, LXT2, HXT1, HXT2 and XT modes; OSCI and OSCO are used as oscillator pins. These pins cannot and should not be defined as normal I/O pins. The maximum operational frequency of the crystal/resonator under different VDD is listed below. Table 5-5 Summary of Maximum Operating Speeds Conditions Two cycles with two clocks VDD Max Freq. (MHz) 2.1 4.0 3.0 8.0 5.0 20.0 5.7.2 Crystal Oscillator/Ceramic Resonators (Crystal) The EM78P153K can be driven by an external clock signal through the OSCI pin as shown in the following figure. OSCI Ext. Clock OSCO EM78P153K Figure 5-11 Circuit for External Clock Input 22 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM In most applications, pin OSCI and pin OSCO can be connected with a crystal or ceramic resonator to generate oscillation. Figure 5-12 depicts such a circuit. The same thing applies whether it is in the HXT mode or in the LXT mode. In Figure 5-12-1, when the connected resonator in OSCI and OSCO is used in applications, the 1 MΩ R1 needs to be shunted with a resonator. C1 OSCI EM78P153K Crystal OSCO RS C2 Figure 5-12 Circuit for Crystal/Resonator C1 OSCI Resonator EM78P153K R1 OSCO C2 Figure 5-12-1 Circuit for Crystal/Resonator Table 5-6 provides the recommended values of C1 and C2. Since each resonator has its own attribute, refer to its specification for appropriate values of C1 and C2. A serial resistor RS, may be necessary for AT strip cut crystal or low frequency mode. Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 23 EM78P153K 8-Bit Microcontroller with OTP ROM Table 5-6 Capacitor Selection Guide for Crystal Oscillator or Ceramic Resonator Oscillator Type Frequency Mode C1 (pF) C2 (pF) 100kHz 60pF 60pF LXT1 200kHz 60pF 60pF (100k ~ 1 MHz) 455kHz 40pF 40pF 1 MHz 30pF 30pF 1.0 MHz 30pF 30pF 2.0 MHz 30pF 30pF 4.0 MHz 20pF 20pF 32.768kHz 40pF 40pF 100kHz 60pF 60pF LXT1 200kHz 60pF 60pF (100k ~ 1 MHz) 455kHz 40pF 40pF 1 MHz 30pF 30pF 455kHz 30pF 30pF 1.0 MHz 30pF 30pF 2.0 MHz 30pF 30pF 4.0 MHz 20pF 20pF 6.0 MHz 30pF 30pF 6.0 MHz 30pF 30pF HXT2 8.0 MHz 20pF 20pF (6 ~ 12 MHz) 10.0 MHz 30pF 30pF 12.0 MHz 30pF 30pF 12.0 MHz 30pF 30pF 16.0 MHz 20pF 20pF 20.0 MHz 15pF 15pF Ceramic Resonators XT (1M ~ 6 MHz) LXT2 (32.768kHz) XT (1 ~ 6 MHz) Crystal Oscillator HXT1 (12 ~ 20 MHz) Frequency 5.7.3 External RC Oscillator Mode For some applications that do not require a very precise timing calculation, the RC oscillator (Figure 5-13) offers a cost-effective oscillator configuration. Nevertheless, it should be noted that the frequency of the RC oscillator is influenced by the supply voltage, the values of the resistor (Rext), the capacitor (Cext), and even by the operation temperature. Moreover, the frequency also changes slightly from one chip to another due to manufacturing process variations. In order to maintain a stable system frequency, the values of the Cext should not be lesser than 20pF, and the value of Rext should not be greater than 1 MΩ. If they cannot be kept in this range, the frequency can be easily affected by noise, humidity, and leakage. 24 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM The smaller the Rext in the RC oscillator is, the faster its frequency will be. On the contrary, for very low Rext values, for instance, 1 kΩ, the oscillator becomes unstable because the NMOS cannot correctly discharge the current of the capacitance. Based on the above reasons, it must be kept in mind that all of the supply voltage, the operation temperature, the components of the RC oscillator, the package types, the way the PCB is laid out, will affect the system frequency. Vcc Rext OSCI Cext EM78P153K Figure 5-13 External RC Oscillator Mode Circuit Table 5-7 RC Oscillator Frequencies Cext 20pF 100pF 300pF Rext Average Fosc 5V, 25°C Average Fosc 3V, 25°C 3.3k 2.064 MHz 1.901 MHz 5.1k 1.403 MHz 1.316 MHz 10k 750kHz 719.7kHz 100k 81.45kHz 81.33kHz 3.3k 647.3kHz 615.1 MHz 5.1k 430.8kHz 414.3kHz 10k 225.8kHz 219.8kHz 100k 23.88kHz 23.96kHz 3.3k 256.6kHz 245.3kHz 5.1k 169.5kHz 163.0kHz 10k 88.53kHz 86.14kHz 100k 9.283kHz 9.255kHz Note: 1: These are measured in DIP packages 2. The values are for design reference only 3. The frequency drift is ± 30% Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 25 EM78P153K 8-Bit Microcontroller with OTP ROM 5.7.4 Internal RC Oscillator Mode EM78P153K offers a versatile internal RC mode with default frequency value of 4 MHz. The Internal RC oscillator mode has other frequencies (1 MHz, 8 MHz and 16 MHz) that can be set by Code Option (Word 1), RCM1, and RCM0. All these four main frequencies can be calibrated by programming the Option Bits C0 ~ C4. The table below describes the EM78P153K internal RC drift with variation of voltage, temperature, and process. Table 5-8 Internal RC Drift Rate (Ta=25°C, VDD=5V, VSS=0V) Drift Rate Internal RC Frequency Temperature (-40°C~85°C) Voltage Process Total 4 MHz ± 1% ± 3% @ 2.1V ~ 5.5V ± 2% ± 6% 16 MHz ± 1% ± 1% @ 4.0V ~ 5.5V ± 2% ± 4% 8 MHz ± 1% ± 2% @ 3.0V ~ 5.5V ± 2% ± 5% 1 MHz ± 1% ± 3% @ 2.1V ~ 5.5V ± 2% ± 6% Note: These are theoretical values provided for reference only. Actual values may vary depending on the actual process. 5.8 Code Option Register The EM78P153K has a Code Option word that is not part of the normal program memory. The option bits cannot be accessed during normal program execution. Code Option Register and Customer ID Register Arrangement Distribution: Word 0 Word 1 Word 2 Bit 12 ~ Bit 0 Bit 12 ~ Bit 0 Bit 12 ~ Bit 0 5.8.1 Code Option Register (Word 0) Word 0 Bit Bit 12 Bit 11 Mnemonic RESETEN ENWDT Bit 10 Bit 9 Bit 8 Bit 7 CLKS LVR1 LVR0 − Bit 6 Bit 5 Bit 4 Bit 3 Bit 2~0 WDTPS1 WDTPS0 ID10 ID9 Protect 1 Disable Disable 4 clocks High High − High High High High Disable 0 Enable Enable 2 clocks Low Low − Low Low Low Low Enable Bit 12 (RESETEN): Define Pin 63 as a reset pin 0: /RESET enable 1: /RESET disable Bit 11 (ENWDT): Watchdog timer enable bit 0: Enable 1: Disable 26 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM Bit 10 (CLKS): Instruction period option bit. 0: Two oscillator periods 1: Four oscillator periods Refer to the Instruction Set section. Bits 9 ~ 8 (LVR1 ~ LVR0): Low Voltage Reset control bits LVR1, LVR0 VDD Reset Level VDD Release Level 11 NA (Power-on Reset) (default) 10 2.7V 2.9V 01 3.5V 3.7V 00 4.0V 4.0V Bit 7: Not used. Set to “1” at all time. Bits 6 ~ 5 (WDTPS1 ~ WDTPS0): WDT Time-out Period of device bits. Table 5-9 WDT Time-out Period of Device Programming WDTPS1 WDTPS0 *WDT Time-out Period 1 1 18 ms 1 0 4.5 ms 0 1 288 ms 0 0 72 ms * These are theoretical values, provided for reference only Bits 4 ~ 3: Bit 10 and 9 of Customer’s ID code Bits 2 ~ 0 (Protect): Protect Bits. Each protect status is as follows: Protect Bits Protect 0 Enable 1 Disable (Default) 5.8.2 Code Option Register (Word 1) Word 1 Bit Bit 12 Bit 11 Bit 10 Bit 9 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Mnemonic − C4 1 − High High High High High High High High High High High − 0 − Low Low Low Low Low Low Low Low − C3 C2 Low C1 Low C0 Low RCM1 RCM0 OSC3 OSC2 OSC1 OSC0 − Bit 12: Not used. Set to “1” at all time. Bits 11 ~ 7 (C4 ~ C0): Internal RC mode Calibration bits. These bits must always be set to “1” only (auto calibration). Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 27 EM78P153K 8-Bit Microcontroller with OTP ROM Bits 6 ~ 5 (RCM1, RCM0): RC mode selection bits RCM 1 RCM 0 *Frequency (MHz) 1 1 4 1 0 16 0 1 8 0 0 1 * Theoretical values, for reference only Bits 4 ~ 1 (OSC3, OSC2, OSC1 and OSC0): Oscillator Mode Select bits Oscillator Modes OSC3 OSC2 OSC1 OSC0 1 0 0 0 0 1 0 0 0 1 0 0 1 0 ERC (External RC oscillator mode); P64/RCOUT act as P64 ERC (External RC oscillator mode); P64/RCOUT act as RCOUT 2 IRC (Internal RC oscillator mode); P64/RCOUT act as P64 2 IRC (Internal RC oscillator mode); P64/RCOUT act as RCOUT 0 0 1 1 3 0 1 0 0 3 0 1 0 1 3 0 1 1 0 3 HXT2 (Frequency range of HXT2 mode is 12 MHz~6 MHz) 0 1 1 1 XT (Frequency range of XT mode is 6 MHz~1 MHz) (default) 1 1 1 1 LXT1 (Frequency range of LXT1 mode is 1 MHz~100 kHz) HXT1 (Frequency range of HXT1 mode is 20 MHz~12 MHz) LXT2 (Frequency range of LXT2 mode is 32.768 kHz) 1 In ERC mode, ERCin is used as oscillator pin. RCOUT/P64 is defined by Code Option Word 1 Bit 4 ~ Bit 1. 2 In IRC mode, P64 is normal I/O pin. RCOUT/P64 is defined by Code Option Word 1 Bit 4 ~ Bit 1. 3 In LXT1, LXT2, HXT1, HXT2 and XT modes; OSCI and OSCO are used as oscillator pins. These pins cannot and should not be defined as normal I/O pins. Bit 0: Not used. Set to “1” at all time. 5.8.3 Code Option Register (Word 2) Word 2 Bit Bit 12 Bit 11 Bit 10 Bit 9 Mnemonic ID12 Bit 8 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 ID11 − − ID8 ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0 1 High High − − High High High High High High High High High 0 Low Low − − Low Low Low Low Low Low Low Low Low Bits 12 ~ 11: Bit 12 and Bit 11 of the Customer’s ID code Bits 10 ~ 9: Not used. Set to “1” at all time. Bits 8 ~ 0: Bits 8 ~ 0 of the Customer’s ID code 28 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM 5.9 Power-on Considerations Any microcontroller is not guaranteed to start to operate properly before the power supply stabilizes at its steady state. Under customer application, when power is OFF, Vdd must drop to below 1.8V and remains OFF for 10 µs before power can be switched ON again. This way, the EM78P153K will reset and operate normally. The extra external reset circuit will work well if Vdd can rise at a very fast speed (50 ms or less). However, under most cases where critical applications are involved, extra devices are required to assist in solving the power-up problems. 5.10 Programmable Oscillator Set-up Time The Option word contains SUT0 and SUT1 which can be used to define the oscillator set-up time. Theoretically, the range is from 4.5 ms to 72 ms. For most of crystal or ceramic resonators, the lower the operation frequency, the longer the Set-up time may be required. Table 12 describes the values of the Oscillator Set-up Time. 5.11 External Power-on Reset Circuits The circuitry in the figure implements an external RC to produce the reset pulse. The pulse width (time constant) should be kept long enough for Vdd to reach minimum operation voltage. This circuit is used when the power supply has a slow rise time. Vdd R /RESET D EM78P153K Rin C Figure 5-14 External Power-up Reset Circuit Since the current leakage from the /RESET pin is ± 5 μA, it is recommended that R should not be greater than 40K. In this way, the /RESET pin voltage is held below 0.2V. The diode (D) acts as a short circuit at the moment of power down. The capacitor C will discharge rapidly and fully. The current-limited resistor, Rin, will prevent high current or ESD (electrostatic discharge) from flowing to pin /RESET. Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 29 EM78P153K 8-Bit Microcontroller with OTP ROM 5.12 Residue-Voltage Protection When the battery is replaced, the device power (Vdd) is cut off but residue-voltage remains. The residue-voltage may trip below the minimum Vdd, but not to zero. This condition may cause a poor power-on reset. The following figures illustrate two recommended methods on how to build a residue-voltage protection circuit for the EM78P153K. Vdd Vdd 33K EM78P153K Q1 10K /RESET 100K 1N4684 Figure 5-15 Residue Voltage Protection Circuit 1 Vdd Vdd R1 EM78P153K Q1 /RESET R2 R3 Figure 5-16 Residue Voltage Protection Circuit 2 Note Figure 5-15 and Figure 5-16 should be designed to ensure that the voltage of the /RESET pin is larger than VIH (min). 30 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM 5.13 Instruction Set Each instruction in the instruction set is a 13-bit word divided into an OP code and one or more operands. Normally, all instructions are executed within one single instruction cycle (one instruction consists of two oscillator periods), unless the program counter is changed by instruction "MOV R2,A", "ADD R2,A", or by instructions of arithmetic or logic operation on R2 (e.g., "SUB R2,A", "BS(C) R2,6", "CLR R2", ). In this case, the execution takes two instruction cycles. If for some reasons, the specification of the instruction cycle is not suitable for certain applications, try to modify the instruction as follows: A) Modify one instruction cycle to consist of four oscillator periods. B) "JMP," "CALL," "RET," "RETL," "RETI," or the conditional skip ("JBS," "JBC," "JZ," "JZA," "DJZ,” "DJZA") commands which were tested to be true, are executed within two instruction cycles. The instructions that are written to the program counter also take two instruction cycles. Case (A) is selected by the Code Option bit, called CLK. One instruction cycle consists of two oscillator clocks if CLK is low; and four oscillator clocks if CLK is high. Note that once the four oscillator periods within one instruction cycle is selected as in Case (A), the internal clock source to TCC should be CLK=Fosc/4, instead of Fosc/2. Moreover, the instruction set has the following features: 1) Every bit of any register can be set, cleared, or tested directly. 2) The I/O register can be regarded as general register. That is, the same instruction can operate on I/O register. The following symbols are used in the Instruction Set table: Convention: R = Register designator that specifies which one of the registers (including operation and general purpose registers) is to be utilized by the instruction. b = Bit field designator that selects the value for the bit located in the register R and which affects the operation. k = 8 or 10-bit constant or literal value Mnemonic Operation Status Affected NOP No Operation DAA Decimal Adjust A CONTW A → CONT None SLEP 0 → WDT, Stop oscillator T, P WDTC 0 → WDT T, P Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) None C • 31 EM78P153K 8-Bit Microcontroller with OTP ROM (Continuation) Mnemonic IOW R Operation Status Affected A → IOCR None 1 ENI Enable Interrupt None DISI Disable Interrupt None RET [Top of Stack] → PC None RETI [Top of Stack] → PC, Enable Interrupt None CONTR CONT → A None IOR R IOCR → A MOV R, A A→R None 0→A Z Z CLRA None 1 CLR R 0→R SUB A, R R-A→A Z, C, DC SUB R, A R-A→R Z, C, DC DECA R R-1→A Z DEC R R-1→R Z OR A, R A∨R→A Z OR R, A A∨R→R Z AND A, R A&R→A Z AND R, A A&R→R Z XOR A, R A⊕R→A Z XOR R, A A⊕R→R Z ADD A, R A+R→A Z, C, DC ADD R, A A+R→R Z, C, DC MOV A, R R→A Z MOV R, R R→R Z COMA R /R → A Z COM R /R → R Z INCA R R+1→A Z INC R R+1→R Z DJZA R R - 1 → A, skip if zero None DJZ R - 1 → R, skip if zero None R 1 Note: This instruction is applicable to IOC5~IOC6, IOCB ~ IOCF only. 32 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM (Continuation) Mnemonic Operation Status Affected RRCA R R(n) → A(n - 1), R(0) → C, C → A(7) C RRC R R(n) → R(n - 1), R(0) → C, C → R(7) C RLCA R R(n) → A(n + 1), R(7) → C, C → A(0) C RLC R R(n) → R(n + 1), R(7) → C, C → R(0) C SWAPA R R(0 - 3) → A(4 - 7), R(4 - 7) → A(0 - 3) None SWAP R R(0 - 3) ↔ R(4 - 7) None JZA R R + 1 → A, skip if zero None JZ R R + 1 → R, skip if zero None BC R, b 0 → R(b) None 2 BS R, b 1 → R(b) None 3 JBC R, b if R(b) = 0, skip None JBS R, b if R(b) = 1, skip None CALL k PC + 1 → [SP], (Page, k) → PC None JMP k (Page, k) → PC None MOV A, k k→A None OR A, k A∨k→A Z AND A, k A&k→A Z XOR A, k A⊕k→A Z RETL k k → A, [Top of Stack] → PC SUB A, k K-A→A INT PC + 1 → [SP], 001H → PC ADD A, k K+A→A None Z, C,DC None Z, C, DC 2 Note: This instruction is not recommended for RF operation. 3 This instruction cannot operate under RF. Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 33 EM78P153K 8-Bit Microcontroller with OTP ROM 6 Absolute Maximum Ratings Items Rating Temperature under bias -40°C to 85°C Storage temperature -65°C to 150°C Input voltage Vss-0.3V to Vdd+0.5V Output voltage Vss-0.3V to Vdd+0.5V 2.1V to 5.5V DC to 20 MHz Working Voltage Working Frequency Note: These parameters are theoretical values and have not been tested. 7 Electrical Characteristics 7.1 DC Characteristics Ta=25°C, VDD=5V, VSS=0V Symbol Condition Min. Typ. Max. Unit Crystal: VDD to 2.3V Two cycles with two clocks DC − 4.0 MHz Crystal: VDD to 3V Two cycles with two clocks DC − 8.0 MHz Crystal: VDD to 5V Two cycles with two clocks DC − 20.0 MHz ERC: VDD to 5V R: 5KΩ, C: 39pF F±30% 1500 F±30% kHz Input Leakage Current for input pins VIN = VDD, VSS − − ±1 μA VIH1 Input High Voltage (VDD=5V) Ports 5, 6 2.0 − − V VIL1 Input Low Voltage (VDD=5V) Ports 5, 6 − − 0.8 V VIHT1 Input High Threshold Voltage (VDD=5V) /RESET, TCC (Schmitt trigger) 2.0 − − V VILT1 Input Low Threshold Voltage (VDD=5V) /RESET, TCC (Schmitt trigger) − − 0.8 V VIHX1 Clock Input High Voltage (VDD=5V) OSCI 2.5 − Vdd+0.3 V VILX1 Clock Input Low Voltage (VDD=5V) OSCI − 1.0 V VIH2 Input High Voltage (VDD=3V) Ports 5, 6 1.5 − − V VIL2 Input Low Voltage (VDD=3V) Ports 5, 6 − − 0. 4 V VIHT2 Input High Threshold Voltage (VDD=3V) /RESET, TCC (Schmitt trigger) 1.5 − − V VILT2 Input Low Threshold Voltage (VDD=3V) /RESET, TCC (Schmitt trigger) − − 0.4 V VIHX2 Clock Input High Voltage (VDD=3V) OSCI 1.5 − − V VILX2 Clock Input Low Voltage (VDD=3V) OSCI − − 0.6 V FXT ERC IIL 34 • Parameter Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM (Continuation) Symbol Parameter Condition Min. Typ. Max. Unit IOH1 High Drive Current (Ports 5 and 6) VOH = 2.4V -8.5 -12 - mA IOL1 Low Sink Current (Ports 5 & 6) VOL = 0.4V 11.5 16 - mA IOL2 Low Sink Current (P64, P65) VOL = 0.4V 11.5 16 - mA IOL3 Low Sink Current (P63) VOL = 0.4V 17.5 25 - mA IPH Pull-high current Pull-high active, input pin at VSS –60 –75 –90 μA IPL Pull-low current Pull-down active, input pin at VDD 20 35 50 μA /RESET= 'High', Fosc=32kHz (Crystal type, CLKS="0"), Output pin floating, WDT disabled - 15 30 μA /RESET= 'High', Fosc=32kHz (Crystal type, CLKS="0"), Output pin floating, WDT enabled - 19 35 μA /RESET= 'High', Fosc=4 MHz (Crystal type, CLKS="0"), Output pin floating - - 2.0 mA /RESET= 'High', Fosc=10 MHz (Crystal type, CLKS="0"), Output pin floating - - 4.0 mA ICC1 ICC2 ICC3 ICC4 Operating supply current at two clocks (VDD=3V) Operating supply current at two clocks (VDD=3V) Operating supply current at two clocks (VDD=5.0V) Operating supply current at two clocks (VDD=5.0V) ISB1 Power down current All input and I/O pins at VDD, Output pin floating, WDT disabled - - 1 μA ISB2 Power down current All input and I/O pins at VDD, Output pin floating, WDT enabled - - 10 μA Note: *These parameters are theoretical values and have not been tested. Internal RC Electrical Characteristics (TA = 25°C, VDD = 5 V, VSS = 0V) Drift Rate Internal RC Selected Band Temperature Operating Voltage Min. Typ. Max. 4 MHz 25°C 5V 3.92 MHz 4 MHz 4.08 MHz 16 MHz 25°C 5V 15.68 MHz 16 MHz 16.32 MHz 8 MHz 25°C 5V 7.84 MHz 8 MHz 8.16 MHz 1 MHz 25°C 5V 0.98 MHz 1 MHz 1.02 MHz Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 35 EM78P153K 8-Bit Microcontroller with OTP ROM Internal RC Electrical Characteristics (Process, Voltage and Temperature Deviation) Internal RC Drift Rate (Process & Operating Voltage and Temperature Variation) Selected Band Temperature Operating Voltage Min. Typ. Max. 4 MHz -40 ~ 85°C 2.1V ~ 5.5V 3.76 MHz 4 MHz 4.24 MHz 16 MHz -40 ~ 85°C 4.0V ~ 5.5V 15.36 MHz 16 MHz 16.64 MHz 8 MHz -40 ~ 85°C 3.0V ~ 5.5V 7.60 MHz 8 MHz 8.40 MHz 1 MHz -40 ~ 85°C 2.1V ~ 5.5V 0.94 MHz 1 MHz 1.06 MHz 7.2 AC Characteristics Ta=25°C, VDD=5V, VSS=0V Symbol Parameter Dclk Input CLK duty cycle Tins Instruction cycle time (CLKS="0") Ttcc TCC input period Tdrh Device reset hold time Trst /RESET pulse width Conditions Min. Typ. Max. Unit - 45 50 55 % Crystal type 100 - DC ns RC type 500 - DC ns - (Tins+20)/N* - - ns TXAL, SUT1, SUT0=1, 1 17.6-30% 17.6 17.6+30% ms - 2000 - - ns *Twdt1 Watchdog timer period SUT1, SUT0=1,1 17.6~30% 17.6 17.6+30% ms *Twdt2 Watchdog timer period SUT1, SUT0=1,0 4.5+30% 4.5 4.5+30% ms *Twdt3 Watchdog timer period SUT1, SUT0=0,1 288~30% 288 288+30% ms *Twdt4 Watchdog timer period SUT1, SUT0=0,0 72~30% 72 72+30% ms Tset Input pin setup time - - 0 - ns Thold Input pin hold time - - 20 - ns Tdelay Output pin delay time - 50 - ns Cload=20pF Note: These parameters are theoretical values and have not been tested. The Watchdog Timer duration is determined by Option Code (Bit 6, Bit 5) *N = selected prescaler ratio *Twdt1: The Option word (SUT1, SUT0) is used to define the oscillator set-up time. In Crystal mode the WDT time-out length is the same as the set-up time (18 ms). *Twdt2: The Option word (SUT1, SUT0) is used to define the oscillator set-up time. In Crystal mode the WDT time-out length is the same as the set-up time (4.5 ms). *Twdt3: The Option word (SUT1, SUT0) is used to define the oscillator set-up time. In Crystal mode the WDT time-out length is the same as the set-up time (288 ms). *Twdt4: The Option word (SUT1, SUT0) is used to define the oscillator set-up time. In Crystal mode the WDT time-out length is the same as the set-up time (72 ms). 36 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM 7.3 Device Characteristics The graphs provided in the following pages were derived based on a limited number of samples and are shown here for reference only. The device characteristics illustrated herein are not guaranteed for its accuracy. In some graphs, the data may be out of the specified warranted operating range. Volt. to Freq. Curve (4MHz) 4.2 4.15 Freq. (MHz) 4.1 4.05 4 3.95 3.9 3.85 3.8 2 2.5 3 3.5 4 4.5 5 5.5 6 Volt. (V) Figure 8-1 IRC Deviation (4MHz) Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 37 EM78P153K 8-Bit Microcontroller with OTP ROM Volt. to Freq. Curve (16MHz) 16.8 16.6 Freq. (MHz) 16.4 16.2 16 15.8 15.6 15.4 15.2 3.5 4 4.5 5 5.5 6 Volt. (V) Figure 8-2 IRC Deviation (16 MHz) Volt. to Freq. Curve (8MHz) 8.4 8.3 Freq. (MHz) 8.2 8.1 8 7.9 7.8 7.7 7.6 3 3.5 4 4.5 5 5.5 6 Volt. (V) Figure 8-3 IRC Deviation (8 MHz) 38 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM Volt. to Freq. Curve (1MHz) 1050 1040 1030 Freq. (kHz) 1020 1010 1000 990 980 970 960 950 2 2.5 3 3.5 4 4.5 5 5.5 6 Volt. (V) Figure 8-4 IRC Deviation (1 MHz) P5/P6 Vih/Vil vs VDD at 85℃ 2.0 Vih/Vil (V) 1.6 1.2 VIH 0.8 VIL 0.4 0.0 2.0 2.5 3.0 3.5 4.0 VDD (V) 4.5 5.0 5.5 6.0 Figure 8-5 VIH/VIL vs. VDD (85°C) Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 39 EM78P153K 8-Bit Microcontroller with OTP ROM P5/P6 Vih/Vil vs VDD at 25℃ 2.0 Vih/Vil (V) 1.6 1.2 VIH 0.8 VIL 0.4 0.0 2.0 2.5 3.0 3.5 4.0 VDD (V) 4.5 5.0 5.5 6.0 Figure 8-6 VIH/VIL vs. VDD (25°C) P5/P6 Vih/Vil vs VDD at -40℃ 2.0 Vih/Vil (V) 1.6 1.2 VIH VIL 0.8 0.4 0.0 2.0 2.5 3.0 3.5 4.0 VDD (V) 4.5 5.0 5.5 6.0 Figure 8-7 VIH/VIL vs. VDD (-40°C) 40 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM Reset Vih vs VDD (Input pin with schmitt inverter) 2.5 Vih (V) 2.0 1.5 VIH max(-40~85℃) VIH typ(25℃) 1.0 VIH min(-40~85℃) 0.5 0.0 2.0 2.5 3.0 3.5 4.0 4.5 VDD(V) 5.0 5.5 6.0 Figure 8-8 VIH of RESET Pin vs. VDD Reset Vil vs VDD (Input pin with schmitt inverter) 2.5 Vil (V) 2.0 1.5 VIL max(-40~85℃) VIL typ(25℃) 1.0 VIL min(-40~85℃) 0.5 0.0 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 VDD(V) Figure 8-9 VIL of RESET Pin vs. VDD Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 41 EM78P153K 8-Bit Microcontroller with OTP ROM P5/P6 Ioh1 vs Voh at VDD=5V 0 Ioh1 (mA) -5 -10 85℃ 25℃ -15 -40℃ -20 -25 0.0 1.0 2.0 3.0 4.0 5.0 Voh (V) Figure 8-10 VOH vs. IOH, VDD=5V P5/P6 Ioh1 vs Voh at VDD=3V 0 Ioh1 (mA) -2 -4 85℃ 25℃ -40℃ -6 -8 -10 0.0 0.5 1.0 1.5 Voh (V) 2.0 2.5 3.0 Figure 8-11 VOH vs. IOH, VDD=3V 42 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM P50~P53/P60~P62/P66~P67 Iol1 vs Vol at VDD=5V 90 Iol1 (mA) 72 54 85℃ 25℃ -40℃ 36 18 0 0.0 1.0 2.0 3.0 4.0 5.0 Vol (V) Figure 8-12 VOL vs. IOL, VDD=5V (Except P63~P65) P50~P53/P60~P62/P66~P67 Iol1 vs Vol at VDD=3V 40 Iol1 (mA) 32 24 85℃ 25℃ -40℃ 16 8 0 0.0 0.5 1.0 1.5 Vol (V) 2.0 2.5 3.0 Figure 8-13 VOL vs. IOL, VDD=3V (Except P63~P65) Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 43 EM78P153K 8-Bit Microcontroller with OTP ROM P64/P65 Iol2 vs Vol at VDD=5V 90 Iol2 (mA) 72 54 85℃ 25℃ -40℃ 36 18 0 0.0 1.0 2.0 3.0 4.0 5.0 Vol (V) Figure 8-14 VOL of P64, P65 vs. IOL, VDD=5V P64/P65 Iol2 vs Vol at VDD=3V 40 Iol2 (mA) 32 85℃ 24 25℃ -40℃ 16 8 0 0.0 0.5 1.0 1.5 Vol (V) 2.0 2.5 3.0 Figure 8-15 VOL of P64, P65 vs. IOL, VDD=3V 44 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM P63 Iol3 vs Vol at VDD=5V 160 Iol3 (mA) 128 96 85℃ 25℃ 64 -40℃ 32 0 0.0 1.0 2.0 3.0 4.0 5.0 Vol (V) Figure 8-16 VOL of P63 vs. IOL, VDD=5V P63 Iol3 vs Vol at VDD=3V 75 Iol3 (mA) 60 45 85℃ 25℃ -40℃ 30 15 0 0.0 0.5 1.0 1.5 Vol (V) 2.0 2.5 3.0 Figure 8-17 VOL of P63 vs. IOL, VDD=3V Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 45 EM78P153K 8-Bit Microcontroller with OTP ROM P6 IPH vs Temperature at VDD=3V&5V 0 -20 IPH (uA) -40 3.0V 5.0V . -60 -80 -100 -60 -40 -20 0 20 40 Temperature(℃) 60 80 100 Figure 8-18 IPH of Port 6 vs. Temperature, VDD=3V & 5V P50~P52/P60~P63 IPL vs Temperature at VDD=3V&5V 50 IPL(uA) 40 30 3.0V 20 5.0V 10 0 -60 -40 -20 0 20 40 60 80 100 Temperature(℃) Figure 8-19 IPL of Ports 5 & 6 vs. Temperature, VDD=3V & 5V 46 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM Typical & Maximum ICC1 and ICC2 vs Temperature at VDD=5V 28 Current(uA) 26 24 Typ.ICC1 Typ.ICC2 22 Max.ICC1 Max.ICC2 20 18 -60 -40 -20 0 20 40 Temperature (℃) 60 80 100 Figure 8-20 ICC1 and ICC2 vs. Temperature, VDD=5V Typical & Maximum ICC1 and ICC2 vsTemperature at VDD=3V 13 Current(uA) 12 11 Typ.ICC1 Typ.ICC2 10 Max.ICC1 Max.ICC2 9 8 -60 -40 -20 0 20 40 Temperature(℃) 60 80 100 Figure 8-21 ICC1 and ICC2 vs. Temperature, VDD=3V Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 47 EM78P153K 8-Bit Microcontroller with OTP ROM Typical & Maximum ICC3 and ICC4 vs Temperature at VDD=5V 3.0 Current (mA) 2.6 2.2 Typ.ICC3 Typ.ICC4 Max.ICC3 1.8 Max.ICC4 1.4 1.0 -60 -40 -20 0 20 40 Temperature (℃) 60 80 100 Figure 8-22 ICC3 and ICC4 vs. Temperature, VDD=5V Typical & Maximum ICC3 and ICC4 vs Temperature at VDD=3V 2.0 Current(mA) 1.7 1.4 Typ.ICC3 Typ.ICC4 Max.ICC3 1.1 Max.ICC4 0.8 0.5 -60 -40 -20 0 20 40 Temperature(℃) 60 80 100 Figure 8-23 ICC3 and ICC4 vs. Temperature, VDD=3V 48 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM Typical & Maximum ISB1 and ISB2 vs Temperature at VDD=5V 12.0 Current(uA) 9.6 Typ.ISB1 7.2 Typ.ISB2 Max.ISB1 4.8 Max.ISB2 2.4 0.0 -60 -40 -20 0 20 40 Temperature (℃) 60 80 100 Figure 8-24 ISB1 and ISB2 vs. Temperature, VDD=5V Typical & Maximum ISB1 and ISB2 vs Temperature at VDD=3V 3.0 Current(uA) 2.4 1.8 Typ.ISB1 Typ.ISB2 Max.ISB1 1.2 Max.ISB2 0.6 0.0 -60 -40 -20 0 20 40 Temperature(℃) 60 80 100 Figure 8-25 ISB1 and ISB2 vs. Temperature, VDD=3V Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 49 EM78P153K 8-Bit Microcontroller with OTP ROM Power Consumption in XT Mode (4MHz) 2.1 1.9 I(mA) 1.7 1.5 max 1.3 min 1.1 0.9 6. 0 5. 5 5. 0 4. 5 4. 0 3. 5 3. 0 2. 5 2. 0 0.7 VDD(V) Figure 8-26 Power Consumption in HXT Mode (4MHz) Power Consumption in LXT2 Mode(32.768KHz) 40 I(uA) 30 max 20 min 10 6. 0 5. 5 5. 0 4. 5 4. 0 3. 5 3. 0 2. 5 2. 0 0 VDD(V) Figure 8-27 Power Consumption in LXT Mode (32765Hz) 50 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM P6 Wake-up Time when Sleep to Normal Mode with XTAL 4.0 3.5 Time(ms) 3.0 85℃ 2.5 25℃ 2.0 -40℃ 1.5 1.0 0.5 2.0 2.5 3.0 3.5 4.0 VDD(V) 4.5 5.0 5.5 6.0 Figure 8-28 P6 Wake-up Time when Sleep to Normal, Crystal mode (Sub. Freq.=16kHz, 4 MHz) P6 Wake-up Time when Sleep to Normal Mode with IRC 3.2 3.1 Time(us) 3.0 85℃ 2.9 25℃ -40℃ 2.8 2.7 2.6 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 VDD(V) Figure 8-29 P6 Wake-up Time when Sleep to Normal, IRC mode (Sub. Freq.=16kHz, 4 MHz) Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 51 EM78P153K 8-Bit Microcontroller with OTP ROM WDT Time_out Period vs VDD in Normal in Crystal mode(4MHz) 35 Time(ms) 30 25 85℃ 25℃ 20 -40℃ 15 10 2.0 2.5 3.0 3.5 4.0 VDD(V) 4.5 5.0 5.5 6.0 Figure 8-30 WDT Timer Time Out in Normal, Crystal Mode (Sub. Freq.=16kHz, 4 MHz) WDT Time_out Period vs VDD in Normal in IRC mode(4MHz) 35 Time(ms) 30 25 85℃ 25℃ -40℃ 20 15 10 2.0 2.5 3.0 3.5 4.0 VDD(V) 4.5 5.0 5.5 6.0 Figure 8-31 WDT Timer Time-out in Normal, IRC Mode (Sub. Freq.=16kHz, 4 MHz) 52 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM WDT Time_out Period vs VDD When Sleep to Normal in Crystal mode(4MHz) 35 Time(ms) 30 25 85℃ 25℃ -40℃ 20 15 10 2.0 2.5 3.0 3.5 4.0 VDD(V) 4.5 5.0 5.5 6.0 Figure 8-32 WDT Timer Time Out when Sleep to Normal, Crystal Mode (4MHz) WDT Time_out Period vs VDD When Sleep to Normal in IRC mode(4MHz) 35 Time(ms) 30 25 85℃ 25℃ 20 -40℃ 15 10 2.0 2.5 3.0 3.5 4.0 VDD(V) 4.5 5.0 5.5 6.0 Figure 8-33 WDT Timer Time Out when Sleep to Normal, IRC Mode (4MHz) Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 53 EM78P153K 8-Bit Microcontroller with OTP ROM Power On Reset Time vs VDD in Normal, Crystal Mode 35 Time(ms) 30 25 85℃ 25℃ -40℃ 20 15 10 2.0 2.5 3.0 3.5 4.0 VDD(V) 4.5 5.0 5.5 6.0 Figure 8-34 Power on Reset Time in Normal, Crystal Mode (Sub. Freq.=16kHz, 4 MHz) Power On Reset Time vs VDD in Normal, IRC Mode 35 Time(ms) 30 85℃ 25 25℃ -40℃ 20 15 10 2.0 2.5 3.0 3.5 4.0 VDD(V) 4.5 5.0 5.5 6.0 Figure 8-35 Power on Reset Time in Normal, IRC Mode (Sub. Freq.=16kHz, 4 MHz) 54 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM IRC OSC Frequency(4MHz) vs Temperature at VDD=3V&5V 4.02 4.00 Frequency(MHz) 3.98 3.96 3.94 3.0V 5.0V 3.92 3.90 3.88 3.86 3.84 -60 -40 -20 0 20 40 Temperature (℃) 60 80 100 Figure 8-36 IRC OSC Freq, vs. Temp. (4MHz) IRC OSC Frequency(16MHz) vs Temperature at VDD=5V 16.15 Frequency(MHz) 16.10 16.05 5.0V 16.00 15.95 15.90 -60 -40 -20 0 20 40 Temperature (℃) 60 80 100 Figure 8-37 IRC OSC Freq, vs. Temp. (16MHz) Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 55 EM78P153K 8-Bit Microcontroller with OTP ROM IRC OSC Frequency(8MHz) vs Temperature at VDD=3V&5V 8.00 Frequency(MHz) 7.92 7.84 3.0V 5.0V 7.76 7.68 7.60 -60 -40 -20 0 20 40 Temperature (℃) 60 80 100 Figure 8-38 IRC OSC Freq, vs. Temp. (8MHz) IRC OSC Frequency(1MHz) vs Temperature at VDD=3V&5V 1.02 Frequency(MHz) 1.01 1.00 3.0V 5.0V 0.99 0.98 0.97 -60 -40 -20 0 20 40 Temperature (℃) 60 80 100 Figure 8-39 IRC OSC Freq, vs. Temp. (1 MHz) 56 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM ERC OSC Frequency vs Temp.(Cext=100pF, Rext=5.1K) 1.08 Fosc/Fosc(25℃) 1.06 1.04 VDD=3V 1.02 VDD=5V 1.00 0.98 0.96 -60 -40 -20 0 20 40 Temperature(℃) 60 80 100 Figure 8-40 ERC OSC Frequency vs. Temp (CEXT=100pf, REXT=5.1k) LVR Level vs Temperature 5.0 4.5 4.0reset 4.0 VDD (V) 4.0release 3.5 3.5reset 3.5release 3.0 2.7reset 2.5 2.7release 2.0 1.8reset 1.8release 1.5 1.0 -60 -40 -20 0 20 40 Temperature(℃) 60 80 100 Figure 8-41 LVR Level vs Temperature Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 57 EM78P153K 8-Bit Microcontroller with OTP ROM 8 Timing Diagrams AC Test Input/Output Waveform Note: AC Testing: Input are driven at 2.4V for logic “1,” and 0.4V for logic “0” Timing measurements are made at 2.0V for logic “1,” and 0.8V for logic “0” Figure 8-1a AC Test Input/Output Waveform Timing Diagram Reset Timing (CLK = "0") Figure 8-1b Reset Timing Diagram TCC Input Timing (CLKS = "0") Figure 8-1c TCC Input Timing Diagram 58 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM APPENDIX A Ordering and Manufacturing Information EM78P153KD14J Material Type J: RoHS complied Pin Number Package Type D: DIP SO: SOP SS: SSOP Specific Annotation K: Industrial Grad Product Number Product Type P: OTP Elan 8-bit Product For example: EM78P153KSO14J is EM78P153K with OTP program memory, industrial grade product, in 14-pin SOP 300mil package with RoHS complied Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 59 EM78P153K 8-Bit Microcontroller with OTP ROM B Package Type OTP MCU Package Type Pin Count Package Size EM78P153KD14J DIP 14 300 mil EM78P153KSO14J SOP 14 150 mil SSOP 10 150 mil EM78P153KSS10J EM78P153KASS10J For product code "J". These are Green products and comply with RoHS specifications. Part No. Electroplate type Pure Tin Ingredient (%) Sn: 100% Melting point (°C) 60 • EM78P153KD14J/SO14J/SS10J/ASS10J 232°C Electrical resistivity (μΩ-cm) 11.4 Hardness (hv) 8~10 Elongation (%) >50% Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM C Package Information 14-Lead Plastic Dual in-line (DIP) — 300 mil D 14 E1 8 C E eB 1 A 7 θ A1 A2 Symbol A A1 A2 c D E E1 eB B B1 L e θ Min. 0.381 3.175 0.203 18.796 6.174 7.366 8.409 0.356 1.143 3.048 0 Normal Max. 4.318 3.302 3.429 0.254 0.356 19.050 19.304 6.401 6.628 7.696 8.025 9.017 9.625 0.457 0.559 1.524 1.778 3.302 3.556 2.540(Typ.) 15 L B e B1 TITLE: PDIP-14L 300MIL PACKAGE OUTLINE DIMENSION File : Edtion: A D14 Unit : mm Scale: Free Material: Sheet:1 of 1 Figure B-1a EM78P153K 14-Lead DIP Package Type Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 61 EM78P153K 8-Bit Microcontroller with OTP ROM 14-Lead Small-Outline Package (SOP) — 150 mil E Symbol A A1 b c E H D L e θ H Min. 1.350 0.100 0.330 0.190 3.800 5.800 8.550 0.600 Normal Max. 1.750 0.250 0.510 0.250 4.000 6.200 8.750 1.270 1.27(TYP) 0 8 e b c D A2 A TITLE: SOP-14L(150MIL) PACKAGE OUTLINE DIMENSION File : Edtion: A NSO14 Unit : mm Scale: Free Material: Sheet:1 of 1 Figure B-1b EM78P153K 14-Lead SOP Package Type 62 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) EM78P153K 8-Bit Microcontroller with OTP ROM 10-Lead Shrink Small-Outline Package (SSOP) — 150 mil Symbol A A1 A2 D E E1 b b1 c c1 L e θ Min 1.35 0.075 1.18 4.7 5.8 3.7 0.406 0.406 0.178 0.178 0.55 0° Normal 1.55 0.175 1.38 4.9 6.0 3.9 0.65 1.00TYP - Max 1.75 0.275 1.58 5.1 6.2 4.1 0.496 0.456 0.278 0.228 0.75 7° Figure B-1c EM78P153K 10-Lead SSOP Package Type Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice) • 63 EM78P153K 8-Bit Microcontroller with OTP ROM 64 • Product Specification (V1.3) 10.23.2012 (This specification is subject to change without further notice)