PI6C4931502-04 High Performance HCSL Fanout Buffer Features Description ÎÎ2 HCSL outputs The PI6C4931502-04 is a high performance fanout buffer device which supports up to 250MHz frequency. This device is ideal for systems that need to distribute low jitter clock signals to multiple destinations. ÎÎUp to 250MHz output frequency ÎÎUltra low additive phase jitter: < 0.1 ps (typ) ÎÎTwo selectable inputs ÎÎLow delay from input to output (Tpd typ. 1.5ns) Applications ÎÎ2.5V / 3.3V power supply ÎÎNetworking systems including switches and Routers ÎÎIndustrial temperature support ÎÎHigh frequency backplane based computing and telecom ÎÎTSSOP-16 package platforms Block Diagram CLK_EN Pullup Pin Configuration (16-Pin TSSOP) D LE CLK0 nCLK0 Pulldown CLK1 Pulldown CLK_SEL Pulldown Pullup/ Pulldown Q Q0 nQ0 0 1 Q1 nQ1 CLK_EN 1 16 GND CLK_SEL 2 15 VDD CLK0 3 14 Q0 nCLK0 4 13 nQ0 CLK1 5 12 Q1 NC 6 11 nQ1 NC 7 10 VDD 8 9 VDD IREF Iref 14-0049 1 PI6C4931502-04 Rev B 04/10/2014 PI6C4931502-04 High Performance HCSL Fanout Buffer Pinout Table Pin # Pin Name 1 CLK_EN Input Pull Up Clock output enable/ disable 2 CLK_SEL Input Pulldown Clock input source selection pin CLK0 3, 4 nCLK0 Type Description Pull Up Input Pull Up/ Pulldown Differential clock input Pulldown Single ended clock input 5 CLK1 Input 6, 7 NC - No connect 8 IREF Output External resistor connection to set differential output current. Typically 475Ω 9, 10, 15 VDD Power Power supply Output HCSL output clock Output HCSL output clock Power Ground Q1 11, 12 nQ1 Q0 13, 14 nQ0 16 GND Function Table Table 1: Input select function CLK_SEL Function 0 CLK0, nCLK0 1 CLK1 Table 2: Output Enable function CLK_EN Outputs Q0:Q1 nQ0:nQ1 0 Disabled; LOW Disabled; HIGH 1 Enabled Enabled 14-0049 2 PI6C4931502-04 Rev B 04/10/2014 PI6C4931502-04 High Performance HCSL Fanout Buffer Maximum Ratings (Above which the useful life may be impaired. For user guidelines, not tested) Note: Storage temperature....................................................-55 to +150ºC Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Supply Voltage to Ground Potential (VDD).............. -0.5 to +4.6V Inputs (Referenced to GND).............................. -0.5 to VDD+0.5V Clock Output (Referenced to GND)................. -0.5 to VDD+0.5V Soldering Temperature (Max of 10 seconds).....................+260ºC Power Supply Characteristics and Operating Conditions Symbol Parameter VDD Core Supply Voltage IDD Power Supply Current TA Ambient Operating Temperature Test Condition Min. Typ. Max. Units 2.97 3.63 V 2.375 2.625 V VDD = 3.3V, Unloaded 60 VDD = 2.5V, Unloaded 60 -40 mA 85 °C DC Electrical Specifications - Differential Inputs Symbol Parameter IIH Input High current: CLK0, nCLK0 IIL Min. Typ. Input = VDD Max. Units 200 uA Input Low current: nCLK0 -200 uA Input Low current: CLK0 -10 uA CIN Input capacitance VIH Input high voltage VIL Input low voltage -0.3 VID Input Differential Amplitude PK-PK 150 1300 mV VCM Common mode input voltage GND + 0.5 VDD -0.85 V 14-0049 4 PF VDD+0.3 3 V V PI6C4931502-04 Rev B 04/10/2014 PI6C4931502-04 High Performance HCSL Fanout Buffer DC Electrical Specifications - LVCMOS Inputs Symbol Parameter Conditions Min. Typ. CLK1, CLK_SEL IIH Input High current Max. Units 200 uA 20 uA Input = VDD CLK_EN CLK1, CLK_SEL -10 uA -200 uA IIL Input Low current Input = GND VIH Input high voltage VDD =3.3V 2.0 3.765 V VIL Input low voltage VDD =3.3V -0.3 0.8 V VIH Input high voltage VDD =2.5V 1.7 2.8 V VIL Input low voltage VDD =2.5V -0.3 0.7 V CLK_EN DC Electrical Specifications – HCSL Outputs Parameter Description VOH Output High voltage VOL Output Low voltage 14-0049 Conditions Min. 4 Typ. Max. Units 520 800 mV 0 150 mV PI6C4931502-04 Rev B 04/10/2014 PI6C4931502-04 High Performance HCSL Fanout Buffer AC Electrical Specifications – Differential Outputs Parameter Description Conditions Min. Typ. Max. Units fOUT Output frequency 250 MHz Tr Output rise time From 20% to 80% 175 700 ps Tf Output fall time From 80% to 20% 175 700 ps TODC Output duty cycle 47 53 % Tj Buffer additive jitter RMS VMAX Absolute Maximum Output Voltage VMIN Absolute Minimum Output Voltage VCROSS Absolute crossing voltage HCSL DVCROSS Total variation of crossing voltage HCSL TSK Output Skew 40 TPD Propagation Delay 1500 TP2P Skew Part to Part Skew1 0.1 ps 1150 -300 mV mV 250 550 mV 140 mV 100 ps ps 600 ps Notes: 1. This parameter is guaranteed by design Configuration test load board termination for HCSL Outputs Rs 33Ω 5% PI6C4931502-04 Clock TLA Rs 33Ω 5% Clock# TLB 475Ω 1% 14-0049 Rp 49.9Ω 1% 5 2pF 5% 2pF 5% Rp 49.9Ω 1% PI6C4931502-04 Rev B 04/10/2014 PI6C4931502-04 High Performance HCSL Fanout Buffer DATE: 05/03/12 Notes: 1. Refer JEDEC MO-153F/AB 2. Controlling dimensions in millimeters 3. Package outline exclusive of mold flash and metal burr DESCRIPTION: 16-Pin, 173mil Wide TSSOP PACKAGE CODE: L DOCUMENT CONTROL #: PD-1310 REVISION: F 12-0372 Note: • For latest package info, please check: http://www.pericom.com/products/packaging/mechanicals.php Ordering Information(1-3) Ordering Code Package Code PI6C4931502-04LIE L Package Description 16-pin, Pb-free & Green, TSSOP, (L16) Notes: 1. Thermal characteristics can be found on the company web site at www.pericom.com/packaging/ 2. E = Pb-free and Green 3. Adding an X suffix = Tape/Reel 14-0049 6 PI6C4931502-04 Rev B 04/10/2014